projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
drm/exynos/ipp: correct ipp_id field initialization
[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_rotator.c
CommitLineData
bea8a429
EK		 1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors:
4 * YoungJun Cho <yj44.cho@samsung.com>
5 * Eunchul Kim <chulspro.kim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundationr
10 */
11
12#include <linux/kernel.h>
bea8a429
EK		 13#include <linux/err.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <linux/platform_device.h>
17#include <linux/clk.h>
18#include <linux/pm_runtime.h>
19
20#include <drm/drmP.h>
21#include <drm/exynos_drm.h>
22#include "regs-rotator.h"
23#include "exynos_drm.h"
e30655d0 24#include "exynos_drm_drv.h"
bea8a429
EK		 25#include "exynos_drm_ipp.h"
26
27/*
28 * Rotator supports image crop/rotator and input/output DMA operations.
29 * input DMA reads image data from the memory.
30 * output DMA writes image data to memory.
31 *
32 * M2M operation : supports crop/scale/rotation/csc so on.
33 * Memory ----> Rotator H/W ----> Memory.
34 */
35
36/*
37 * TODO
38 * 1. check suspend/resume api if needed.
39 * 2. need to check use case platform_device_id.
40 * 3. check src/dst size with, height.
41 * 4. need to add supported list in prop_list.
42 */
43
44#define get_rot_context(dev) platform_get_drvdata(to_platform_device(dev))
45#define get_ctx_from_ippdrv(ippdrv) container_of(ippdrv,\
46 struct rot_context, ippdrv);
47#define rot_read(offset) readl(rot->regs + (offset))
48#define rot_write(cfg, offset) writel(cfg, rot->regs + (offset))
49
50enum rot_irq_status {
51 ROT_IRQ_STATUS_COMPLETE = 8,
52 ROT_IRQ_STATUS_ILLEGAL = 9,
53};
54
55/*
56 * A structure of limitation.
57 *
58 * @min_w: minimum width.
59 * @min_h: minimum height.
60 * @max_w: maximum width.
61 * @max_h: maximum height.
62 * @align: align size.
63 */
64struct rot_limit {
65 u32 min_w;
66 u32 min_h;
67 u32 max_w;
68 u32 max_h;
69 u32 align;
70};
71
72/*
73 * A structure of limitation table.
74 *
75 * @ycbcr420_2p: case of YUV.
76 * @rgb888: case of RGB.
77 */
78struct rot_limit_table {
79 struct rot_limit ycbcr420_2p;
80 struct rot_limit rgb888;
81};
82
83/*
84 * A structure of rotator context.
85 * @ippdrv: prepare initialization using ippdrv.
86 * @regs_res: register resources.
87 * @regs: memory mapped io registers.
88 * @clock: rotator gate clock.
89 * @limit_tbl: limitation of rotator.
90 * @irq: irq number.
91 * @cur_buf_id: current operation buffer id.
92 * @suspended: suspended state.
93 */
94struct rot_context {
95 struct exynos_drm_ippdrv ippdrv;
96 struct resource *regs_res;
97 void __iomem *regs;
98 struct clk *clock;
99 struct rot_limit_table *limit_tbl;
100 int irq;
101 int cur_buf_id[EXYNOS_DRM_OPS_MAX];
102 bool suspended;
103};
104
105static void rotator_reg_set_irq(struct rot_context *rot, bool enable)
106{
107 u32 val = rot_read(ROT_CONFIG);
108
109 if (enable == true)
110 val |= ROT_CONFIG_IRQ;
111 else
112 val &= ~ROT_CONFIG_IRQ;
113
114 rot_write(val, ROT_CONFIG);
115}
116
117static u32 rotator_reg_get_fmt(struct rot_context *rot)
118{
119 u32 val = rot_read(ROT_CONTROL);
120
121 val &= ROT_CONTROL_FMT_MASK;
122
123 return val;
124}
125
126static enum rot_irq_status rotator_reg_get_irq_status(struct rot_context *rot)
127{
128 u32 val = rot_read(ROT_STATUS);
129
130 val = ROT_STATUS_IRQ(val);
131
132 if (val == ROT_STATUS_IRQ_VAL_COMPLETE)
133 return ROT_IRQ_STATUS_COMPLETE;
134
135 return ROT_IRQ_STATUS_ILLEGAL;
136}
137
138static irqreturn_t rotator_irq_handler(int irq, void *arg)
139{
140 struct rot_context *rot = arg;
141 struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv;
7259c3d6 142 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
bea8a429
EK		 143 struct drm_exynos_ipp_event_work *event_work = c_node->event_work;
144 enum rot_irq_status irq_status;
145 u32 val;
146
147 /* Get execution result */
148 irq_status = rotator_reg_get_irq_status(rot);
149
150 /* clear status */
151 val = rot_read(ROT_STATUS);
152 val |= ROT_STATUS_IRQ_PENDING((u32)irq_status);
153 rot_write(val, ROT_STATUS);
154
155 if (irq_status == ROT_IRQ_STATUS_COMPLETE) {
156 event_work->ippdrv = ippdrv;
157 event_work->buf_id[EXYNOS_DRM_OPS_DST] =
158 rot->cur_buf_id[EXYNOS_DRM_OPS_DST];
159 queue_work(ippdrv->event_workq,
160 (struct work_struct *)event_work);
5ce405be 161 } else {
bea8a429 162 DRM_ERROR("the SFR is set illegally\n");
5ce405be 163 }
bea8a429
EK		 164
165 return IRQ_HANDLED;
166}
167
168static void rotator_align_size(struct rot_context *rot, u32 fmt, u32 *hsize,
169 u32 *vsize)
170{
171 struct rot_limit_table *limit_tbl = rot->limit_tbl;
172 struct rot_limit *limit;
173 u32 mask, val;
174
175 /* Get size limit */
176 if (fmt == ROT_CONTROL_FMT_RGB888)
177 limit = &limit_tbl->rgb888;
178 else
179 limit = &limit_tbl->ycbcr420_2p;
180
181 /* Get mask for rounding to nearest aligned val */
182 mask = ~((1 << limit->align) - 1);
183
184 /* Set aligned width */
185 val = ROT_ALIGN(*hsize, limit->align, mask);
186 if (val < limit->min_w)
187 *hsize = ROT_MIN(limit->min_w, mask);
188 else if (val > limit->max_w)
189 *hsize = ROT_MAX(limit->max_w, mask);
190 else
191 *hsize = val;
192
193 /* Set aligned height */
194 val = ROT_ALIGN(*vsize, limit->align, mask);
195 if (val < limit->min_h)
196 *vsize = ROT_MIN(limit->min_h, mask);
197 else if (val > limit->max_h)
198 *vsize = ROT_MAX(limit->max_h, mask);
199 else
200 *vsize = val;
201}
202
203static int rotator_src_set_fmt(struct device *dev, u32 fmt)
204{
205 struct rot_context *rot = dev_get_drvdata(dev);
206 u32 val;
207
208 val = rot_read(ROT_CONTROL);
209 val &= ~ROT_CONTROL_FMT_MASK;
210
211 switch (fmt) {
212 case DRM_FORMAT_NV12:
213 val |= ROT_CONTROL_FMT_YCBCR420_2P;
214 break;
215 case DRM_FORMAT_XRGB8888:
216 val |= ROT_CONTROL_FMT_RGB888;
217 break;
218 default:
219 DRM_ERROR("invalid image format\n");
220 return -EINVAL;
221 }
222
223 rot_write(val, ROT_CONTROL);
224
225 return 0;
226}
227
228static inline bool rotator_check_reg_fmt(u32 fmt)
229{
230 if ((fmt == ROT_CONTROL_FMT_YCBCR420_2P) ||
231 (fmt == ROT_CONTROL_FMT_RGB888))
232 return true;
233
234 return false;
235}
236
237static int rotator_src_set_size(struct device *dev, int swap,
238 struct drm_exynos_pos *pos,
239 struct drm_exynos_sz *sz)
240{
241 struct rot_context *rot = dev_get_drvdata(dev);
242 u32 fmt, hsize, vsize;
243 u32 val;
244
245 /* Get format */
246 fmt = rotator_reg_get_fmt(rot);
247 if (!rotator_check_reg_fmt(fmt)) {
cbc4c33d 248 DRM_ERROR("invalid format.\n");
bea8a429
EK		 249 return -EINVAL;
250 }
251
252 /* Align buffer size */
253 hsize = sz->hsize;
254 vsize = sz->vsize;
255 rotator_align_size(rot, fmt, &hsize, &vsize);
256
257 /* Set buffer size configuration */
258 val = ROT_SET_BUF_SIZE_H(vsize) | ROT_SET_BUF_SIZE_W(hsize);
259 rot_write(val, ROT_SRC_BUF_SIZE);
260
261 /* Set crop image position configuration */
262 val = ROT_CROP_POS_Y(pos->y) | ROT_CROP_POS_X(pos->x);
263 rot_write(val, ROT_SRC_CROP_POS);
264 val = ROT_SRC_CROP_SIZE_H(pos->h) | ROT_SRC_CROP_SIZE_W(pos->w);
265 rot_write(val, ROT_SRC_CROP_SIZE);
266
267 return 0;
268}
269
270static int rotator_src_set_addr(struct device *dev,
271 struct drm_exynos_ipp_buf_info *buf_info,
272 u32 buf_id, enum drm_exynos_ipp_buf_type buf_type)
273{
274 struct rot_context *rot = dev_get_drvdata(dev);
275 dma_addr_t addr[EXYNOS_DRM_PLANAR_MAX];
276 u32 val, fmt, hsize, vsize;
277 int i;
278
279 /* Set current buf_id */
280 rot->cur_buf_id[EXYNOS_DRM_OPS_SRC] = buf_id;
281
282 switch (buf_type) {
283 case IPP_BUF_ENQUEUE:
284 /* Set address configuration */
285 for_each_ipp_planar(i)
286 addr[i] = buf_info->base[i];
287
288 /* Get format */
289 fmt = rotator_reg_get_fmt(rot);
290 if (!rotator_check_reg_fmt(fmt)) {
cbc4c33d 291 DRM_ERROR("invalid format.\n");
bea8a429
EK		 292 return -EINVAL;
293 }
294
295 /* Re-set cb planar for NV12 format */
296 if ((fmt == ROT_CONTROL_FMT_YCBCR420_2P) &&
297 !addr[EXYNOS_DRM_PLANAR_CB]) {
298
299 val = rot_read(ROT_SRC_BUF_SIZE);
300 hsize = ROT_GET_BUF_SIZE_W(val);
301 vsize = ROT_GET_BUF_SIZE_H(val);
302
303 /* Set cb planar */
304 addr[EXYNOS_DRM_PLANAR_CB] =
305 addr[EXYNOS_DRM_PLANAR_Y] + hsize * vsize;
306 }
307
308 for_each_ipp_planar(i)
309 rot_write(addr[i], ROT_SRC_BUF_ADDR(i));
310 break;
311 case IPP_BUF_DEQUEUE:
312 for_each_ipp_planar(i)
313 rot_write(0x0, ROT_SRC_BUF_ADDR(i));
314 break;
315 default:
316 /* Nothing to do */
317 break;
318 }
319
320 return 0;
321}
322
323static int rotator_dst_set_transf(struct device *dev,
324 enum drm_exynos_degree degree,
325 enum drm_exynos_flip flip, bool *swap)
326{
327 struct rot_context *rot = dev_get_drvdata(dev);
328 u32 val;
329
330 /* Set transform configuration */
331 val = rot_read(ROT_CONTROL);
332 val &= ~ROT_CONTROL_FLIP_MASK;
333
334 switch (flip) {
335 case EXYNOS_DRM_FLIP_VERTICAL:
336 val |= ROT_CONTROL_FLIP_VERTICAL;
337 break;
338 case EXYNOS_DRM_FLIP_HORIZONTAL:
339 val |= ROT_CONTROL_FLIP_HORIZONTAL;
340 break;
341 default:
342 /* Flip None */
343 break;
344 }
345
346 val &= ~ROT_CONTROL_ROT_MASK;
347
348 switch (degree) {
349 case EXYNOS_DRM_DEGREE_90:
350 val |= ROT_CONTROL_ROT_90;
351 break;
352 case EXYNOS_DRM_DEGREE_180:
353 val |= ROT_CONTROL_ROT_180;
354 break;
355 case EXYNOS_DRM_DEGREE_270:
356 val |= ROT_CONTROL_ROT_270;
357 break;
358 default:
359 /* Rotation 0 Degree */
360 break;
361 }
362
363 rot_write(val, ROT_CONTROL);
364
365 /* Check degree for setting buffer size swap */
366 if ((degree == EXYNOS_DRM_DEGREE_90) ||
367 (degree == EXYNOS_DRM_DEGREE_270))
368 *swap = true;
369 else
370 *swap = false;
371
372 return 0;
373}
374
375static int rotator_dst_set_size(struct device *dev, int swap,
376 struct drm_exynos_pos *pos,
377 struct drm_exynos_sz *sz)
378{
379 struct rot_context *rot = dev_get_drvdata(dev);
380 u32 val, fmt, hsize, vsize;
381
382 /* Get format */
383 fmt = rotator_reg_get_fmt(rot);
384 if (!rotator_check_reg_fmt(fmt)) {
cbc4c33d 385 DRM_ERROR("invalid format.\n");
bea8a429
EK		 386 return -EINVAL;
387 }
388
389 /* Align buffer size */
390 hsize = sz->hsize;
391 vsize = sz->vsize;
392 rotator_align_size(rot, fmt, &hsize, &vsize);
393
394 /* Set buffer size configuration */
395 val = ROT_SET_BUF_SIZE_H(vsize) | ROT_SET_BUF_SIZE_W(hsize);
396 rot_write(val, ROT_DST_BUF_SIZE);
397
398 /* Set crop image position configuration */
399 val = ROT_CROP_POS_Y(pos->y) | ROT_CROP_POS_X(pos->x);
400 rot_write(val, ROT_DST_CROP_POS);
401
402 return 0;
403}
404
405static int rotator_dst_set_addr(struct device *dev,
406 struct drm_exynos_ipp_buf_info *buf_info,
407 u32 buf_id, enum drm_exynos_ipp_buf_type buf_type)
408{
409 struct rot_context *rot = dev_get_drvdata(dev);
410 dma_addr_t addr[EXYNOS_DRM_PLANAR_MAX];
411 u32 val, fmt, hsize, vsize;
412 int i;
413
414 /* Set current buf_id */
415 rot->cur_buf_id[EXYNOS_DRM_OPS_DST] = buf_id;
416
417 switch (buf_type) {
418 case IPP_BUF_ENQUEUE:
419 /* Set address configuration */
420 for_each_ipp_planar(i)
421 addr[i] = buf_info->base[i];
422
423 /* Get format */
424 fmt = rotator_reg_get_fmt(rot);
425 if (!rotator_check_reg_fmt(fmt)) {
cbc4c33d 426 DRM_ERROR("invalid format.\n");
bea8a429
EK		 427 return -EINVAL;
428 }
429
430 /* Re-set cb planar for NV12 format */
431 if ((fmt == ROT_CONTROL_FMT_YCBCR420_2P) &&
432 !addr[EXYNOS_DRM_PLANAR_CB]) {
433 /* Get buf size */
434 val = rot_read(ROT_DST_BUF_SIZE);
435
436 hsize = ROT_GET_BUF_SIZE_W(val);
437 vsize = ROT_GET_BUF_SIZE_H(val);
438
439 /* Set cb planar */
440 addr[EXYNOS_DRM_PLANAR_CB] =
441 addr[EXYNOS_DRM_PLANAR_Y] + hsize * vsize;
442 }
443
444 for_each_ipp_planar(i)
445 rot_write(addr[i], ROT_DST_BUF_ADDR(i));
446 break;
447 case IPP_BUF_DEQUEUE:
448 for_each_ipp_planar(i)
449 rot_write(0x0, ROT_DST_BUF_ADDR(i));
450 break;
451 default:
452 /* Nothing to do */
453 break;
454 }
455
456 return 0;
457}
458
459static struct exynos_drm_ipp_ops rot_src_ops = {
460 .set_fmt = rotator_src_set_fmt,
461 .set_size = rotator_src_set_size,
462 .set_addr = rotator_src_set_addr,
463};
464
465static struct exynos_drm_ipp_ops rot_dst_ops = {
466 .set_transf = rotator_dst_set_transf,
467 .set_size = rotator_dst_set_size,
468 .set_addr = rotator_dst_set_addr,
469};
470
471static int rotator_init_prop_list(struct exynos_drm_ippdrv *ippdrv)
472{
473 struct drm_exynos_ipp_prop_list *prop_list;
474
bea8a429 475 prop_list = devm_kzalloc(ippdrv->dev, sizeof(*prop_list), GFP_KERNEL);
38bb5253 476 if (!prop_list)
bea8a429 477 return -ENOMEM;
bea8a429
EK		 478
479 prop_list->version = 1;
480 prop_list->flip = (1 << EXYNOS_DRM_FLIP_VERTICAL) |
481 (1 << EXYNOS_DRM_FLIP_HORIZONTAL);
482 prop_list->degree = (1 << EXYNOS_DRM_DEGREE_0) |
483 (1 << EXYNOS_DRM_DEGREE_90) |
484 (1 << EXYNOS_DRM_DEGREE_180) |
485 (1 << EXYNOS_DRM_DEGREE_270);
486 prop_list->csc = 0;
487 prop_list->crop = 0;
488 prop_list->scale = 0;
489
490 ippdrv->prop_list = prop_list;
491
492 return 0;
493}
494
495static inline bool rotator_check_drm_fmt(u32 fmt)
496{
497 switch (fmt) {
498 case DRM_FORMAT_XRGB8888:
499 case DRM_FORMAT_NV12:
500 return true;
501 default:
cbc4c33d 502 DRM_DEBUG_KMS("not support format\n");
bea8a429
EK		 503 return false;
504 }
505}
506
507static inline bool rotator_check_drm_flip(enum drm_exynos_flip flip)
508{
509 switch (flip) {
510 case EXYNOS_DRM_FLIP_NONE:
511 case EXYNOS_DRM_FLIP_VERTICAL:
512 case EXYNOS_DRM_FLIP_HORIZONTAL:
4f21877c 513 case EXYNOS_DRM_FLIP_BOTH:
bea8a429
EK		 514 return true;
515 default:
cbc4c33d 516 DRM_DEBUG_KMS("invalid flip\n");
bea8a429
EK		 517 return false;
518 }
519}
520
521static int rotator_ippdrv_check_property(struct device *dev,
522 struct drm_exynos_ipp_property *property)
523{
524 struct drm_exynos_ipp_config *src_config =
525 &property->config[EXYNOS_DRM_OPS_SRC];
526 struct drm_exynos_ipp_config *dst_config =
527 &property->config[EXYNOS_DRM_OPS_DST];
528 struct drm_exynos_pos *src_pos = &src_config->pos;
529 struct drm_exynos_pos *dst_pos = &dst_config->pos;
530 struct drm_exynos_sz *src_sz = &src_config->sz;
531 struct drm_exynos_sz *dst_sz = &dst_config->sz;
532 bool swap = false;
533
534 /* Check format configuration */
535 if (src_config->fmt != dst_config->fmt) {
cbc4c33d 536 DRM_DEBUG_KMS("not support csc feature\n");
bea8a429
EK		 537 return -EINVAL;
538 }
539
540 if (!rotator_check_drm_fmt(dst_config->fmt)) {
cbc4c33d 541 DRM_DEBUG_KMS("invalid format\n");
bea8a429
EK		 542 return -EINVAL;
543 }
544
545 /* Check transform configuration */
546 if (src_config->degree != EXYNOS_DRM_DEGREE_0) {
cbc4c33d 547 DRM_DEBUG_KMS("not support source-side rotation\n");
bea8a429
EK		 548 return -EINVAL;
549 }
550
551 switch (dst_config->degree) {
552 case EXYNOS_DRM_DEGREE_90:
553 case EXYNOS_DRM_DEGREE_270:
554 swap = true;
555 case EXYNOS_DRM_DEGREE_0:
556 case EXYNOS_DRM_DEGREE_180:
557 /* No problem */
558 break;
559 default:
cbc4c33d 560 DRM_DEBUG_KMS("invalid degree\n");
bea8a429
EK		 561 return -EINVAL;
562 }
563
564 if (src_config->flip != EXYNOS_DRM_FLIP_NONE) {
cbc4c33d 565 DRM_DEBUG_KMS("not support source-side flip\n");
bea8a429
EK		 566 return -EINVAL;
567 }
568
569 if (!rotator_check_drm_flip(dst_config->flip)) {
cbc4c33d 570 DRM_DEBUG_KMS("invalid flip\n");
bea8a429
EK		 571 return -EINVAL;
572 }
573
574 /* Check size configuration */
575 if ((src_pos->x + src_pos->w > src_sz->hsize) ||
576 (src_pos->y + src_pos->h > src_sz->vsize)) {
cbc4c33d 577 DRM_DEBUG_KMS("out of source buffer bound\n");
bea8a429
EK		 578 return -EINVAL;
579 }
580
581 if (swap) {
582 if ((dst_pos->x + dst_pos->h > dst_sz->vsize) ||
583 (dst_pos->y + dst_pos->w > dst_sz->hsize)) {
cbc4c33d 584 DRM_DEBUG_KMS("out of destination buffer bound\n");
bea8a429
EK		 585 return -EINVAL;
586 }
587
588 if ((src_pos->w != dst_pos->h) || (src_pos->h != dst_pos->w)) {
cbc4c33d 589 DRM_DEBUG_KMS("not support scale feature\n");
bea8a429
EK		 590 return -EINVAL;
591 }
592 } else {
593 if ((dst_pos->x + dst_pos->w > dst_sz->hsize) ||
594 (dst_pos->y + dst_pos->h > dst_sz->vsize)) {
cbc4c33d 595 DRM_DEBUG_KMS("out of destination buffer bound\n");
bea8a429
EK		 596 return -EINVAL;
597 }
598
599 if ((src_pos->w != dst_pos->w) || (src_pos->h != dst_pos->h)) {
cbc4c33d 600 DRM_DEBUG_KMS("not support scale feature\n");
bea8a429
EK		 601 return -EINVAL;
602 }
603 }
604
605 return 0;
606}
607
608static int rotator_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
609{
610 struct rot_context *rot = dev_get_drvdata(dev);
611 u32 val;
612
613 if (rot->suspended) {
614 DRM_ERROR("suspended state\n");
615 return -EPERM;
616 }
617
618 if (cmd != IPP_CMD_M2M) {
619 DRM_ERROR("not support cmd: %d\n", cmd);
620 return -EINVAL;
621 }
622
623 /* Set interrupt enable */
624 rotator_reg_set_irq(rot, true);
625
626 val = rot_read(ROT_CONTROL);
627 val |= ROT_CONTROL_START;
628
629 rot_write(val, ROT_CONTROL);
630
631 return 0;
632}
633
319477f3
CP		 634static struct rot_limit_table rot_limit_tbl_4210 = {
635 .ycbcr420_2p = {
636 .min_w = 32,
637 .min_h = 32,
638 .max_w = SZ_64K,
639 .max_h = SZ_64K,
640 .align = 3,
641 },
642 .rgb888 = {
643 .min_w = 8,
644 .min_h = 8,
645 .max_w = SZ_16K,
646 .max_h = SZ_16K,
647 .align = 2,
648 },
649};
650
651static struct rot_limit_table rot_limit_tbl_4x12 = {
652 .ycbcr420_2p = {
653 .min_w = 32,
654 .min_h = 32,
655 .max_w = SZ_32K,
656 .max_h = SZ_32K,
657 .align = 3,
658 },
659 .rgb888 = {
660 .min_w = 8,
661 .min_h = 8,
662 .max_w = SZ_8K,
663 .max_h = SZ_8K,
664 .align = 2,
665 },
666};
667
668static struct rot_limit_table rot_limit_tbl_5250 = {
669 .ycbcr420_2p = {
670 .min_w = 32,
671 .min_h = 32,
672 .max_w = SZ_32K,
673 .max_h = SZ_32K,
674 .align = 3,
675 },
676 .rgb888 = {
677 .min_w = 8,
678 .min_h = 8,
679 .max_w = SZ_8K,
680 .max_h = SZ_8K,
681 .align = 1,
682 },
683};
684
685static const struct of_device_id exynos_rotator_match[] = {
686 {
687 .compatible = "samsung,exynos4210-rotator",
688 .data = &rot_limit_tbl_4210,
689 },
690 {
691 .compatible = "samsung,exynos4212-rotator",
692 .data = &rot_limit_tbl_4x12,
693 },
694 {
695 .compatible = "samsung,exynos5250-rotator",
696 .data = &rot_limit_tbl_5250,
697 },
698 {},
699};
700
56550d94 701static int rotator_probe(struct platform_device *pdev)
bea8a429
EK		 702{
703 struct device *dev = &pdev->dev;
704 struct rot_context *rot;
705 struct exynos_drm_ippdrv *ippdrv;
319477f3 706 const struct of_device_id *match;
bea8a429
EK		 707 int ret;
708
319477f3
CP		 709 if (!dev->of_node) {
710 dev_err(dev, "cannot find of_node.\n");
711 return -ENODEV;
712 }
713
bea8a429 714 rot = devm_kzalloc(dev, sizeof(*rot), GFP_KERNEL);
38bb5253 715 if (!rot)
bea8a429 716 return -ENOMEM;
bea8a429 717
319477f3
CP		 718 match = of_match_node(exynos_rotator_match, dev->of_node);
719 if (!match) {
720 dev_err(dev, "failed to match node\n");
721 return -ENODEV;
722 }
723 rot->limit_tbl = (struct rot_limit_table *)match->data;
bea8a429
EK		 724
725 rot->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
d4ed6025
TR		 726 rot->regs = devm_ioremap_resource(dev, rot->regs_res);
727 if (IS_ERR(rot->regs))
728 return PTR_ERR(rot->regs);
bea8a429
EK		 729
730 rot->irq = platform_get_irq(pdev, 0);
731 if (rot->irq < 0) {
732 dev_err(dev, "failed to get irq\n");
6eac74d1 733 return rot->irq;
bea8a429
EK		 734 }
735
dcb9a7c7
SWK		 736 ret = devm_request_threaded_irq(dev, rot->irq, NULL,
737 rotator_irq_handler, IRQF_ONESHOT, "drm_rotator", rot);
bea8a429
EK		 738 if (ret < 0) {
739 dev_err(dev, "failed to request irq\n");
6eac74d1 740 return ret;
bea8a429
EK		 741 }
742
af8cd946 743 rot->clock = devm_clk_get(dev, "rotator");
d8e9ca45 744 if (IS_ERR(rot->clock)) {
bea8a429 745 dev_err(dev, "failed to get clock\n");
dcb9a7c7 746 return PTR_ERR(rot->clock);
bea8a429
EK		 747 }
748
749 pm_runtime_enable(dev);
750
751 ippdrv = &rot->ippdrv;
752 ippdrv->dev = dev;
753 ippdrv->ops[EXYNOS_DRM_OPS_SRC] = &rot_src_ops;
754 ippdrv->ops[EXYNOS_DRM_OPS_DST] = &rot_dst_ops;
755 ippdrv->check_property = rotator_ippdrv_check_property;
756 ippdrv->start = rotator_ippdrv_start;
757 ret = rotator_init_prop_list(ippdrv);
758 if (ret < 0) {
759 dev_err(dev, "failed to init property list.\n");
760 goto err_ippdrv_register;
761 }
762
cbc4c33d 763 DRM_DEBUG_KMS("ippdrv[0x%x]\n", (int)ippdrv);
bea8a429
EK		 764
765 platform_set_drvdata(pdev, rot);
766
767 ret = exynos_drm_ippdrv_register(ippdrv);
768 if (ret < 0) {
769 dev_err(dev, "failed to register drm rotator device\n");
770 goto err_ippdrv_register;
771 }
772
773 dev_info(dev, "The exynos rotator is probed successfully\n");
774
775 return 0;
776
777err_ippdrv_register:
bea8a429 778 pm_runtime_disable(dev);
bea8a429
EK		 779 return ret;
780}
781
56550d94 782static int rotator_remove(struct platform_device *pdev)
bea8a429
EK		 783{
784 struct device *dev = &pdev->dev;
785 struct rot_context *rot = dev_get_drvdata(dev);
786 struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv;
787
bea8a429
EK		 788 exynos_drm_ippdrv_unregister(ippdrv);
789
790 pm_runtime_disable(dev);
bea8a429 791
bea8a429
EK		 792 return 0;
793}
794
bea8a429
EK		 795static int rotator_clk_crtl(struct rot_context *rot, bool enable)
796{
bea8a429
EK		 797 if (enable) {
798 clk_enable(rot->clock);
799 rot->suspended = false;
800 } else {
801 clk_disable(rot->clock);
802 rot->suspended = true;
803 }
804
805 return 0;
806}
807
808
809#ifdef CONFIG_PM_SLEEP
810static int rotator_suspend(struct device *dev)
811{
812 struct rot_context *rot = dev_get_drvdata(dev);
813
bea8a429
EK		 814 if (pm_runtime_suspended(dev))
815 return 0;
816
817 return rotator_clk_crtl(rot, false);
818}
819
820static int rotator_resume(struct device *dev)
821{
822 struct rot_context *rot = dev_get_drvdata(dev);
823
bea8a429
EK		 824 if (!pm_runtime_suspended(dev))
825 return rotator_clk_crtl(rot, true);
826
827 return 0;
828}
829#endif
830
831#ifdef CONFIG_PM_RUNTIME
832static int rotator_runtime_suspend(struct device *dev)
833{
834 struct rot_context *rot = dev_get_drvdata(dev);
835
bea8a429
EK		 836 return rotator_clk_crtl(rot, false);
837}
838
839static int rotator_runtime_resume(struct device *dev)
840{
841 struct rot_context *rot = dev_get_drvdata(dev);
842
bea8a429
EK		 843 return rotator_clk_crtl(rot, true);
844}
845#endif
846
847static const struct dev_pm_ops rotator_pm_ops = {
848 SET_SYSTEM_SLEEP_PM_OPS(rotator_suspend, rotator_resume)
849 SET_RUNTIME_PM_OPS(rotator_runtime_suspend, rotator_runtime_resume,
850 NULL)
851};
852
853struct platform_driver rotator_driver = {
854 .probe = rotator_probe,
56550d94 855 .remove = rotator_remove,
bea8a429
EK		 856 .driver = {
857 .name = "exynos-rot",
858 .owner = THIS_MODULE,
859 .pm = &rotator_pm_ops,
319477f3 860 .of_match_table = exynos_rotator_match,
bea8a429
EK		 861 },
862};
Linux kernel - Deliverables
This page took 0.142099 seconds and 5 git commands to generate.