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6a227d5f AC |
1 | /* |
2 | * Copyright © 2006-2011 Intel Corporation | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program; if not, write to the Free Software Foundation, Inc., | |
15 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
16 | * | |
17 | * Authors: | |
18 | * Eric Anholt <eric@anholt.net> | |
19 | * Dave Airlie <airlied@linux.ie> | |
20 | * Jesse Barnes <jesse.barnes@intel.com> | |
21 | */ | |
22 | ||
23 | #include <linux/i2c.h> | |
24 | #include <linux/dmi.h> | |
25 | #include <drm/drmP.h> | |
26 | ||
27 | #include "intel_bios.h" | |
28 | #include "psb_drv.h" | |
29 | #include "psb_intel_drv.h" | |
30 | #include "psb_intel_reg.h" | |
31 | #include "power.h" | |
32 | #include <linux/pm_runtime.h> | |
33 | #include "cdv_device.h" | |
34 | ||
35 | /** | |
36 | * LVDS I2C backlight control macros | |
37 | */ | |
38 | #define BRIGHTNESS_MAX_LEVEL 100 | |
39 | #define BRIGHTNESS_MASK 0xFF | |
40 | #define BLC_I2C_TYPE 0x01 | |
41 | #define BLC_PWM_TYPT 0x02 | |
42 | ||
43 | #define BLC_POLARITY_NORMAL 0 | |
44 | #define BLC_POLARITY_INVERSE 1 | |
45 | ||
46 | #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE) | |
47 | #define PSB_BLC_MIN_PWM_REG_FREQ (0x2) | |
48 | #define PSB_BLC_PWM_PRECISION_FACTOR (10) | |
49 | #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16) | |
50 | #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) | |
51 | ||
52 | struct cdv_intel_lvds_priv { | |
53 | /** | |
54 | * Saved LVDO output states | |
55 | */ | |
56 | uint32_t savePP_ON; | |
57 | uint32_t savePP_OFF; | |
58 | uint32_t saveLVDS; | |
59 | uint32_t savePP_CONTROL; | |
60 | uint32_t savePP_CYCLE; | |
61 | uint32_t savePFIT_CONTROL; | |
62 | uint32_t savePFIT_PGM_RATIOS; | |
63 | uint32_t saveBLC_PWM_CTL; | |
64 | }; | |
65 | ||
66 | /* | |
67 | * Returns the maximum level of the backlight duty cycle field. | |
68 | */ | |
69 | static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev) | |
70 | { | |
71 | struct drm_psb_private *dev_priv = dev->dev_private; | |
72 | u32 retval; | |
73 | ||
74 | if (gma_power_begin(dev, false)) { | |
75 | retval = ((REG_READ(BLC_PWM_CTL) & | |
76 | BACKLIGHT_MODULATION_FREQ_MASK) >> | |
77 | BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; | |
78 | ||
79 | gma_power_end(dev); | |
80 | } else | |
648a8e34 | 81 | retval = ((dev_priv->regs.saveBLC_PWM_CTL & |
6a227d5f AC |
82 | BACKLIGHT_MODULATION_FREQ_MASK) >> |
83 | BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; | |
84 | ||
85 | return retval; | |
86 | } | |
87 | ||
062d054e | 88 | #if 0 |
6a227d5f AC |
89 | /* |
90 | * Set LVDS backlight level by I2C command | |
91 | */ | |
92 | static int cdv_lvds_i2c_set_brightness(struct drm_device *dev, | |
93 | unsigned int level) | |
94 | { | |
95 | struct drm_psb_private *dev_priv = dev->dev_private; | |
96 | struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus; | |
97 | u8 out_buf[2]; | |
98 | unsigned int blc_i2c_brightness; | |
99 | ||
100 | struct i2c_msg msgs[] = { | |
101 | { | |
102 | .addr = lvds_i2c_bus->slave_addr, | |
103 | .flags = 0, | |
104 | .len = 2, | |
105 | .buf = out_buf, | |
106 | } | |
107 | }; | |
108 | ||
109 | blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level * | |
110 | BRIGHTNESS_MASK / | |
111 | BRIGHTNESS_MAX_LEVEL); | |
112 | ||
113 | if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) | |
114 | blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness; | |
115 | ||
116 | out_buf[0] = dev_priv->lvds_bl->brightnesscmd; | |
117 | out_buf[1] = (u8)blc_i2c_brightness; | |
118 | ||
119 | if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) | |
120 | return 0; | |
121 | ||
122 | DRM_ERROR("I2C transfer error\n"); | |
123 | return -1; | |
124 | } | |
125 | ||
126 | ||
127 | static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level) | |
128 | { | |
129 | struct drm_psb_private *dev_priv = dev->dev_private; | |
130 | ||
131 | u32 max_pwm_blc; | |
132 | u32 blc_pwm_duty_cycle; | |
133 | ||
134 | max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev); | |
135 | ||
136 | /*BLC_PWM_CTL Should be initiated while backlight device init*/ | |
137 | BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0); | |
138 | ||
139 | blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL; | |
140 | ||
141 | if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) | |
142 | blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle; | |
143 | ||
144 | blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR; | |
145 | REG_WRITE(BLC_PWM_CTL, | |
146 | (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) | | |
147 | (blc_pwm_duty_cycle)); | |
148 | ||
149 | return 0; | |
150 | } | |
151 | ||
152 | /* | |
153 | * Set LVDS backlight level either by I2C or PWM | |
154 | */ | |
155 | void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level) | |
156 | { | |
157 | struct drm_psb_private *dev_priv = dev->dev_private; | |
158 | ||
159 | if (!dev_priv->lvds_bl) { | |
160 | DRM_ERROR("NO LVDS Backlight Info\n"); | |
161 | return; | |
162 | } | |
163 | ||
164 | if (dev_priv->lvds_bl->type == BLC_I2C_TYPE) | |
165 | cdv_lvds_i2c_set_brightness(dev, level); | |
166 | else | |
167 | cdv_lvds_pwm_set_brightness(dev, level); | |
168 | } | |
062d054e | 169 | #endif |
6a227d5f AC |
170 | |
171 | /** | |
172 | * Sets the backlight level. | |
173 | * | |
174 | * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight(). | |
175 | */ | |
176 | static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level) | |
177 | { | |
178 | struct drm_psb_private *dev_priv = dev->dev_private; | |
179 | u32 blc_pwm_ctl; | |
180 | ||
181 | if (gma_power_begin(dev, false)) { | |
182 | blc_pwm_ctl = | |
183 | REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
184 | REG_WRITE(BLC_PWM_CTL, | |
185 | (blc_pwm_ctl | | |
186 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); | |
187 | gma_power_end(dev); | |
188 | } else { | |
648a8e34 | 189 | blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL & |
6a227d5f | 190 | ~BACKLIGHT_DUTY_CYCLE_MASK; |
648a8e34 | 191 | dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | |
6a227d5f AC |
192 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); |
193 | } | |
194 | } | |
195 | ||
196 | /** | |
197 | * Sets the power state for the panel. | |
198 | */ | |
199 | static void cdv_intel_lvds_set_power(struct drm_device *dev, | |
a12d6a07 | 200 | struct drm_encoder *encoder, bool on) |
6a227d5f | 201 | { |
a12d6a07 | 202 | struct drm_psb_private *dev_priv = dev->dev_private; |
6a227d5f AC |
203 | u32 pp_status; |
204 | ||
205 | if (!gma_power_begin(dev, true)) | |
206 | return; | |
207 | ||
208 | if (on) { | |
209 | REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | | |
210 | POWER_TARGET_ON); | |
211 | do { | |
212 | pp_status = REG_READ(PP_STATUS); | |
213 | } while ((pp_status & PP_ON) == 0); | |
214 | ||
215 | cdv_intel_lvds_set_backlight(dev, | |
a12d6a07 | 216 | dev_priv->mode_dev.backlight_duty_cycle); |
6a227d5f AC |
217 | } else { |
218 | cdv_intel_lvds_set_backlight(dev, 0); | |
219 | ||
220 | REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & | |
221 | ~POWER_TARGET_ON); | |
222 | do { | |
223 | pp_status = REG_READ(PP_STATUS); | |
224 | } while (pp_status & PP_ON); | |
225 | } | |
226 | gma_power_end(dev); | |
227 | } | |
228 | ||
229 | static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode) | |
230 | { | |
231 | struct drm_device *dev = encoder->dev; | |
6a227d5f | 232 | if (mode == DRM_MODE_DPMS_ON) |
a12d6a07 | 233 | cdv_intel_lvds_set_power(dev, encoder, true); |
6a227d5f | 234 | else |
a12d6a07 | 235 | cdv_intel_lvds_set_power(dev, encoder, false); |
6a227d5f AC |
236 | /* XXX: We never power down the LVDS pairs. */ |
237 | } | |
238 | ||
239 | static void cdv_intel_lvds_save(struct drm_connector *connector) | |
240 | { | |
241 | } | |
242 | ||
243 | static void cdv_intel_lvds_restore(struct drm_connector *connector) | |
244 | { | |
245 | } | |
246 | ||
bc11da70 | 247 | static int cdv_intel_lvds_mode_valid(struct drm_connector *connector, |
a12d6a07 | 248 | struct drm_display_mode *mode) |
6a227d5f | 249 | { |
a12d6a07 PJ |
250 | struct drm_device *dev = connector->dev; |
251 | struct drm_psb_private *dev_priv = dev->dev_private; | |
6a227d5f | 252 | struct drm_display_mode *fixed_mode = |
a12d6a07 | 253 | dev_priv->mode_dev.panel_fixed_mode; |
6a227d5f AC |
254 | |
255 | /* just in case */ | |
256 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
257 | return MODE_NO_DBLESCAN; | |
258 | ||
259 | /* just in case */ | |
260 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) | |
261 | return MODE_NO_INTERLACE; | |
262 | ||
263 | if (fixed_mode) { | |
264 | if (mode->hdisplay > fixed_mode->hdisplay) | |
265 | return MODE_PANEL; | |
266 | if (mode->vdisplay > fixed_mode->vdisplay) | |
267 | return MODE_PANEL; | |
268 | } | |
269 | return MODE_OK; | |
270 | } | |
271 | ||
bc11da70 | 272 | static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder, |
e811f5ae | 273 | const struct drm_display_mode *mode, |
6a227d5f AC |
274 | struct drm_display_mode *adjusted_mode) |
275 | { | |
6a227d5f | 276 | struct drm_device *dev = encoder->dev; |
a12d6a07 PJ |
277 | struct drm_psb_private *dev_priv = dev->dev_private; |
278 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; | |
6a227d5f AC |
279 | struct drm_encoder *tmp_encoder; |
280 | struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode; | |
281 | ||
282 | /* Should never happen!! */ | |
283 | list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, | |
284 | head) { | |
285 | if (tmp_encoder != encoder | |
286 | && tmp_encoder->crtc == encoder->crtc) { | |
287 | printk(KERN_ERR "Can't enable LVDS and another " | |
288 | "encoder on the same pipe\n"); | |
289 | return false; | |
290 | } | |
291 | } | |
292 | ||
293 | /* | |
294 | * If we have timings from the BIOS for the panel, put them in | |
295 | * to the adjusted mode. The CRTC will be set up for this mode, | |
296 | * with the panel scaling set up to source from the H/VDisplay | |
297 | * of the original mode. | |
298 | */ | |
299 | if (panel_fixed_mode != NULL) { | |
300 | adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; | |
301 | adjusted_mode->hsync_start = panel_fixed_mode->hsync_start; | |
302 | adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; | |
303 | adjusted_mode->htotal = panel_fixed_mode->htotal; | |
304 | adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; | |
305 | adjusted_mode->vsync_start = panel_fixed_mode->vsync_start; | |
306 | adjusted_mode->vsync_end = panel_fixed_mode->vsync_end; | |
307 | adjusted_mode->vtotal = panel_fixed_mode->vtotal; | |
308 | adjusted_mode->clock = panel_fixed_mode->clock; | |
309 | drm_mode_set_crtcinfo(adjusted_mode, | |
310 | CRTC_INTERLACE_HALVE_V); | |
311 | } | |
312 | ||
313 | /* | |
314 | * XXX: It would be nice to support lower refresh rates on the | |
315 | * panels to reduce power consumption, and perhaps match the | |
316 | * user's requested refresh rate. | |
317 | */ | |
318 | ||
319 | return true; | |
320 | } | |
321 | ||
322 | static void cdv_intel_lvds_prepare(struct drm_encoder *encoder) | |
323 | { | |
324 | struct drm_device *dev = encoder->dev; | |
a12d6a07 PJ |
325 | struct drm_psb_private *dev_priv = dev->dev_private; |
326 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; | |
6a227d5f AC |
327 | |
328 | if (!gma_power_begin(dev, true)) | |
329 | return; | |
330 | ||
331 | mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); | |
332 | mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL & | |
333 | BACKLIGHT_DUTY_CYCLE_MASK); | |
334 | ||
a12d6a07 | 335 | cdv_intel_lvds_set_power(dev, encoder, false); |
6a227d5f AC |
336 | |
337 | gma_power_end(dev); | |
338 | } | |
339 | ||
340 | static void cdv_intel_lvds_commit(struct drm_encoder *encoder) | |
341 | { | |
342 | struct drm_device *dev = encoder->dev; | |
a12d6a07 PJ |
343 | struct drm_psb_private *dev_priv = dev->dev_private; |
344 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; | |
6a227d5f AC |
345 | |
346 | if (mode_dev->backlight_duty_cycle == 0) | |
347 | mode_dev->backlight_duty_cycle = | |
348 | cdv_intel_lvds_get_max_backlight(dev); | |
349 | ||
a12d6a07 | 350 | cdv_intel_lvds_set_power(dev, encoder, true); |
6a227d5f AC |
351 | } |
352 | ||
353 | static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder, | |
354 | struct drm_display_mode *mode, | |
355 | struct drm_display_mode *adjusted_mode) | |
356 | { | |
357 | struct drm_device *dev = encoder->dev; | |
358 | struct drm_psb_private *dev_priv = dev->dev_private; | |
6306865d | 359 | struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); |
6a227d5f AC |
360 | u32 pfit_control; |
361 | ||
362 | /* | |
363 | * The LVDS pin pair will already have been turned on in the | |
364 | * cdv_intel_crtc_mode_set since it has a large impact on the DPLL | |
365 | * settings. | |
366 | */ | |
367 | ||
368 | /* | |
369 | * Enable automatic panel scaling so that non-native modes fill the | |
370 | * screen. Should be enabled before the pipe is enabled, according to | |
371 | * register description and PRM. | |
372 | */ | |
373 | if (mode->hdisplay != adjusted_mode->hdisplay || | |
374 | mode->vdisplay != adjusted_mode->vdisplay) | |
375 | pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | | |
376 | HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR | | |
377 | HORIZ_INTERP_BILINEAR); | |
378 | else | |
379 | pfit_control = 0; | |
380 | ||
6306865d | 381 | pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; |
d235e64a | 382 | |
6a227d5f AC |
383 | if (dev_priv->lvds_dither) |
384 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
385 | ||
386 | REG_WRITE(PFIT_CONTROL, pfit_control); | |
387 | } | |
388 | ||
389 | /** | |
390 | * Detect the LVDS connection. | |
391 | * | |
392 | * This always returns CONNECTOR_STATUS_CONNECTED. | |
393 | * This connector should only have | |
394 | * been set up if the LVDS was actually connected anyway. | |
395 | */ | |
396 | static enum drm_connector_status cdv_intel_lvds_detect( | |
397 | struct drm_connector *connector, bool force) | |
398 | { | |
399 | return connector_status_connected; | |
400 | } | |
401 | ||
402 | /** | |
403 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. | |
404 | */ | |
405 | static int cdv_intel_lvds_get_modes(struct drm_connector *connector) | |
406 | { | |
407 | struct drm_device *dev = connector->dev; | |
a12d6a07 | 408 | struct drm_psb_private *dev_priv = dev->dev_private; |
367e4408 | 409 | struct gma_encoder *gma_encoder = gma_attached_encoder(connector); |
a12d6a07 | 410 | struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; |
6a227d5f AC |
411 | int ret; |
412 | ||
367e4408 | 413 | ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter); |
6a227d5f AC |
414 | |
415 | if (ret) | |
416 | return ret; | |
417 | ||
418 | /* Didn't get an EDID, so | |
419 | * Set wide sync ranges so we get all modes | |
420 | * handed to valid_mode for checking | |
421 | */ | |
422 | connector->display_info.min_vfreq = 0; | |
423 | connector->display_info.max_vfreq = 200; | |
424 | connector->display_info.min_hfreq = 0; | |
425 | connector->display_info.max_hfreq = 200; | |
426 | if (mode_dev->panel_fixed_mode != NULL) { | |
427 | struct drm_display_mode *mode = | |
428 | drm_mode_duplicate(dev, mode_dev->panel_fixed_mode); | |
429 | drm_mode_probed_add(connector, mode); | |
430 | return 1; | |
431 | } | |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | /** | |
437 | * cdv_intel_lvds_destroy - unregister and free LVDS structures | |
438 | * @connector: connector to free | |
439 | * | |
440 | * Unregister the DDC bus for this connector then free the driver private | |
441 | * structure. | |
442 | */ | |
bc11da70 | 443 | static void cdv_intel_lvds_destroy(struct drm_connector *connector) |
6a227d5f | 444 | { |
367e4408 | 445 | struct gma_encoder *gma_encoder = gma_attached_encoder(connector); |
6a227d5f | 446 | |
367e4408 PJ |
447 | if (gma_encoder->i2c_bus) |
448 | psb_intel_i2c_destroy(gma_encoder->i2c_bus); | |
34ea3d38 | 449 | drm_connector_unregister(connector); |
6a227d5f AC |
450 | drm_connector_cleanup(connector); |
451 | kfree(connector); | |
452 | } | |
453 | ||
bc11da70 | 454 | static int cdv_intel_lvds_set_property(struct drm_connector *connector, |
6a227d5f AC |
455 | struct drm_property *property, |
456 | uint64_t value) | |
457 | { | |
458 | struct drm_encoder *encoder = connector->encoder; | |
459 | ||
460 | if (!strcmp(property->name, "scaling mode") && encoder) { | |
6306865d | 461 | struct gma_crtc *crtc = to_gma_crtc(encoder->crtc); |
6a227d5f AC |
462 | uint64_t curValue; |
463 | ||
464 | if (!crtc) | |
465 | return -1; | |
466 | ||
467 | switch (value) { | |
468 | case DRM_MODE_SCALE_FULLSCREEN: | |
469 | break; | |
470 | case DRM_MODE_SCALE_NO_SCALE: | |
471 | break; | |
472 | case DRM_MODE_SCALE_ASPECT: | |
473 | break; | |
474 | default: | |
475 | return -1; | |
476 | } | |
477 | ||
a69ac9ea | 478 | if (drm_object_property_get_value(&connector->base, |
6a227d5f AC |
479 | property, |
480 | &curValue)) | |
481 | return -1; | |
482 | ||
483 | if (curValue == value) | |
484 | return 0; | |
485 | ||
a69ac9ea | 486 | if (drm_object_property_set_value(&connector->base, |
6a227d5f AC |
487 | property, |
488 | value)) | |
489 | return -1; | |
490 | ||
491 | if (crtc->saved_mode.hdisplay != 0 && | |
492 | crtc->saved_mode.vdisplay != 0) { | |
493 | if (!drm_crtc_helper_set_mode(encoder->crtc, | |
494 | &crtc->saved_mode, | |
495 | encoder->crtc->x, | |
496 | encoder->crtc->y, | |
f4510a27 | 497 | encoder->crtc->primary->fb)) |
6a227d5f AC |
498 | return -1; |
499 | } | |
500 | } else if (!strcmp(property->name, "backlight") && encoder) { | |
a69ac9ea | 501 | if (drm_object_property_set_value(&connector->base, |
6a227d5f AC |
502 | property, |
503 | value)) | |
504 | return -1; | |
d112a816 ZY |
505 | else |
506 | gma_backlight_set(encoder->dev, value); | |
6a227d5f AC |
507 | } else if (!strcmp(property->name, "DPMS") && encoder) { |
508 | struct drm_encoder_helper_funcs *helpers = | |
509 | encoder->helper_private; | |
510 | helpers->dpms(encoder, value); | |
511 | } | |
512 | return 0; | |
513 | } | |
514 | ||
515 | static const struct drm_encoder_helper_funcs | |
516 | cdv_intel_lvds_helper_funcs = { | |
517 | .dpms = cdv_intel_lvds_encoder_dpms, | |
518 | .mode_fixup = cdv_intel_lvds_mode_fixup, | |
519 | .prepare = cdv_intel_lvds_prepare, | |
520 | .mode_set = cdv_intel_lvds_mode_set, | |
521 | .commit = cdv_intel_lvds_commit, | |
522 | }; | |
523 | ||
524 | static const struct drm_connector_helper_funcs | |
525 | cdv_intel_lvds_connector_helper_funcs = { | |
526 | .get_modes = cdv_intel_lvds_get_modes, | |
527 | .mode_valid = cdv_intel_lvds_mode_valid, | |
c9d49590 | 528 | .best_encoder = gma_best_encoder, |
6a227d5f AC |
529 | }; |
530 | ||
531 | static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = { | |
532 | .dpms = drm_helper_connector_dpms, | |
533 | .save = cdv_intel_lvds_save, | |
534 | .restore = cdv_intel_lvds_restore, | |
535 | .detect = cdv_intel_lvds_detect, | |
536 | .fill_modes = drm_helper_probe_single_connector_modes, | |
537 | .set_property = cdv_intel_lvds_set_property, | |
538 | .destroy = cdv_intel_lvds_destroy, | |
539 | }; | |
540 | ||
541 | ||
542 | static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder) | |
543 | { | |
544 | drm_encoder_cleanup(encoder); | |
545 | } | |
546 | ||
71ab1bee | 547 | static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = { |
6a227d5f AC |
548 | .destroy = cdv_intel_lvds_enc_destroy, |
549 | }; | |
550 | ||
1b2db4ce AC |
551 | /* |
552 | * Enumerate the child dev array parsed from VBT to check whether | |
553 | * the LVDS is present. | |
554 | * If it is present, return 1. | |
555 | * If it is not present, return false. | |
556 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. | |
557 | */ | |
558 | static bool lvds_is_present_in_vbt(struct drm_device *dev, | |
559 | u8 *i2c_pin) | |
560 | { | |
561 | struct drm_psb_private *dev_priv = dev->dev_private; | |
562 | int i; | |
563 | ||
564 | if (!dev_priv->child_dev_num) | |
565 | return true; | |
566 | ||
567 | for (i = 0; i < dev_priv->child_dev_num; i++) { | |
568 | struct child_device_config *child = dev_priv->child_dev + i; | |
569 | ||
570 | /* If the device type is not LFP, continue. | |
571 | * We have to check both the new identifiers as well as the | |
572 | * old for compatibility with some BIOSes. | |
573 | */ | |
574 | if (child->device_type != DEVICE_TYPE_INT_LFP && | |
575 | child->device_type != DEVICE_TYPE_LFP) | |
576 | continue; | |
577 | ||
578 | if (child->i2c_pin) | |
579 | *i2c_pin = child->i2c_pin; | |
580 | ||
581 | /* However, we cannot trust the BIOS writers to populate | |
582 | * the VBT correctly. Since LVDS requires additional | |
583 | * information from AIM blocks, a non-zero addin offset is | |
584 | * a good indicator that the LVDS is actually present. | |
585 | */ | |
586 | if (child->addin_offset) | |
587 | return true; | |
588 | ||
589 | /* But even then some BIOS writers perform some black magic | |
590 | * and instantiate the device without reference to any | |
591 | * additional data. Trust that if the VBT was written into | |
592 | * the OpRegion then they have validated the LVDS's existence. | |
593 | */ | |
594 | if (dev_priv->opregion.vbt) | |
595 | return true; | |
596 | } | |
597 | ||
598 | return false; | |
599 | } | |
600 | ||
6a227d5f AC |
601 | /** |
602 | * cdv_intel_lvds_init - setup LVDS connectors on this device | |
603 | * @dev: drm device | |
604 | * | |
605 | * Create the connector, register the LVDS DDC bus, and try to figure out what | |
606 | * modes we can display on the LVDS panel (if present). | |
607 | */ | |
608 | void cdv_intel_lvds_init(struct drm_device *dev, | |
609 | struct psb_intel_mode_device *mode_dev) | |
610 | { | |
367e4408 | 611 | struct gma_encoder *gma_encoder; |
a3d5d75f | 612 | struct gma_connector *gma_connector; |
6a227d5f AC |
613 | struct cdv_intel_lvds_priv *lvds_priv; |
614 | struct drm_connector *connector; | |
615 | struct drm_encoder *encoder; | |
616 | struct drm_display_mode *scan; | |
617 | struct drm_crtc *crtc; | |
618 | struct drm_psb_private *dev_priv = dev->dev_private; | |
619 | u32 lvds; | |
620 | int pipe; | |
1b2db4ce AC |
621 | u8 pin; |
622 | ||
623 | pin = GMBUS_PORT_PANEL; | |
624 | if (!lvds_is_present_in_vbt(dev, &pin)) { | |
625 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); | |
626 | return; | |
627 | } | |
6a227d5f | 628 | |
367e4408 | 629 | gma_encoder = kzalloc(sizeof(struct gma_encoder), |
a12d6a07 | 630 | GFP_KERNEL); |
367e4408 | 631 | if (!gma_encoder) |
6a227d5f AC |
632 | return; |
633 | ||
a3d5d75f | 634 | gma_connector = kzalloc(sizeof(struct gma_connector), |
a12d6a07 | 635 | GFP_KERNEL); |
a3d5d75f | 636 | if (!gma_connector) |
a12d6a07 | 637 | goto failed_connector; |
6a227d5f | 638 | |
a12d6a07 PJ |
639 | lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL); |
640 | if (!lvds_priv) | |
641 | goto failed_lvds_priv; | |
6a227d5f | 642 | |
367e4408 | 643 | gma_encoder->dev_priv = lvds_priv; |
6a227d5f | 644 | |
a3d5d75f | 645 | connector = &gma_connector->base; |
367e4408 | 646 | encoder = &gma_encoder->base; |
6a227d5f | 647 | |
a12d6a07 PJ |
648 | |
649 | drm_connector_init(dev, connector, | |
6a227d5f AC |
650 | &cdv_intel_lvds_connector_funcs, |
651 | DRM_MODE_CONNECTOR_LVDS); | |
652 | ||
a12d6a07 | 653 | drm_encoder_init(dev, encoder, |
6a227d5f AC |
654 | &cdv_intel_lvds_enc_funcs, |
655 | DRM_MODE_ENCODER_LVDS); | |
656 | ||
657 | ||
367e4408 PJ |
658 | gma_connector_attach_encoder(gma_connector, gma_encoder); |
659 | gma_encoder->type = INTEL_OUTPUT_LVDS; | |
6a227d5f AC |
660 | |
661 | drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs); | |
662 | drm_connector_helper_add(connector, | |
663 | &cdv_intel_lvds_connector_helper_funcs); | |
664 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | |
665 | connector->interlace_allowed = false; | |
666 | connector->doublescan_allowed = false; | |
667 | ||
668 | /*Attach connector properties*/ | |
a69ac9ea | 669 | drm_object_attach_property(&connector->base, |
6a227d5f AC |
670 | dev->mode_config.scaling_mode_property, |
671 | DRM_MODE_SCALE_FULLSCREEN); | |
a69ac9ea | 672 | drm_object_attach_property(&connector->base, |
6a227d5f AC |
673 | dev_priv->backlight_property, |
674 | BRIGHTNESS_MAX_LEVEL); | |
675 | ||
676 | /** | |
677 | * Set up I2C bus | |
678 | * FIXME: distroy i2c_bus when exit | |
679 | */ | |
367e4408 | 680 | gma_encoder->i2c_bus = psb_intel_i2c_create(dev, |
6a227d5f AC |
681 | GPIOB, |
682 | "LVDSBLC_B"); | |
367e4408 | 683 | if (!gma_encoder->i2c_bus) { |
6a227d5f AC |
684 | dev_printk(KERN_ERR, |
685 | &dev->pdev->dev, "I2C bus registration failed.\n"); | |
686 | goto failed_blc_i2c; | |
687 | } | |
367e4408 PJ |
688 | gma_encoder->i2c_bus->slave_addr = 0x2C; |
689 | dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus; | |
6a227d5f AC |
690 | |
691 | /* | |
692 | * LVDS discovery: | |
693 | * 1) check for EDID on DDC | |
694 | * 2) check for VBT data | |
695 | * 3) check to see if LVDS is already on | |
696 | * if none of the above, no panel | |
697 | * 4) make sure lid is open | |
698 | * if closed, act like it's not there for now | |
699 | */ | |
700 | ||
701 | /* Set up the DDC bus. */ | |
367e4408 | 702 | gma_encoder->ddc_bus = psb_intel_i2c_create(dev, |
6a227d5f AC |
703 | GPIOC, |
704 | "LVDSDDC_C"); | |
367e4408 | 705 | if (!gma_encoder->ddc_bus) { |
6a227d5f AC |
706 | dev_printk(KERN_ERR, &dev->pdev->dev, |
707 | "DDC bus registration " "failed.\n"); | |
708 | goto failed_ddc; | |
709 | } | |
710 | ||
711 | /* | |
712 | * Attempt to get the fixed panel mode from DDC. Assume that the | |
713 | * preferred mode is the right one. | |
714 | */ | |
c46145ae | 715 | mutex_lock(&dev->mode_config.mutex); |
a12d6a07 | 716 | psb_intel_ddc_get_modes(connector, |
367e4408 | 717 | &gma_encoder->ddc_bus->adapter); |
6a227d5f AC |
718 | list_for_each_entry(scan, &connector->probed_modes, head) { |
719 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { | |
720 | mode_dev->panel_fixed_mode = | |
721 | drm_mode_duplicate(dev, scan); | |
722 | goto out; /* FIXME: check for quirks */ | |
723 | } | |
724 | } | |
725 | ||
726 | /* Failed to get EDID, what about VBT? do we need this?*/ | |
727 | if (dev_priv->lfp_lvds_vbt_mode) { | |
728 | mode_dev->panel_fixed_mode = | |
729 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); | |
730 | if (mode_dev->panel_fixed_mode) { | |
731 | mode_dev->panel_fixed_mode->type |= | |
732 | DRM_MODE_TYPE_PREFERRED; | |
733 | goto out; /* FIXME: check for quirks */ | |
734 | } | |
735 | } | |
736 | /* | |
737 | * If we didn't get EDID, try checking if the panel is already turned | |
738 | * on. If so, assume that whatever is currently programmed is the | |
739 | * correct mode. | |
740 | */ | |
741 | lvds = REG_READ(LVDS); | |
742 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; | |
743 | crtc = psb_intel_get_crtc_from_pipe(dev, pipe); | |
744 | ||
745 | if (crtc && (lvds & LVDS_PORT_EN)) { | |
746 | mode_dev->panel_fixed_mode = | |
747 | cdv_intel_crtc_mode_get(dev, crtc); | |
748 | if (mode_dev->panel_fixed_mode) { | |
749 | mode_dev->panel_fixed_mode->type |= | |
750 | DRM_MODE_TYPE_PREFERRED; | |
751 | goto out; /* FIXME: check for quirks */ | |
752 | } | |
753 | } | |
754 | ||
755 | /* If we still don't have a mode after all that, give up. */ | |
756 | if (!mode_dev->panel_fixed_mode) { | |
757 | DRM_DEBUG | |
758 | ("Found no modes on the lvds, ignoring the LVDS\n"); | |
759 | goto failed_find; | |
760 | } | |
761 | ||
d235e64a AC |
762 | /* setup PWM */ |
763 | { | |
764 | u32 pwm; | |
765 | ||
766 | pwm = REG_READ(BLC_PWM_CTL2); | |
767 | if (pipe == 1) | |
768 | pwm |= PWM_PIPE_B; | |
769 | else | |
770 | pwm &= ~PWM_PIPE_B; | |
771 | pwm |= PWM_ENABLE; | |
772 | REG_WRITE(BLC_PWM_CTL2, pwm); | |
773 | } | |
774 | ||
6a227d5f | 775 | out: |
c46145ae | 776 | mutex_unlock(&dev->mode_config.mutex); |
34ea3d38 | 777 | drm_connector_register(connector); |
6a227d5f AC |
778 | return; |
779 | ||
780 | failed_find: | |
c46145ae | 781 | mutex_unlock(&dev->mode_config.mutex); |
6a227d5f | 782 | printk(KERN_ERR "Failed find\n"); |
367e4408 PJ |
783 | if (gma_encoder->ddc_bus) |
784 | psb_intel_i2c_destroy(gma_encoder->ddc_bus); | |
6a227d5f AC |
785 | failed_ddc: |
786 | printk(KERN_ERR "Failed DDC\n"); | |
367e4408 PJ |
787 | if (gma_encoder->i2c_bus) |
788 | psb_intel_i2c_destroy(gma_encoder->i2c_bus); | |
6a227d5f AC |
789 | failed_blc_i2c: |
790 | printk(KERN_ERR "Failed BLC\n"); | |
791 | drm_encoder_cleanup(encoder); | |
792 | drm_connector_cleanup(connector); | |
a12d6a07 PJ |
793 | kfree(lvds_priv); |
794 | failed_lvds_priv: | |
a3d5d75f | 795 | kfree(gma_connector); |
a12d6a07 | 796 | failed_connector: |
367e4408 | 797 | kfree(gma_encoder); |
6a227d5f | 798 | } |