drm/gma500/cdv: Convert to generic set_config()
[deliverable/linux.git] / drivers / gpu / drm / gma500 / psb_intel_lvds.c
CommitLineData
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1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16 *
17 * Authors:
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
21 */
22
23#include <linux/i2c.h>
24#include <drm/drmP.h>
25
26#include "intel_bios.h"
27#include "psb_drv.h"
28#include "psb_intel_drv.h"
29#include "psb_intel_reg.h"
30#include "power.h"
31#include <linux/pm_runtime.h>
32
33/*
34 * LVDS I2C backlight control macros
35 */
36#define BRIGHTNESS_MAX_LEVEL 100
37#define BRIGHTNESS_MASK 0xFF
38#define BLC_I2C_TYPE 0x01
39#define BLC_PWM_TYPT 0x02
40
41#define BLC_POLARITY_NORMAL 0
42#define BLC_POLARITY_INVERSE 1
43
44#define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
45#define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
46#define PSB_BLC_PWM_PRECISION_FACTOR (10)
47#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
48#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
49
50struct psb_intel_lvds_priv {
51 /*
52 * Saved LVDO output states
53 */
54 uint32_t savePP_ON;
55 uint32_t savePP_OFF;
56 uint32_t saveLVDS;
57 uint32_t savePP_CONTROL;
58 uint32_t savePP_CYCLE;
59 uint32_t savePFIT_CONTROL;
60 uint32_t savePFIT_PGM_RATIOS;
61 uint32_t saveBLC_PWM_CTL;
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62
63 struct psb_intel_i2c_chan *i2c_bus;
64 struct psb_intel_i2c_chan *ddc_bus;
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65};
66
67
68/*
69 * Returns the maximum level of the backlight duty cycle field.
70 */
71static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
72{
73 struct drm_psb_private *dev_priv = dev->dev_private;
1f0d0b51 74 u32 ret;
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75
76 if (gma_power_begin(dev, false)) {
1f0d0b51 77 ret = REG_READ(BLC_PWM_CTL);
89c78134 78 gma_power_end(dev);
1f0d0b51 79 } else /* Powered off, use the saved value */
648a8e34 80 ret = dev_priv->regs.saveBLC_PWM_CTL;
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81
82 /* Top 15bits hold the frequency mask */
83 ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
84 BACKLIGHT_MODULATION_FREQ_SHIFT;
85
86 ret *= 2; /* Return a 16bit range as needed for setting */
87 if (ret == 0)
88 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
648a8e34 89 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
1f0d0b51 90 return ret;
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91}
92
93/*
94 * Set LVDS backlight level by I2C command
95 *
96 * FIXME: at some point we need to both track this for PM and also
97 * disable runtime pm on MRST if the brightness is nil (ie blanked)
98 */
99static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
100 unsigned int level)
101{
102 struct drm_psb_private *dev_priv =
103 (struct drm_psb_private *)dev->dev_private;
104
105 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
106 u8 out_buf[2];
107 unsigned int blc_i2c_brightness;
108
109 struct i2c_msg msgs[] = {
110 {
111 .addr = lvds_i2c_bus->slave_addr,
112 .flags = 0,
113 .len = 2,
114 .buf = out_buf,
115 }
116 };
117
118 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
119 BRIGHTNESS_MASK /
120 BRIGHTNESS_MAX_LEVEL);
121
122 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
123 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
124
125 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
126 out_buf[1] = (u8)blc_i2c_brightness;
127
128 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
129 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
130 dev_priv->lvds_bl->brightnesscmd,
131 blc_i2c_brightness);
132 return 0;
133 }
134
135 dev_err(dev->dev, "I2C transfer error\n");
136 return -1;
137}
138
139
140static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
141{
142 struct drm_psb_private *dev_priv =
143 (struct drm_psb_private *)dev->dev_private;
144
145 u32 max_pwm_blc;
146 u32 blc_pwm_duty_cycle;
147
148 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
149
150 /*BLC_PWM_CTL Should be initiated while backlight device init*/
1f0d0b51 151 BUG_ON(max_pwm_blc == 0);
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152
153 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
154
155 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
156 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
157
158 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
159 REG_WRITE(BLC_PWM_CTL,
160 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
161 (blc_pwm_duty_cycle));
162
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163 dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
164 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
165 (blc_pwm_duty_cycle));
166
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167 return 0;
168}
169
170/*
171 * Set LVDS backlight level either by I2C or PWM
172 */
173void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
174{
1f0d0b51 175 struct drm_psb_private *dev_priv = dev->dev_private;
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176
177 dev_dbg(dev->dev, "backlight level is %d\n", level);
178
179 if (!dev_priv->lvds_bl) {
1f0d0b51 180 dev_err(dev->dev, "NO LVDS backlight info\n");
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181 return;
182 }
183
184 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
185 psb_lvds_i2c_set_brightness(dev, level);
186 else
187 psb_lvds_pwm_set_brightness(dev, level);
188}
189
190/*
191 * Sets the backlight level.
192 *
193 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
194 */
195static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
196{
197 struct drm_psb_private *dev_priv = dev->dev_private;
198 u32 blc_pwm_ctl;
199
200 if (gma_power_begin(dev, false)) {
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201 blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
202 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
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203 REG_WRITE(BLC_PWM_CTL,
204 (blc_pwm_ctl |
205 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
648a8e34 206 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
1f0d0b51 207 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
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208 gma_power_end(dev);
209 } else {
648a8e34 210 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
89c78134 211 ~BACKLIGHT_DUTY_CYCLE_MASK;
648a8e34 212 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
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213 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
214 }
215}
216
217/*
218 * Sets the power state for the panel.
219 */
9c8cee47 220static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
89c78134 221{
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222 struct drm_psb_private *dev_priv = dev->dev_private;
223 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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224 u32 pp_status;
225
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226 if (!gma_power_begin(dev, true)) {
227 dev_err(dev->dev, "set power, chip off!\n");
89c78134 228 return;
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229 }
230
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231 if (on) {
232 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
233 POWER_TARGET_ON);
234 do {
235 pp_status = REG_READ(PP_STATUS);
236 } while ((pp_status & PP_ON) == 0);
237
238 psb_intel_lvds_set_backlight(dev,
9c8cee47 239 mode_dev->backlight_duty_cycle);
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240 } else {
241 psb_intel_lvds_set_backlight(dev, 0);
242
243 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
244 ~POWER_TARGET_ON);
245 do {
246 pp_status = REG_READ(PP_STATUS);
247 } while (pp_status & PP_ON);
248 }
249
250 gma_power_end(dev);
251}
252
253static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
254{
255 struct drm_device *dev = encoder->dev;
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256
257 if (mode == DRM_MODE_DPMS_ON)
9c8cee47 258 psb_intel_lvds_set_power(dev, true);
89c78134 259 else
9c8cee47 260 psb_intel_lvds_set_power(dev, false);
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261
262 /* XXX: We never power down the LVDS pairs. */
263}
264
265static void psb_intel_lvds_save(struct drm_connector *connector)
266{
267 struct drm_device *dev = connector->dev;
268 struct drm_psb_private *dev_priv =
269 (struct drm_psb_private *)dev->dev_private;
9c8cee47 270 struct psb_intel_encoder *psb_intel_encoder =
c9d49590 271 gma_attached_encoder(connector);
89c78134 272 struct psb_intel_lvds_priv *lvds_priv =
9c8cee47 273 (struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
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274
275 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
276 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
277 lvds_priv->saveLVDS = REG_READ(LVDS);
278 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
279 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
280 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
281 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
282 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
283 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
284
285 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
648a8e34 286 dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
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287 BACKLIGHT_DUTY_CYCLE_MASK);
288
289 /*
290 * If the light is off at server startup,
291 * just make it full brightness
292 */
293 if (dev_priv->backlight_duty_cycle == 0)
294 dev_priv->backlight_duty_cycle =
295 psb_intel_lvds_get_max_backlight(dev);
296
297 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
298 lvds_priv->savePP_ON,
299 lvds_priv->savePP_OFF,
300 lvds_priv->saveLVDS,
301 lvds_priv->savePP_CONTROL,
302 lvds_priv->savePP_CYCLE,
303 lvds_priv->saveBLC_PWM_CTL);
304}
305
306static void psb_intel_lvds_restore(struct drm_connector *connector)
307{
308 struct drm_device *dev = connector->dev;
309 u32 pp_status;
9c8cee47 310 struct psb_intel_encoder *psb_intel_encoder =
c9d49590 311 gma_attached_encoder(connector);
89c78134 312 struct psb_intel_lvds_priv *lvds_priv =
9c8cee47 313 (struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
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314
315 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
316 lvds_priv->savePP_ON,
317 lvds_priv->savePP_OFF,
318 lvds_priv->saveLVDS,
319 lvds_priv->savePP_CONTROL,
320 lvds_priv->savePP_CYCLE,
321 lvds_priv->saveBLC_PWM_CTL);
322
323 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
324 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
325 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
326 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
327 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
328 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
329 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
330 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
331 REG_WRITE(LVDS, lvds_priv->saveLVDS);
332
333 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
334 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
335 POWER_TARGET_ON);
336 do {
337 pp_status = REG_READ(PP_STATUS);
338 } while ((pp_status & PP_ON) == 0);
339 } else {
340 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
341 ~POWER_TARGET_ON);
342 do {
343 pp_status = REG_READ(PP_STATUS);
344 } while (pp_status & PP_ON);
345 }
346}
347
348int psb_intel_lvds_mode_valid(struct drm_connector *connector,
349 struct drm_display_mode *mode)
350{
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351 struct drm_psb_private *dev_priv = connector->dev->dev_private;
352 struct psb_intel_encoder *psb_intel_encoder =
c9d49590 353 gma_attached_encoder(connector);
89c78134 354 struct drm_display_mode *fixed_mode =
9c8cee47 355 dev_priv->mode_dev.panel_fixed_mode;
89c78134 356
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357 if (psb_intel_encoder->type == INTEL_OUTPUT_MIPI2)
358 fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
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359
360 /* just in case */
361 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
362 return MODE_NO_DBLESCAN;
363
364 /* just in case */
365 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
366 return MODE_NO_INTERLACE;
367
368 if (fixed_mode) {
369 if (mode->hdisplay > fixed_mode->hdisplay)
370 return MODE_PANEL;
371 if (mode->vdisplay > fixed_mode->vdisplay)
372 return MODE_PANEL;
373 }
374 return MODE_OK;
375}
376
377bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
e811f5ae 378 const struct drm_display_mode *mode,
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379 struct drm_display_mode *adjusted_mode)
380{
89c78134 381 struct drm_device *dev = encoder->dev;
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382 struct drm_psb_private *dev_priv = dev->dev_private;
383 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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384 struct psb_intel_crtc *psb_intel_crtc =
385 to_psb_intel_crtc(encoder->crtc);
386 struct drm_encoder *tmp_encoder;
387 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
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388 struct psb_intel_encoder *psb_intel_encoder =
389 to_psb_intel_encoder(encoder);
89c78134 390
9c8cee47 391 if (psb_intel_encoder->type == INTEL_OUTPUT_MIPI2)
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392 panel_fixed_mode = mode_dev->panel_fixed_mode2;
393
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394 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
395 if (!IS_MRST(dev) && psb_intel_crtc->pipe == 0) {
396 printk(KERN_ERR "Can't support LVDS on pipe A\n");
397 return false;
398 }
399 if (IS_MRST(dev) && psb_intel_crtc->pipe != 0) {
400 printk(KERN_ERR "Must use PIPE A\n");
401 return false;
402 }
403 /* Should never happen!! */
404 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
405 head) {
406 if (tmp_encoder != encoder
407 && tmp_encoder->crtc == encoder->crtc) {
408 printk(KERN_ERR "Can't enable LVDS and another "
409 "encoder on the same pipe\n");
410 return false;
411 }
412 }
413
414 /*
415 * If we have timings from the BIOS for the panel, put them in
416 * to the adjusted mode. The CRTC will be set up for this mode,
417 * with the panel scaling set up to source from the H/VDisplay
418 * of the original mode.
419 */
420 if (panel_fixed_mode != NULL) {
421 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
422 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
423 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
424 adjusted_mode->htotal = panel_fixed_mode->htotal;
425 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
426 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
427 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
428 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
429 adjusted_mode->clock = panel_fixed_mode->clock;
430 drm_mode_set_crtcinfo(adjusted_mode,
431 CRTC_INTERLACE_HALVE_V);
432 }
433
434 /*
435 * XXX: It would be nice to support lower refresh rates on the
436 * panels to reduce power consumption, and perhaps match the
437 * user's requested refresh rate.
438 */
439
440 return true;
441}
442
443static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
444{
445 struct drm_device *dev = encoder->dev;
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446 struct drm_psb_private *dev_priv = dev->dev_private;
447 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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448
449 if (!gma_power_begin(dev, true))
450 return;
451
452 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
453 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
454 BACKLIGHT_DUTY_CYCLE_MASK);
455
9c8cee47 456 psb_intel_lvds_set_power(dev, false);
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457
458 gma_power_end(dev);
459}
460
461static void psb_intel_lvds_commit(struct drm_encoder *encoder)
462{
463 struct drm_device *dev = encoder->dev;
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464 struct drm_psb_private *dev_priv = dev->dev_private;
465 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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466
467 if (mode_dev->backlight_duty_cycle == 0)
468 mode_dev->backlight_duty_cycle =
469 psb_intel_lvds_get_max_backlight(dev);
470
9c8cee47 471 psb_intel_lvds_set_power(dev, true);
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472}
473
474static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
475 struct drm_display_mode *mode,
476 struct drm_display_mode *adjusted_mode)
477{
478 struct drm_device *dev = encoder->dev;
479 struct drm_psb_private *dev_priv = dev->dev_private;
480 u32 pfit_control;
481
482 /*
483 * The LVDS pin pair will already have been turned on in the
484 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
485 * settings.
486 */
487
488 /*
489 * Enable automatic panel scaling so that non-native modes fill the
490 * screen. Should be enabled before the pipe is enabled, according to
491 * register description and PRM.
492 */
493 if (mode->hdisplay != adjusted_mode->hdisplay ||
494 mode->vdisplay != adjusted_mode->vdisplay)
495 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
496 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
497 HORIZ_INTERP_BILINEAR);
498 else
499 pfit_control = 0;
500
501 if (dev_priv->lvds_dither)
502 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
503
504 REG_WRITE(PFIT_CONTROL, pfit_control);
505}
506
507/*
508 * Detect the LVDS connection.
509 *
510 * This always returns CONNECTOR_STATUS_CONNECTED.
511 * This connector should only have
512 * been set up if the LVDS was actually connected anyway.
513 */
514static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
515 *connector, bool force)
516{
517 return connector_status_connected;
518}
519
520/*
521 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
522 */
523static int psb_intel_lvds_get_modes(struct drm_connector *connector)
524{
525 struct drm_device *dev = connector->dev;
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526 struct drm_psb_private *dev_priv = dev->dev_private;
527 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
528 struct psb_intel_encoder *psb_intel_encoder =
c9d49590 529 gma_attached_encoder(connector);
9c8cee47 530 struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
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531 int ret = 0;
532
533 if (!IS_MRST(dev))
9c8cee47 534 ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
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535
536 if (ret)
537 return ret;
538
539 /* Didn't get an EDID, so
540 * Set wide sync ranges so we get all modes
541 * handed to valid_mode for checking
542 */
543 connector->display_info.min_vfreq = 0;
544 connector->display_info.max_vfreq = 200;
545 connector->display_info.min_hfreq = 0;
546 connector->display_info.max_hfreq = 200;
547
548 if (mode_dev->panel_fixed_mode != NULL) {
549 struct drm_display_mode *mode =
550 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
551 drm_mode_probed_add(connector, mode);
552 return 1;
553 }
554
555 return 0;
556}
557
558/**
559 * psb_intel_lvds_destroy - unregister and free LVDS structures
560 * @connector: connector to free
561 *
562 * Unregister the DDC bus for this connector then free the driver private
563 * structure.
564 */
565void psb_intel_lvds_destroy(struct drm_connector *connector)
566{
9c8cee47 567 struct psb_intel_encoder *psb_intel_encoder =
c9d49590 568 gma_attached_encoder(connector);
9c8cee47 569 struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
89c78134 570
9c8cee47
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571 if (lvds_priv->ddc_bus)
572 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
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573 drm_sysfs_connector_remove(connector);
574 drm_connector_cleanup(connector);
575 kfree(connector);
576}
577
578int psb_intel_lvds_set_property(struct drm_connector *connector,
579 struct drm_property *property,
580 uint64_t value)
581{
582 struct drm_encoder *encoder = connector->encoder;
583
584 if (!encoder)
585 return -1;
586
587 if (!strcmp(property->name, "scaling mode")) {
588 struct psb_intel_crtc *crtc =
589 to_psb_intel_crtc(encoder->crtc);
590 uint64_t curval;
591
592 if (!crtc)
593 goto set_prop_error;
594
595 switch (value) {
596 case DRM_MODE_SCALE_FULLSCREEN:
597 break;
598 case DRM_MODE_SCALE_NO_SCALE:
599 break;
600 case DRM_MODE_SCALE_ASPECT:
601 break;
602 default:
603 goto set_prop_error;
604 }
605
a69ac9ea 606 if (drm_object_property_get_value(&connector->base,
89c78134
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607 property,
608 &curval))
609 goto set_prop_error;
610
611 if (curval == value)
612 goto set_prop_done;
613
a69ac9ea 614 if (drm_object_property_set_value(&connector->base,
89c78134
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615 property,
616 value))
617 goto set_prop_error;
618
619 if (crtc->saved_mode.hdisplay != 0 &&
620 crtc->saved_mode.vdisplay != 0) {
621 if (!drm_crtc_helper_set_mode(encoder->crtc,
622 &crtc->saved_mode,
623 encoder->crtc->x,
624 encoder->crtc->y,
625 encoder->crtc->fb))
626 goto set_prop_error;
627 }
628 } else if (!strcmp(property->name, "backlight")) {
a69ac9ea 629 if (drm_object_property_set_value(&connector->base,
89c78134
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630 property,
631 value))
632 goto set_prop_error;
d112a816
ZY
633 else
634 gma_backlight_set(encoder->dev, value);
89c78134
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635 } else if (!strcmp(property->name, "DPMS")) {
636 struct drm_encoder_helper_funcs *hfuncs
637 = encoder->helper_private;
638 hfuncs->dpms(encoder, value);
639 }
640
641set_prop_done:
642 return 0;
643set_prop_error:
644 return -1;
645}
646
647static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
648 .dpms = psb_intel_lvds_encoder_dpms,
649 .mode_fixup = psb_intel_lvds_mode_fixup,
650 .prepare = psb_intel_lvds_prepare,
651 .mode_set = psb_intel_lvds_mode_set,
652 .commit = psb_intel_lvds_commit,
653};
654
655const struct drm_connector_helper_funcs
656 psb_intel_lvds_connector_helper_funcs = {
657 .get_modes = psb_intel_lvds_get_modes,
658 .mode_valid = psb_intel_lvds_mode_valid,
c9d49590 659 .best_encoder = gma_best_encoder,
89c78134
AC
660};
661
662const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
663 .dpms = drm_helper_connector_dpms,
664 .save = psb_intel_lvds_save,
665 .restore = psb_intel_lvds_restore,
666 .detect = psb_intel_lvds_detect,
667 .fill_modes = drm_helper_probe_single_connector_modes,
668 .set_property = psb_intel_lvds_set_property,
669 .destroy = psb_intel_lvds_destroy,
670};
671
672
673static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
674{
675 drm_encoder_cleanup(encoder);
676}
677
678const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
679 .destroy = psb_intel_lvds_enc_destroy,
680};
681
682
683
684/**
685 * psb_intel_lvds_init - setup LVDS connectors on this device
686 * @dev: drm device
687 *
688 * Create the connector, register the LVDS DDC bus, and try to figure out what
689 * modes we can display on the LVDS panel (if present).
690 */
691void psb_intel_lvds_init(struct drm_device *dev,
9c8cee47 692 struct psb_intel_mode_device *mode_dev)
89c78134 693{
9c8cee47
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694 struct psb_intel_encoder *psb_intel_encoder;
695 struct psb_intel_connector *psb_intel_connector;
89c78134
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696 struct psb_intel_lvds_priv *lvds_priv;
697 struct drm_connector *connector;
698 struct drm_encoder *encoder;
699 struct drm_display_mode *scan; /* *modes, *bios_mode; */
700 struct drm_crtc *crtc;
1f0d0b51 701 struct drm_psb_private *dev_priv = dev->dev_private;
89c78134
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702 u32 lvds;
703 int pipe;
704
9c8cee47
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705 psb_intel_encoder =
706 kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
9c8cee47
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707 if (!psb_intel_encoder) {
708 dev_err(dev->dev, "psb_intel_encoder allocation error\n");
89c78134 709 return;
9c8cee47
PJ
710 }
711
712 psb_intel_connector =
713 kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
9c8cee47 714 if (!psb_intel_connector) {
9c8cee47 715 dev_err(dev->dev, "psb_intel_connector allocation error\n");
aa7c62af 716 goto failed_encoder;
9c8cee47 717 }
89c78134
AC
718
719 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
720 if (!lvds_priv) {
89c78134 721 dev_err(dev->dev, "LVDS private allocation error\n");
9c8cee47 722 goto failed_connector;
89c78134
AC
723 }
724
9c8cee47 725 psb_intel_encoder->dev_priv = lvds_priv;
1f0d0b51 726
9c8cee47
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727 connector = &psb_intel_connector->base;
728 encoder = &psb_intel_encoder->base;
729 drm_connector_init(dev, connector,
89c78134
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730 &psb_intel_lvds_connector_funcs,
731 DRM_MODE_CONNECTOR_LVDS);
732
9c8cee47 733 drm_encoder_init(dev, encoder,
89c78134
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734 &psb_intel_lvds_enc_funcs,
735 DRM_MODE_ENCODER_LVDS);
736
c9d49590 737 gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
9c8cee47 738 psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
89c78134
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739
740 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
741 drm_connector_helper_add(connector,
742 &psb_intel_lvds_connector_helper_funcs);
743 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
744 connector->interlace_allowed = false;
745 connector->doublescan_allowed = false;
746
747 /*Attach connector properties*/
a69ac9ea 748 drm_object_attach_property(&connector->base,
89c78134
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749 dev->mode_config.scaling_mode_property,
750 DRM_MODE_SCALE_FULLSCREEN);
a69ac9ea 751 drm_object_attach_property(&connector->base,
89c78134
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752 dev_priv->backlight_property,
753 BRIGHTNESS_MAX_LEVEL);
754
755 /*
756 * Set up I2C bus
757 * FIXME: distroy i2c_bus when exit
758 */
9c8cee47
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759 lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
760 if (!lvds_priv->i2c_bus) {
89c78134
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761 dev_printk(KERN_ERR,
762 &dev->pdev->dev, "I2C bus registration failed.\n");
763 goto failed_blc_i2c;
764 }
9c8cee47
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765 lvds_priv->i2c_bus->slave_addr = 0x2C;
766 dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
89c78134
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767
768 /*
769 * LVDS discovery:
770 * 1) check for EDID on DDC
771 * 2) check for VBT data
772 * 3) check to see if LVDS is already on
773 * if none of the above, no panel
774 * 4) make sure lid is open
775 * if closed, act like it's not there for now
776 */
777
778 /* Set up the DDC bus. */
9c8cee47
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779 lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
780 if (!lvds_priv->ddc_bus) {
89c78134
AC
781 dev_printk(KERN_ERR, &dev->pdev->dev,
782 "DDC bus registration " "failed.\n");
783 goto failed_ddc;
784 }
785
786 /*
787 * Attempt to get the fixed panel mode from DDC. Assume that the
788 * preferred mode is the right one.
789 */
9c8cee47 790 psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
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791 list_for_each_entry(scan, &connector->probed_modes, head) {
792 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
793 mode_dev->panel_fixed_mode =
794 drm_mode_duplicate(dev, scan);
795 goto out; /* FIXME: check for quirks */
796 }
797 }
798
799 /* Failed to get EDID, what about VBT? do we need this? */
800 if (mode_dev->vbt_mode)
801 mode_dev->panel_fixed_mode =
802 drm_mode_duplicate(dev, mode_dev->vbt_mode);
803
804 if (!mode_dev->panel_fixed_mode)
805 if (dev_priv->lfp_lvds_vbt_mode)
806 mode_dev->panel_fixed_mode =
807 drm_mode_duplicate(dev,
808 dev_priv->lfp_lvds_vbt_mode);
809
810 /*
811 * If we didn't get EDID, try checking if the panel is already turned
812 * on. If so, assume that whatever is currently programmed is the
813 * correct mode.
814 */
815 lvds = REG_READ(LVDS);
816 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
817 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
818
819 if (crtc && (lvds & LVDS_PORT_EN)) {
820 mode_dev->panel_fixed_mode =
821 psb_intel_crtc_mode_get(dev, crtc);
822 if (mode_dev->panel_fixed_mode) {
823 mode_dev->panel_fixed_mode->type |=
824 DRM_MODE_TYPE_PREFERRED;
825 goto out; /* FIXME: check for quirks */
826 }
827 }
828
829 /* If we still don't have a mode after all that, give up. */
830 if (!mode_dev->panel_fixed_mode) {
831 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
832 goto failed_find;
833 }
834
835 /*
836 * Blacklist machines with BIOSes that list an LVDS panel without
837 * actually having one.
838 */
839out:
840 drm_sysfs_connector_add(connector);
841 return;
842
843failed_find:
9c8cee47
PJ
844 if (lvds_priv->ddc_bus)
845 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
89c78134 846failed_ddc:
9c8cee47
PJ
847 if (lvds_priv->i2c_bus)
848 psb_intel_i2c_destroy(lvds_priv->i2c_bus);
89c78134
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849failed_blc_i2c:
850 drm_encoder_cleanup(encoder);
851 drm_connector_cleanup(connector);
9c8cee47 852failed_connector:
aa7c62af
JJ
853 kfree(psb_intel_connector);
854failed_encoder:
855 kfree(psb_intel_encoder);
89c78134
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856}
857
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