Merge branch 'for-4.7-dw' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
[deliverable/linux.git] / drivers / gpu / drm / i810 / i810_dma.c
CommitLineData
1da177e4
LT
1/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
760285e7
DH
33#include <drm/drmP.h>
34#include <drm/i810_drm.h>
1da177e4
LT
35#include "i810_drv.h"
36#include <linux/interrupt.h> /* For task queue support */
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
1da177e4
LT
39#include <linux/pagemap.h>
40
41#define I810_BUF_FREE 2
42#define I810_BUF_CLIENT 1
bc5f4523 43#define I810_BUF_HARDWARE 0
1da177e4
LT
44
45#define I810_BUF_UNMAPPED 0
46#define I810_BUF_MAPPED 1
47
056219e2 48static struct drm_buf *i810_freelist_get(struct drm_device * dev)
1da177e4 49{
cdd55a29 50 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
51 int i;
52 int used;
1da177e4
LT
53
54 /* Linear search might not be the best solution */
55
b5e89ed5 56 for (i = 0; i < dma->buf_count; i++) {
056219e2 57 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 58 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 59 /* In use is already a pointer */
b5e89ed5 60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
1da177e4 61 I810_BUF_CLIENT);
aca791c2 62 if (used == I810_BUF_FREE)
1da177e4 63 return buf;
1da177e4 64 }
b5e89ed5 65 return NULL;
1da177e4
LT
66}
67
68/* This should only be called if the buffer is not sent to the hardware
69 * yet, the hardware updates in use for us once its on the ring buffer.
70 */
71
aca791c2 72static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
1da177e4 73{
b5e89ed5
DA
74 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
75 int used;
1da177e4 76
b5e89ed5
DA
77 /* In use is already a pointer */
78 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
1da177e4 79 if (used != I810_BUF_CLIENT) {
b5e89ed5
DA
80 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
81 return -EINVAL;
1da177e4
LT
82 }
83
b5e89ed5 84 return 0;
1da177e4
LT
85}
86
c94f7029 87static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
1da177e4 88{
eddca551
DA
89 struct drm_file *priv = filp->private_data;
90 struct drm_device *dev;
b5e89ed5 91 drm_i810_private_t *dev_priv;
056219e2 92 struct drm_buf *buf;
1da177e4
LT
93 drm_i810_buf_priv_t *buf_priv;
94
2c14f28b 95 dev = priv->minor->dev;
1da177e4 96 dev_priv = dev->dev_private;
b5e89ed5 97 buf = dev_priv->mmap_buffer;
1da177e4
LT
98 buf_priv = buf->dev_private;
99
80537965 100 vma->vm_flags |= VM_DONTCOPY;
1da177e4 101
b5e89ed5 102 buf_priv->currently_mapped = I810_BUF_MAPPED;
1da177e4
LT
103
104 if (io_remap_pfn_range(vma, vma->vm_start,
3d77461e 105 vma->vm_pgoff,
b5e89ed5
DA
106 vma->vm_end - vma->vm_start, vma->vm_page_prot))
107 return -EAGAIN;
1da177e4
LT
108 return 0;
109}
110
2b8693c0 111static const struct file_operations i810_buffer_fops = {
b5e89ed5 112 .open = drm_open,
c94f7029 113 .release = drm_release,
1f692a14 114 .unlocked_ioctl = drm_ioctl,
b5e89ed5 115 .mmap = i810_mmap_buffers,
804d74ab
KP
116#ifdef CONFIG_COMPAT
117 .compat_ioctl = drm_compat_ioctl,
118#endif
6038f373 119 .llseek = noop_llseek,
c94f7029
DA
120};
121
aca791c2 122static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
1da177e4 123{
2c14f28b 124 struct drm_device *dev = file_priv->minor->dev;
1da177e4 125 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 126 drm_i810_private_t *dev_priv = dev->dev_private;
99ac48f5 127 const struct file_operations *old_fops;
1da177e4
LT
128 int retcode = 0;
129
b5e89ed5 130 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1da177e4
LT
131 return -EINVAL;
132
6be5ceb0 133 /* This is all entirely broken */
6c340eac
EA
134 old_fops = file_priv->filp->f_op;
135 file_priv->filp->f_op = &i810_buffer_fops;
1da177e4 136 dev_priv->mmap_buffer = buf;
244ca2b4 137 buf_priv->virtual = (void *)vm_mmap(file_priv->filp, 0, buf->total,
b5e89ed5
DA
138 PROT_READ | PROT_WRITE,
139 MAP_SHARED, buf->bus_address);
1da177e4 140 dev_priv->mmap_buffer = NULL;
6c340eac 141 file_priv->filp->f_op = old_fops;
c7aed179 142 if (IS_ERR(buf_priv->virtual)) {
1da177e4
LT
143 /* Real error */
144 DRM_ERROR("mmap error\n");
c7aed179 145 retcode = PTR_ERR(buf_priv->virtual);
1da177e4
LT
146 buf_priv->virtual = NULL;
147 }
1da177e4
LT
148
149 return retcode;
150}
151
aca791c2 152static int i810_unmap_buffer(struct drm_buf *buf)
1da177e4
LT
153{
154 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
155 int retcode = 0;
156
157 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
158 return -EINVAL;
159
bfce281c 160 retcode = vm_munmap((unsigned long)buf_priv->virtual,
1da177e4 161 (size_t) buf->total);
1da177e4 162
b5e89ed5
DA
163 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
164 buf_priv->virtual = NULL;
1da177e4
LT
165
166 return retcode;
167}
168
aca791c2 169static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
6c340eac 170 struct drm_file *file_priv)
1da177e4 171{
056219e2 172 struct drm_buf *buf;
1da177e4
LT
173 drm_i810_buf_priv_t *buf_priv;
174 int retcode = 0;
175
176 buf = i810_freelist_get(dev);
177 if (!buf) {
178 retcode = -ENOMEM;
b5e89ed5 179 DRM_DEBUG("retcode=%d\n", retcode);
1da177e4
LT
180 return retcode;
181 }
182
6c340eac 183 retcode = i810_map_buffer(buf, file_priv);
1da177e4
LT
184 if (retcode) {
185 i810_freelist_put(dev, buf);
b5e89ed5 186 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
1da177e4
LT
187 return retcode;
188 }
6c340eac 189 buf->file_priv = file_priv;
1da177e4
LT
190 buf_priv = buf->dev_private;
191 d->granted = 1;
b5e89ed5
DA
192 d->request_idx = buf->idx;
193 d->request_size = buf->total;
194 d->virtual = buf_priv->virtual;
1da177e4
LT
195
196 return retcode;
197}
198
aca791c2 199static int i810_dma_cleanup(struct drm_device *dev)
1da177e4 200{
cdd55a29 201 struct drm_device_dma *dma = dev->dma;
1da177e4
LT
202
203 /* Make sure interrupts are disabled here because the uninstall ioctl
204 * may not have been called from userspace and after dev_private
205 * is freed, it's too late.
206 */
207 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
208 drm_irq_uninstall(dev);
209
210 if (dev->dev_private) {
211 int i;
b5e89ed5
DA
212 drm_i810_private_t *dev_priv =
213 (drm_i810_private_t *) dev->dev_private;
1da177e4 214
aca791c2 215 if (dev_priv->ring.virtual_start)
86c1fbd5 216 drm_legacy_ioremapfree(&dev_priv->ring.map, dev);
b5e89ed5
DA
217 if (dev_priv->hw_status_page) {
218 pci_free_consistent(dev->pdev, PAGE_SIZE,
1da177e4
LT
219 dev_priv->hw_status_page,
220 dev_priv->dma_status_page);
1da177e4 221 }
9a298b2a 222 kfree(dev->dev_private);
b5e89ed5 223 dev->dev_private = NULL;
1da177e4
LT
224
225 for (i = 0; i < dma->buf_count; i++) {
056219e2 226 struct drm_buf *buf = dma->buflist[i];
1da177e4 227 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b9094d3a 228
b5e89ed5 229 if (buf_priv->kernel_virtual && buf->total)
86c1fbd5 230 drm_legacy_ioremapfree(&buf_priv->map, dev);
1da177e4
LT
231 }
232 }
b5e89ed5 233 return 0;
1da177e4
LT
234}
235
aca791c2 236static int i810_wait_ring(struct drm_device *dev, int n)
1da177e4 237{
b5e89ed5
DA
238 drm_i810_private_t *dev_priv = dev->dev_private;
239 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
240 int iters = 0;
241 unsigned long end;
1da177e4
LT
242 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
243
b5e89ed5
DA
244 end = jiffies + (HZ * 3);
245 while (ring->space < n) {
246 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
247 ring->space = ring->head - (ring->tail + 8);
248 if (ring->space < 0)
249 ring->space += ring->Size;
250
1da177e4 251 if (ring->head != last_head) {
b5e89ed5 252 end = jiffies + (HZ * 3);
1da177e4
LT
253 last_head = ring->head;
254 }
b5e89ed5
DA
255
256 iters++;
1da177e4 257 if (time_before(end, jiffies)) {
b5e89ed5
DA
258 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
259 DRM_ERROR("lockup\n");
260 goto out_wait_ring;
1da177e4
LT
261 }
262 udelay(1);
263 }
264
aca791c2 265out_wait_ring:
b5e89ed5 266 return iters;
1da177e4
LT
267}
268
aca791c2 269static void i810_kernel_lost_context(struct drm_device *dev)
1da177e4 270{
b5e89ed5
DA
271 drm_i810_private_t *dev_priv = dev->dev_private;
272 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
1da177e4 273
b5e89ed5
DA
274 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
275 ring->tail = I810_READ(LP_RING + RING_TAIL);
276 ring->space = ring->head - (ring->tail + 8);
277 if (ring->space < 0)
278 ring->space += ring->Size;
1da177e4
LT
279}
280
aca791c2 281static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
1da177e4 282{
cdd55a29 283 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
284 int my_idx = 24;
285 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
286 int i;
1da177e4
LT
287
288 if (dma->buf_count > 1019) {
b5e89ed5
DA
289 /* Not enough space in the status page for the freelist */
290 return -EINVAL;
1da177e4
LT
291 }
292
b5e89ed5 293 for (i = 0; i < dma->buf_count; i++) {
056219e2 294 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 295 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 296
b5e89ed5
DA
297 buf_priv->in_use = hw_status++;
298 buf_priv->my_use_idx = my_idx;
299 my_idx += 4;
1da177e4 300
b5e89ed5 301 *buf_priv->in_use = I810_BUF_FREE;
1da177e4 302
b9094d3a
DA
303 buf_priv->map.offset = buf->bus_address;
304 buf_priv->map.size = buf->total;
305 buf_priv->map.type = _DRM_AGP;
306 buf_priv->map.flags = 0;
307 buf_priv->map.mtrr = 0;
308
86c1fbd5 309 drm_legacy_ioremap(&buf_priv->map, dev);
b9094d3a
DA
310 buf_priv->kernel_virtual = buf_priv->map.handle;
311
1da177e4
LT
312 }
313 return 0;
314}
315
aca791c2
NK
316static int i810_dma_initialize(struct drm_device *dev,
317 drm_i810_private_t *dev_priv,
318 drm_i810_init_t *init)
1da177e4 319{
55910517 320 struct drm_map_list *r_list;
b5e89ed5 321 memset(dev_priv, 0, sizeof(drm_i810_private_t));
1da177e4 322
bd1b331f 323 list_for_each_entry(r_list, &dev->maplist, head) {
1da177e4
LT
324 if (r_list->map &&
325 r_list->map->type == _DRM_SHM &&
b5e89ed5 326 r_list->map->flags & _DRM_CONTAINS_LOCK) {
1da177e4 327 dev_priv->sarea_map = r_list->map;
b5e89ed5
DA
328 break;
329 }
330 }
1da177e4
LT
331 if (!dev_priv->sarea_map) {
332 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
333 i810_dma_cleanup(dev);
334 DRM_ERROR("can not find sarea!\n");
335 return -EINVAL;
1da177e4 336 }
86c1fbd5 337 dev_priv->mmio_map = drm_legacy_findmap(dev, init->mmio_offset);
1da177e4
LT
338 if (!dev_priv->mmio_map) {
339 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
340 i810_dma_cleanup(dev);
341 DRM_ERROR("can not find mmio map!\n");
342 return -EINVAL;
1da177e4 343 }
d1f2b55a 344 dev->agp_buffer_token = init->buffers_offset;
86c1fbd5 345 dev->agp_buffer_map = drm_legacy_findmap(dev, init->buffers_offset);
1da177e4
LT
346 if (!dev->agp_buffer_map) {
347 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
348 i810_dma_cleanup(dev);
349 DRM_ERROR("can not find dma buffer map!\n");
350 return -EINVAL;
1da177e4
LT
351 }
352
353 dev_priv->sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 354 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
1da177e4 355
b5e89ed5
DA
356 dev_priv->ring.Start = init->ring_start;
357 dev_priv->ring.End = init->ring_end;
358 dev_priv->ring.Size = init->ring_size;
1da177e4 359
b9094d3a
DA
360 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
361 dev_priv->ring.map.size = init->ring_size;
362 dev_priv->ring.map.type = _DRM_AGP;
363 dev_priv->ring.map.flags = 0;
364 dev_priv->ring.map.mtrr = 0;
1da177e4 365
86c1fbd5 366 drm_legacy_ioremap(&dev_priv->ring.map, dev);
b9094d3a
DA
367
368 if (dev_priv->ring.map.handle == NULL) {
b5e89ed5
DA
369 dev->dev_private = (void *)dev_priv;
370 i810_dma_cleanup(dev);
371 DRM_ERROR("can not ioremap virtual address for"
1da177e4 372 " ring buffer\n");
20caafa6 373 return -ENOMEM;
1da177e4
LT
374 }
375
b9094d3a
DA
376 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
377
b5e89ed5 378 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
1da177e4
LT
379
380 dev_priv->w = init->w;
381 dev_priv->h = init->h;
382 dev_priv->pitch = init->pitch;
383 dev_priv->back_offset = init->back_offset;
384 dev_priv->depth_offset = init->depth_offset;
385 dev_priv->front_offset = init->front_offset;
386
387 dev_priv->overlay_offset = init->overlay_offset;
388 dev_priv->overlay_physical = init->overlay_physical;
389
390 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
391 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
392 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
393
b5e89ed5
DA
394 /* Program Hardware Status Page */
395 dev_priv->hw_status_page =
59e2623b
JP
396 pci_zalloc_consistent(dev->pdev, PAGE_SIZE,
397 &dev_priv->dma_status_page);
b5e89ed5 398 if (!dev_priv->hw_status_page) {
1da177e4
LT
399 dev->dev_private = (void *)dev_priv;
400 i810_dma_cleanup(dev);
401 DRM_ERROR("Can not allocate hardware status page\n");
402 return -ENOMEM;
403 }
b5e89ed5 404 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
1da177e4
LT
405
406 I810_WRITE(0x02080, dev_priv->dma_status_page);
b5e89ed5 407 DRM_DEBUG("Enabled hardware status page\n");
1da177e4 408
b5e89ed5 409 /* Now we need to init our freelist */
1da177e4
LT
410 if (i810_freelist_init(dev, dev_priv) != 0) {
411 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
412 i810_dma_cleanup(dev);
413 DRM_ERROR("Not enough space in the status page for"
1da177e4 414 " the freelist\n");
b5e89ed5 415 return -ENOMEM;
1da177e4
LT
416 }
417 dev->dev_private = (void *)dev_priv;
418
b5e89ed5 419 return 0;
1da177e4
LT
420}
421
c153f45f
EA
422static int i810_dma_init(struct drm_device *dev, void *data,
423 struct drm_file *file_priv)
1da177e4 424{
b5e89ed5 425 drm_i810_private_t *dev_priv;
c153f45f 426 drm_i810_init_t *init = data;
b5e89ed5 427 int retcode = 0;
1da177e4 428
c153f45f 429 switch (init->func) {
b5e89ed5
DA
430 case I810_INIT_DMA_1_4:
431 DRM_INFO("Using v1.4 init.\n");
9a298b2a 432 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
b5e89ed5
DA
433 if (dev_priv == NULL)
434 return -ENOMEM;
c153f45f 435 retcode = i810_dma_initialize(dev, dev_priv, init);
b5e89ed5
DA
436 break;
437
438 case I810_CLEANUP_DMA:
439 DRM_INFO("DMA Cleanup\n");
440 retcode = i810_dma_cleanup(dev);
441 break;
c153f45f
EA
442 default:
443 return -EINVAL;
1da177e4
LT
444 }
445
b5e89ed5 446 return retcode;
1da177e4
LT
447}
448
1da177e4
LT
449/* Most efficient way to verify state for the i810 is as it is
450 * emitted. Non-conformant state is silently dropped.
451 *
452 * Use 'volatile' & local var tmp to force the emitted values to be
453 * identical to the verified ones.
454 */
aca791c2 455static void i810EmitContextVerified(struct drm_device *dev,
b5e89ed5 456 volatile unsigned int *code)
1da177e4 457{
b5e89ed5 458 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
459 int i, j = 0;
460 unsigned int tmp;
461 RING_LOCALS;
462
b5e89ed5 463 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
1da177e4 464
b5e89ed5
DA
465 OUT_RING(GFX_OP_COLOR_FACTOR);
466 OUT_RING(code[I810_CTXREG_CF1]);
1da177e4 467
b5e89ed5
DA
468 OUT_RING(GFX_OP_STIPPLE);
469 OUT_RING(code[I810_CTXREG_ST1]);
1da177e4 470
b5e89ed5 471 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
1da177e4
LT
472 tmp = code[i];
473
b5e89ed5
DA
474 if ((tmp & (7 << 29)) == (3 << 29) &&
475 (tmp & (0x1f << 24)) < (0x1d << 24)) {
476 OUT_RING(tmp);
1da177e4 477 j++;
b5e89ed5
DA
478 } else
479 printk("constext state dropped!!!\n");
1da177e4
LT
480 }
481
482 if (j & 1)
b5e89ed5 483 OUT_RING(0);
1da177e4
LT
484
485 ADVANCE_LP_RING();
486}
487
aca791c2 488static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
1da177e4 489{
b5e89ed5 490 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
491 int i, j = 0;
492 unsigned int tmp;
493 RING_LOCALS;
494
b5e89ed5 495 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
1da177e4 496
b5e89ed5
DA
497 OUT_RING(GFX_OP_MAP_INFO);
498 OUT_RING(code[I810_TEXREG_MI1]);
499 OUT_RING(code[I810_TEXREG_MI2]);
500 OUT_RING(code[I810_TEXREG_MI3]);
1da177e4 501
b5e89ed5 502 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
1da177e4
LT
503 tmp = code[i];
504
b5e89ed5
DA
505 if ((tmp & (7 << 29)) == (3 << 29) &&
506 (tmp & (0x1f << 24)) < (0x1d << 24)) {
507 OUT_RING(tmp);
1da177e4 508 j++;
b5e89ed5
DA
509 } else
510 printk("texture state dropped!!!\n");
1da177e4
LT
511 }
512
513 if (j & 1)
b5e89ed5 514 OUT_RING(0);
1da177e4
LT
515
516 ADVANCE_LP_RING();
517}
518
1da177e4
LT
519/* Need to do some additional checking when setting the dest buffer.
520 */
aca791c2 521static void i810EmitDestVerified(struct drm_device *dev,
b5e89ed5 522 volatile unsigned int *code)
1da177e4 523{
b5e89ed5 524 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
525 unsigned int tmp;
526 RING_LOCALS;
527
b5e89ed5 528 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
529
530 tmp = code[I810_DESTREG_DI1];
531 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
b5e89ed5
DA
532 OUT_RING(CMD_OP_DESTBUFFER_INFO);
533 OUT_RING(tmp);
1da177e4 534 } else
b5e89ed5
DA
535 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
536 tmp, dev_priv->front_di1, dev_priv->back_di1);
1da177e4
LT
537
538 /* invarient:
539 */
b5e89ed5
DA
540 OUT_RING(CMD_OP_Z_BUFFER_INFO);
541 OUT_RING(dev_priv->zi1);
1da177e4 542
b5e89ed5
DA
543 OUT_RING(GFX_OP_DESTBUFFER_VARS);
544 OUT_RING(code[I810_DESTREG_DV1]);
1da177e4 545
b5e89ed5
DA
546 OUT_RING(GFX_OP_DRAWRECT_INFO);
547 OUT_RING(code[I810_DESTREG_DR1]);
548 OUT_RING(code[I810_DESTREG_DR2]);
549 OUT_RING(code[I810_DESTREG_DR3]);
550 OUT_RING(code[I810_DESTREG_DR4]);
551 OUT_RING(0);
1da177e4
LT
552
553 ADVANCE_LP_RING();
554}
555
aca791c2 556static void i810EmitState(struct drm_device *dev)
1da177e4 557{
b5e89ed5
DA
558 drm_i810_private_t *dev_priv = dev->dev_private;
559 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 560 unsigned int dirty = sarea_priv->dirty;
b5e89ed5 561
3e684eae 562 DRM_DEBUG("%x\n", dirty);
1da177e4
LT
563
564 if (dirty & I810_UPLOAD_BUFFERS) {
b5e89ed5 565 i810EmitDestVerified(dev, sarea_priv->BufferState);
1da177e4
LT
566 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
567 }
568
569 if (dirty & I810_UPLOAD_CTX) {
b5e89ed5 570 i810EmitContextVerified(dev, sarea_priv->ContextState);
1da177e4
LT
571 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
572 }
573
574 if (dirty & I810_UPLOAD_TEX0) {
b5e89ed5 575 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
1da177e4
LT
576 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
577 }
578
579 if (dirty & I810_UPLOAD_TEX1) {
b5e89ed5 580 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
1da177e4
LT
581 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
582 }
583}
584
1da177e4
LT
585/* need to verify
586 */
aca791c2 587static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
b5e89ed5
DA
588 unsigned int clear_color,
589 unsigned int clear_zval)
1da177e4 590{
b5e89ed5
DA
591 drm_i810_private_t *dev_priv = dev->dev_private;
592 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 593 int nbox = sarea_priv->nbox;
eddca551 594 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
595 int pitch = dev_priv->pitch;
596 int cpp = 2;
597 int i;
598 RING_LOCALS;
b5e89ed5
DA
599
600 if (dev_priv->current_page == 1) {
601 unsigned int tmp = flags;
602
1da177e4 603 flags &= ~(I810_FRONT | I810_BACK);
b5e89ed5
DA
604 if (tmp & I810_FRONT)
605 flags |= I810_BACK;
606 if (tmp & I810_BACK)
607 flags |= I810_FRONT;
1da177e4
LT
608 }
609
b5e89ed5 610 i810_kernel_lost_context(dev);
1da177e4 611
b5e89ed5
DA
612 if (nbox > I810_NR_SAREA_CLIPRECTS)
613 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 614
b5e89ed5 615 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
616 unsigned int x = pbox->x1;
617 unsigned int y = pbox->y1;
618 unsigned int width = (pbox->x2 - x) * cpp;
619 unsigned int height = pbox->y2 - y;
620 unsigned int start = y * pitch + x * cpp;
621
622 if (pbox->x1 > pbox->x2 ||
623 pbox->y1 > pbox->y2 ||
b5e89ed5 624 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
625 continue;
626
b5e89ed5
DA
627 if (flags & I810_FRONT) {
628 BEGIN_LP_RING(6);
629 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
630 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
631 OUT_RING((height << 16) | width);
632 OUT_RING(start);
633 OUT_RING(clear_color);
634 OUT_RING(0);
1da177e4
LT
635 ADVANCE_LP_RING();
636 }
637
b5e89ed5
DA
638 if (flags & I810_BACK) {
639 BEGIN_LP_RING(6);
640 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
641 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
642 OUT_RING((height << 16) | width);
643 OUT_RING(dev_priv->back_offset + start);
644 OUT_RING(clear_color);
645 OUT_RING(0);
1da177e4
LT
646 ADVANCE_LP_RING();
647 }
648
b5e89ed5
DA
649 if (flags & I810_DEPTH) {
650 BEGIN_LP_RING(6);
651 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
652 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
653 OUT_RING((height << 16) | width);
654 OUT_RING(dev_priv->depth_offset + start);
655 OUT_RING(clear_zval);
656 OUT_RING(0);
1da177e4
LT
657 ADVANCE_LP_RING();
658 }
659 }
660}
661
aca791c2 662static void i810_dma_dispatch_swap(struct drm_device *dev)
1da177e4 663{
b5e89ed5
DA
664 drm_i810_private_t *dev_priv = dev->dev_private;
665 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 666 int nbox = sarea_priv->nbox;
eddca551 667 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
668 int pitch = dev_priv->pitch;
669 int cpp = 2;
670 int i;
671 RING_LOCALS;
672
673 DRM_DEBUG("swapbuffers\n");
674
b5e89ed5 675 i810_kernel_lost_context(dev);
1da177e4 676
b5e89ed5
DA
677 if (nbox > I810_NR_SAREA_CLIPRECTS)
678 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 679
b5e89ed5 680 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
681 unsigned int w = pbox->x2 - pbox->x1;
682 unsigned int h = pbox->y2 - pbox->y1;
b5e89ed5 683 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
1da177e4
LT
684 unsigned int start = dst;
685
686 if (pbox->x1 > pbox->x2 ||
687 pbox->y1 > pbox->y2 ||
b5e89ed5 688 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
689 continue;
690
b5e89ed5
DA
691 BEGIN_LP_RING(6);
692 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
693 OUT_RING(pitch | (0xCC << 16));
694 OUT_RING((h << 16) | (w * cpp));
1da177e4 695 if (dev_priv->current_page == 0)
b5e89ed5 696 OUT_RING(dev_priv->front_offset + start);
1da177e4 697 else
b5e89ed5
DA
698 OUT_RING(dev_priv->back_offset + start);
699 OUT_RING(pitch);
1da177e4 700 if (dev_priv->current_page == 0)
b5e89ed5 701 OUT_RING(dev_priv->back_offset + start);
1da177e4 702 else
b5e89ed5 703 OUT_RING(dev_priv->front_offset + start);
1da177e4
LT
704 ADVANCE_LP_RING();
705 }
706}
707
aca791c2
NK
708static void i810_dma_dispatch_vertex(struct drm_device *dev,
709 struct drm_buf *buf, int discard, int used)
1da177e4 710{
b5e89ed5 711 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4 712 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 713 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
eddca551 714 struct drm_clip_rect *box = sarea_priv->boxes;
b5e89ed5 715 int nbox = sarea_priv->nbox;
1da177e4
LT
716 unsigned long address = (unsigned long)buf->bus_address;
717 unsigned long start = address - dev->agp->base;
718 int i = 0;
b5e89ed5 719 RING_LOCALS;
1da177e4 720
b5e89ed5 721 i810_kernel_lost_context(dev);
1da177e4 722
b5e89ed5 723 if (nbox > I810_NR_SAREA_CLIPRECTS)
1da177e4
LT
724 nbox = I810_NR_SAREA_CLIPRECTS;
725
b5e89ed5 726 if (used > 4 * 1024)
1da177e4
LT
727 used = 0;
728
729 if (sarea_priv->dirty)
b5e89ed5 730 i810EmitState(dev);
1da177e4
LT
731
732 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
733 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
734
b5e89ed5
DA
735 *(u32 *) buf_priv->kernel_virtual =
736 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
1da177e4
LT
737
738 if (used & 4) {
c7aed179 739 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
1da177e4
LT
740 used += 4;
741 }
742
743 i810_unmap_buffer(buf);
744 }
745
746 if (used) {
747 do {
748 if (i < nbox) {
749 BEGIN_LP_RING(4);
b5e89ed5
DA
750 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
751 SC_ENABLE);
752 OUT_RING(GFX_OP_SCISSOR_INFO);
753 OUT_RING(box[i].x1 | (box[i].y1 << 16));
754 OUT_RING((box[i].x2 -
755 1) | ((box[i].y2 - 1) << 16));
1da177e4
LT
756 ADVANCE_LP_RING();
757 }
758
759 BEGIN_LP_RING(4);
b5e89ed5
DA
760 OUT_RING(CMD_OP_BATCH_BUFFER);
761 OUT_RING(start | BB1_PROTECTED);
762 OUT_RING(start + used - 4);
763 OUT_RING(0);
1da177e4
LT
764 ADVANCE_LP_RING();
765
766 } while (++i < nbox);
767 }
768
769 if (discard) {
770 dev_priv->counter++;
771
b5e89ed5
DA
772 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
773 I810_BUF_HARDWARE);
1da177e4
LT
774
775 BEGIN_LP_RING(8);
b5e89ed5
DA
776 OUT_RING(CMD_STORE_DWORD_IDX);
777 OUT_RING(20);
778 OUT_RING(dev_priv->counter);
779 OUT_RING(CMD_STORE_DWORD_IDX);
780 OUT_RING(buf_priv->my_use_idx);
781 OUT_RING(I810_BUF_FREE);
782 OUT_RING(CMD_REPORT_HEAD);
783 OUT_RING(0);
1da177e4
LT
784 ADVANCE_LP_RING();
785 }
786}
787
aca791c2 788static void i810_dma_dispatch_flip(struct drm_device *dev)
1da177e4 789{
b5e89ed5 790 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
791 int pitch = dev_priv->pitch;
792 RING_LOCALS;
793
3e684eae 794 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
b5e89ed5
DA
795 dev_priv->current_page,
796 dev_priv->sarea_priv->pf_current_page);
797
798 i810_kernel_lost_context(dev);
1da177e4 799
b5e89ed5
DA
800 BEGIN_LP_RING(2);
801 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
802 OUT_RING(0);
1da177e4
LT
803 ADVANCE_LP_RING();
804
b5e89ed5 805 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
806 /* On i815 at least ASYNC is buggy */
807 /* pitch<<5 is from 11.2.8 p158,
808 its the pitch / 8 then left shifted 8,
809 so (pitch >> 3) << 8 */
b5e89ed5
DA
810 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
811 if (dev_priv->current_page == 0) {
812 OUT_RING(dev_priv->back_offset);
1da177e4
LT
813 dev_priv->current_page = 1;
814 } else {
b5e89ed5 815 OUT_RING(dev_priv->front_offset);
1da177e4
LT
816 dev_priv->current_page = 0;
817 }
818 OUT_RING(0);
819 ADVANCE_LP_RING();
820
821 BEGIN_LP_RING(2);
b5e89ed5
DA
822 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
823 OUT_RING(0);
1da177e4
LT
824 ADVANCE_LP_RING();
825
826 /* Increment the frame counter. The client-side 3D driver must
827 * throttle the framerate by waiting for this value before
828 * performing the swapbuffer ioctl.
829 */
830 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
831
832}
833
aca791c2 834static void i810_dma_quiescent(struct drm_device *dev)
1da177e4 835{
b5e89ed5
DA
836 drm_i810_private_t *dev_priv = dev->dev_private;
837 RING_LOCALS;
1da177e4 838
b5e89ed5 839 i810_kernel_lost_context(dev);
1da177e4 840
b5e89ed5
DA
841 BEGIN_LP_RING(4);
842 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
843 OUT_RING(CMD_REPORT_HEAD);
844 OUT_RING(0);
845 OUT_RING(0);
846 ADVANCE_LP_RING();
1da177e4 847
b5e89ed5 848 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4
LT
849}
850
aca791c2 851static int i810_flush_queue(struct drm_device *dev)
1da177e4 852{
b5e89ed5 853 drm_i810_private_t *dev_priv = dev->dev_private;
cdd55a29 854 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
855 int i, ret = 0;
856 RING_LOCALS;
857
b5e89ed5 858 i810_kernel_lost_context(dev);
1da177e4 859
b5e89ed5
DA
860 BEGIN_LP_RING(2);
861 OUT_RING(CMD_REPORT_HEAD);
862 OUT_RING(0);
863 ADVANCE_LP_RING();
1da177e4 864
b5e89ed5 865 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4 866
b5e89ed5 867 for (i = 0; i < dma->buf_count; i++) {
056219e2 868 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 869 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4
LT
870
871 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
872 I810_BUF_FREE);
873
874 if (used == I810_BUF_HARDWARE)
875 DRM_DEBUG("reclaimed from HARDWARE\n");
876 if (used == I810_BUF_CLIENT)
877 DRM_DEBUG("still on client\n");
878 }
879
b5e89ed5 880 return ret;
1da177e4
LT
881}
882
883/* Must be called with the lock held */
d5346b37 884void i810_driver_reclaim_buffers(struct drm_device *dev,
6c340eac 885 struct drm_file *file_priv)
1da177e4 886{
cdd55a29 887 struct drm_device_dma *dma = dev->dma;
b5e89ed5 888 int i;
1da177e4 889
b5e89ed5
DA
890 if (!dma)
891 return;
892 if (!dev->dev_private)
893 return;
894 if (!dma->buflist)
895 return;
1da177e4 896
b5e89ed5 897 i810_flush_queue(dev);
1da177e4
LT
898
899 for (i = 0; i < dma->buf_count; i++) {
056219e2 900 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 901 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 902
6c340eac 903 if (buf->file_priv == file_priv && buf_priv) {
1da177e4
LT
904 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
905 I810_BUF_FREE);
906
907 if (used == I810_BUF_CLIENT)
908 DRM_DEBUG("reclaimed from client\n");
909 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
b5e89ed5 910 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1da177e4
LT
911 }
912 }
913}
914
c153f45f
EA
915static int i810_flush_ioctl(struct drm_device *dev, void *data,
916 struct drm_file *file_priv)
1da177e4 917{
6c340eac 918 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 919
b5e89ed5
DA
920 i810_flush_queue(dev);
921 return 0;
1da177e4
LT
922}
923
c153f45f
EA
924static int i810_dma_vertex(struct drm_device *dev, void *data,
925 struct drm_file *file_priv)
1da177e4 926{
cdd55a29 927 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
928 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
929 u32 *hw_status = dev_priv->hw_status_page;
930 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
931 dev_priv->sarea_priv;
c153f45f 932 drm_i810_vertex_t *vertex = data;
1da177e4 933
6c340eac 934 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 935
3e684eae 936 DRM_DEBUG("idx %d used %d discard %d\n",
c153f45f 937 vertex->idx, vertex->used, vertex->discard);
1da177e4 938
c153f45f 939 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
1da177e4
LT
940 return -EINVAL;
941
b5e89ed5 942 i810_dma_dispatch_vertex(dev,
c153f45f
EA
943 dma->buflist[vertex->idx],
944 vertex->discard, vertex->used);
1da177e4 945
b5e89ed5
DA
946 sarea_priv->last_enqueue = dev_priv->counter - 1;
947 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
948
949 return 0;
950}
951
c153f45f
EA
952static int i810_clear_bufs(struct drm_device *dev, void *data,
953 struct drm_file *file_priv)
1da177e4 954{
c153f45f 955 drm_i810_clear_t *clear = data;
1da177e4 956
6c340eac 957 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 958
b5e89ed5 959 /* GH: Someone's doing nasty things... */
aca791c2 960 if (!dev->dev_private)
b5e89ed5 961 return -EINVAL;
1da177e4 962
c153f45f
EA
963 i810_dma_dispatch_clear(dev, clear->flags,
964 clear->clear_color, clear->clear_depth);
b5e89ed5 965 return 0;
1da177e4
LT
966}
967
c153f45f
EA
968static int i810_swap_bufs(struct drm_device *dev, void *data,
969 struct drm_file *file_priv)
1da177e4 970{
3e684eae 971 DRM_DEBUG("\n");
1da177e4 972
6c340eac 973 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 974
b5e89ed5
DA
975 i810_dma_dispatch_swap(dev);
976 return 0;
1da177e4
LT
977}
978
c153f45f
EA
979static int i810_getage(struct drm_device *dev, void *data,
980 struct drm_file *file_priv)
1da177e4 981{
b5e89ed5
DA
982 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
983 u32 *hw_status = dev_priv->hw_status_page;
984 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
985 dev_priv->sarea_priv;
986
987 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
988 return 0;
989}
990
c153f45f
EA
991static int i810_getbuf(struct drm_device *dev, void *data,
992 struct drm_file *file_priv)
1da177e4 993{
b5e89ed5 994 int retcode = 0;
c153f45f 995 drm_i810_dma_t *d = data;
b5e89ed5
DA
996 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
997 u32 *hw_status = dev_priv->hw_status_page;
998 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
999 dev_priv->sarea_priv;
1000
6c340eac 1001 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1002
c153f45f 1003 d->granted = 0;
1da177e4 1004
c153f45f 1005 retcode = i810_dma_get_buffer(dev, d, file_priv);
1da177e4
LT
1006
1007 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
ba25f9dc 1008 task_pid_nr(current), retcode, d->granted);
1da177e4 1009
b5e89ed5 1010 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1011
1012 return retcode;
1013}
1014
c153f45f
EA
1015static int i810_copybuf(struct drm_device *dev, void *data,
1016 struct drm_file *file_priv)
1da177e4
LT
1017{
1018 /* Never copy - 2.4.x doesn't need it */
1019 return 0;
1020}
1021
c153f45f
EA
1022static int i810_docopy(struct drm_device *dev, void *data,
1023 struct drm_file *file_priv)
1da177e4
LT
1024{
1025 /* Never copy - 2.4.x doesn't need it */
1026 return 0;
1027}
1028
aca791c2 1029static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
b5e89ed5 1030 unsigned int last_render)
1da177e4
LT
1031{
1032 drm_i810_private_t *dev_priv = dev->dev_private;
1033 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1034 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1035 unsigned long address = (unsigned long)buf->bus_address;
1036 unsigned long start = address - dev->agp->base;
1037 int u;
1038 RING_LOCALS;
1039
1040 i810_kernel_lost_context(dev);
1041
b5e89ed5 1042 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
aca791c2 1043 if (u != I810_BUF_CLIENT)
1da177e4 1044 DRM_DEBUG("MC found buffer that isn't mine!\n");
1da177e4 1045
b5e89ed5 1046 if (used > 4 * 1024)
1da177e4
LT
1047 used = 0;
1048
1049 sarea_priv->dirty = 0x7f;
1050
3e684eae 1051 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1da177e4
LT
1052
1053 dev_priv->counter++;
1054 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1da177e4
LT
1055 DRM_DEBUG("start : %lx\n", start);
1056 DRM_DEBUG("used : %d\n", used);
1057 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1058
1059 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1060 if (used & 4) {
c7aed179 1061 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1da177e4
LT
1062 used += 4;
1063 }
1064
1065 i810_unmap_buffer(buf);
1066 }
1067 BEGIN_LP_RING(4);
b5e89ed5
DA
1068 OUT_RING(CMD_OP_BATCH_BUFFER);
1069 OUT_RING(start | BB1_PROTECTED);
1070 OUT_RING(start + used - 4);
1071 OUT_RING(0);
1da177e4
LT
1072 ADVANCE_LP_RING();
1073
1da177e4 1074 BEGIN_LP_RING(8);
b5e89ed5
DA
1075 OUT_RING(CMD_STORE_DWORD_IDX);
1076 OUT_RING(buf_priv->my_use_idx);
1077 OUT_RING(I810_BUF_FREE);
1078 OUT_RING(0);
1079
1080 OUT_RING(CMD_STORE_DWORD_IDX);
1081 OUT_RING(16);
1082 OUT_RING(last_render);
1083 OUT_RING(0);
1da177e4
LT
1084 ADVANCE_LP_RING();
1085}
1086
c153f45f
EA
1087static int i810_dma_mc(struct drm_device *dev, void *data,
1088 struct drm_file *file_priv)
1da177e4 1089{
cdd55a29 1090 struct drm_device_dma *dma = dev->dma;
b5e89ed5 1091 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4
LT
1092 u32 *hw_status = dev_priv->hw_status_page;
1093 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 1094 dev_priv->sarea_priv;
c153f45f 1095 drm_i810_mc_t *mc = data;
1da177e4 1096
6c340eac 1097 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1098
c153f45f 1099 if (mc->idx >= dma->buf_count || mc->idx < 0)
1da177e4
LT
1100 return -EINVAL;
1101
c153f45f
EA
1102 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1103 mc->last_render);
1da177e4 1104
b5e89ed5
DA
1105 sarea_priv->last_enqueue = dev_priv->counter - 1;
1106 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1107
1108 return 0;
1109}
1110
c153f45f
EA
1111static int i810_rstatus(struct drm_device *dev, void *data,
1112 struct drm_file *file_priv)
1da177e4 1113{
b5e89ed5 1114 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1115
b5e89ed5 1116 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1da177e4
LT
1117}
1118
c153f45f
EA
1119static int i810_ov0_info(struct drm_device *dev, void *data,
1120 struct drm_file *file_priv)
1da177e4 1121{
b5e89ed5 1122 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
c153f45f
EA
1123 drm_i810_overlay_t *ov = data;
1124
1125 ov->offset = dev_priv->overlay_offset;
1126 ov->physical = dev_priv->overlay_physical;
1da177e4 1127
1da177e4
LT
1128 return 0;
1129}
1130
c153f45f
EA
1131static int i810_fstatus(struct drm_device *dev, void *data,
1132 struct drm_file *file_priv)
1da177e4 1133{
b5e89ed5 1134 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1135
6c340eac 1136 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT
1137 return I810_READ(0x30008);
1138}
1139
c153f45f
EA
1140static int i810_ov0_flip(struct drm_device *dev, void *data,
1141 struct drm_file *file_priv)
1da177e4 1142{
b5e89ed5 1143 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1144
6c340eac 1145 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1146
aca791c2 1147 /* Tell the overlay to update */
b5e89ed5 1148 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1da177e4
LT
1149
1150 return 0;
1151}
1152
1da177e4 1153/* Not sure why this isn't set all the time:
b5e89ed5 1154 */
aca791c2 1155static void i810_do_init_pageflip(struct drm_device *dev)
1da177e4
LT
1156{
1157 drm_i810_private_t *dev_priv = dev->dev_private;
b5e89ed5 1158
3e684eae 1159 DRM_DEBUG("\n");
1da177e4
LT
1160 dev_priv->page_flipping = 1;
1161 dev_priv->current_page = 0;
1162 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1163}
1164
aca791c2 1165static int i810_do_cleanup_pageflip(struct drm_device *dev)
1da177e4
LT
1166{
1167 drm_i810_private_t *dev_priv = dev->dev_private;
1168
3e684eae 1169 DRM_DEBUG("\n");
1da177e4 1170 if (dev_priv->current_page != 0)
b5e89ed5 1171 i810_dma_dispatch_flip(dev);
1da177e4
LT
1172
1173 dev_priv->page_flipping = 0;
1174 return 0;
1175}
1176
c153f45f
EA
1177static int i810_flip_bufs(struct drm_device *dev, void *data,
1178 struct drm_file *file_priv)
1da177e4 1179{
1da177e4
LT
1180 drm_i810_private_t *dev_priv = dev->dev_private;
1181
3e684eae 1182 DRM_DEBUG("\n");
1da177e4 1183
6c340eac 1184 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1185
b5e89ed5
DA
1186 if (!dev_priv->page_flipping)
1187 i810_do_init_pageflip(dev);
1da177e4 1188
b5e89ed5
DA
1189 i810_dma_dispatch_flip(dev);
1190 return 0;
1da177e4
LT
1191}
1192
eddca551 1193int i810_driver_load(struct drm_device *dev, unsigned long flags)
22eae947 1194{
24986ee0
DV
1195 /* Our userspace depends upon the agp mapping support. */
1196 if (!dev->agp)
1197 return -EINVAL;
1198
466e69b8
DA
1199 pci_set_master(dev->pdev);
1200
22eae947
DA
1201 return 0;
1202}
1203
aca791c2 1204void i810_driver_lastclose(struct drm_device *dev)
1da177e4 1205{
b5e89ed5 1206 i810_dma_cleanup(dev);
1da177e4
LT
1207}
1208
aca791c2 1209void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1da177e4
LT
1210{
1211 if (dev->dev_private) {
1212 drm_i810_private_t *dev_priv = dev->dev_private;
aca791c2 1213 if (dev_priv->page_flipping)
1da177e4 1214 i810_do_cleanup_pageflip(dev);
1da177e4 1215 }
1da177e4 1216
d5346b37 1217 if (file_priv->master && file_priv->master->lock.hw_lock) {
bb6d822e 1218 drm_legacy_idlelock_take(&file_priv->master->lock);
d5346b37 1219 i810_driver_reclaim_buffers(dev, file_priv);
bb6d822e 1220 drm_legacy_idlelock_release(&file_priv->master->lock);
d5346b37
DV
1221 } else {
1222 /* master disappeared, clean up stuff anyway and hope nothing
1223 * goes wrong */
1224 i810_driver_reclaim_buffers(dev, file_priv);
1225 }
1226
1da177e4
LT
1227}
1228
aca791c2 1229int i810_driver_dma_quiescent(struct drm_device *dev)
1da177e4 1230{
b5e89ed5 1231 i810_dma_quiescent(dev);
1da177e4
LT
1232 return 0;
1233}
1234
baa70943 1235const struct drm_ioctl_desc i810_ioctls[] = {
1b2f1489
DA
1236 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1237 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1238 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1239 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1240 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1241 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1242 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1243 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1244 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1245 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1246 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1247 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1248 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1249 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1250 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1da177e4
LT
1251};
1252
f95aeb17 1253int i810_max_ioctl = ARRAY_SIZE(i810_ioctls);
cda17380
DA
1254
1255/**
1256 * Determine if the device really is AGP or not.
1257 *
1258 * All Intel graphics chipsets are treated as AGP, even if they are really
1259 * PCI-e.
1260 *
1261 * \param dev The device to be tested.
1262 *
1263 * \returns
1264 * A value of 1 is always retured to indictate every i810 is AGP.
1265 */
aca791c2 1266int i810_driver_device_is_agp(struct drm_device *dev)
cda17380
DA
1267{
1268 return 1;
1269}
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