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drm/i915: Convert (void)I915_READ to POSTING_READ
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c
CommitLineData
2017263e
BG		 1/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
f3cd474b 30#include <linux/debugfs.h>
5a0e3ad6 31#include <linux/slab.h>
2017263e
BG		 32#include "drmP.h"
33#include "drm.h"
4e5359cd 34#include "intel_drv.h"
e5c65260 35#include "intel_ringbuffer.h"
2017263e
BG		 36#include "i915_drm.h"
37#include "i915_drv.h"
38
39#define DRM_I915_RING_DEBUG 1
40
41
42#if defined(CONFIG_DEBUG_FS)
43
f13d3f73 44enum {
69dc4987 45 ACTIVE_LIST,
f13d3f73
CW		 46 FLUSHING_LIST,
47 INACTIVE_LIST,
d21d5975
CW		 48 PINNED_LIST,
49 DEFERRED_FREE_LIST,
f13d3f73 50};
2017263e 51
70d39fe4
CW		 52static const char *yesno(int v)
53{
54 return v ? "yes" : "no";
55}
56
57static int i915_capabilities(struct seq_file *m, void *data)
58{
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
62
63 seq_printf(m, "gen: %d\n", info->gen);
64#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 B(is_mobile);
70d39fe4
CW		 66 B(is_i85x);
67 B(is_i915g);
70d39fe4 68 B(is_i945gm);
70d39fe4
CW		 69 B(is_g33);
70 B(need_gfx_hws);
71 B(is_g4x);
72 B(is_pineview);
73 B(is_broadwater);
74 B(is_crestline);
70d39fe4
CW		 75 B(has_fbc);
76 B(has_rc6);
77 B(has_pipe_cxsr);
78 B(has_hotplug);
79 B(cursor_needs_physical);
80 B(has_overlay);
81 B(overlay_needs_physical);
a6c45cf0 82 B(supports_tv);
549f7365
CW		 83 B(has_bsd_ring);
84 B(has_blt_ring);
70d39fe4
CW		 85#undef B
86
87 return 0;
88}
2017263e 89
a6172a80
CW		 90static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
91{
92 if (obj_priv->user_pin_count > 0)
93 return "P";
94 else if (obj_priv->pin_count > 0)
95 return "p";
96 else
97 return " ";
98}
99
100static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
101{
102 switch (obj_priv->tiling_mode) {
103 default:
104 case I915_TILING_NONE: return " ";
105 case I915_TILING_X: return "X";
106 case I915_TILING_Y: return "Y";
107 }
108}
109
37811fcc
CW		 110static void
111describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
112{
113 seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
114 &obj->base,
115 get_pin_flag(obj),
116 get_tiling_flag(obj),
117 obj->base.size,
118 obj->base.read_domains,
119 obj->base.write_domain,
120 obj->last_rendering_seqno,
121 obj->dirty ? " dirty" : "",
122 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
123 if (obj->base.name)
124 seq_printf(m, " (name: %d)", obj->base.name);
125 if (obj->fence_reg != I915_FENCE_REG_NONE)
126 seq_printf(m, " (fence: %d)", obj->fence_reg);
127 if (obj->gtt_space != NULL)
a00b10c3
CW		 128 seq_printf(m, " (gtt offset: %08x, size: %08x)",
129 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
fb7d516a
DV		 130 if (obj->pin_mappable || obj->fault_mappable)
131 seq_printf(m, " (mappable)");
69dc4987
CW		 132 if (obj->ring != NULL)
133 seq_printf(m, " (%s)", obj->ring->name);
37811fcc
CW		 134}
135
433e12f7 136static int i915_gem_object_list_info(struct seq_file *m, void *data)
2017263e
BG		 137{
138 struct drm_info_node *node = (struct drm_info_node *) m->private;
433e12f7
BG		 139 uintptr_t list = (uintptr_t) node->info_ent->data;
140 struct list_head *head;
2017263e
BG		 141 struct drm_device *dev = node->minor->dev;
142 drm_i915_private_t *dev_priv = dev->dev_private;
143 struct drm_i915_gem_object *obj_priv;
8f2480fb
CW		 144 size_t total_obj_size, total_gtt_size;
145 int count, ret;
de227ef0
CW		 146
147 ret = mutex_lock_interruptible(&dev->struct_mutex);
148 if (ret)
149 return ret;
2017263e 150
433e12f7
BG		 151 switch (list) {
152 case ACTIVE_LIST:
153 seq_printf(m, "Active:\n");
69dc4987 154 head = &dev_priv->mm.active_list;
433e12f7
BG		 155 break;
156 case INACTIVE_LIST:
a17458fc 157 seq_printf(m, "Inactive:\n");
433e12f7
BG		 158 head = &dev_priv->mm.inactive_list;
159 break;
f13d3f73
CW		 160 case PINNED_LIST:
161 seq_printf(m, "Pinned:\n");
162 head = &dev_priv->mm.pinned_list;
163 break;
433e12f7
BG		 164 case FLUSHING_LIST:
165 seq_printf(m, "Flushing:\n");
166 head = &dev_priv->mm.flushing_list;
167 break;
d21d5975
CW		 168 case DEFERRED_FREE_LIST:
169 seq_printf(m, "Deferred free:\n");
170 head = &dev_priv->mm.deferred_free_list;
171 break;
433e12f7 172 default:
de227ef0
CW		 173 mutex_unlock(&dev->struct_mutex);
174 return -EINVAL;
2017263e 175 }
2017263e 176
8f2480fb 177 total_obj_size = total_gtt_size = count = 0;
69dc4987 178 list_for_each_entry(obj_priv, head, mm_list) {
37811fcc
CW		 179 seq_printf(m, " ");
180 describe_obj(m, obj_priv);
f4ceda89 181 seq_printf(m, "\n");
8f2480fb
CW		 182 total_obj_size += obj_priv->base.size;
183 total_gtt_size += obj_priv->gtt_space->size;
184 count++;
2017263e 185 }
de227ef0 186 mutex_unlock(&dev->struct_mutex);
5e118f41 187
8f2480fb
CW		 188 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
189 count, total_obj_size, total_gtt_size);
2017263e
BG		 190 return 0;
191}
192
73aa808f
CW		 193static int i915_gem_object_info(struct seq_file *m, void* data)
194{
195 struct drm_info_node *node = (struct drm_info_node *) m->private;
196 struct drm_device *dev = node->minor->dev;
197 struct drm_i915_private *dev_priv = dev->dev_private;
198 int ret;
199
200 ret = mutex_lock_interruptible(&dev->struct_mutex);
201 if (ret)
202 return ret;
203
204 seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
205 seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
206 seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
207 seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
fb7d516a
DV		 208 seq_printf(m, "%u mappable objects in gtt\n", dev_priv->mm.gtt_mappable_count);
209 seq_printf(m, "%zu mappable gtt bytes\n", dev_priv->mm.gtt_mappable_memory);
210 seq_printf(m, "%zu mappable gtt used bytes\n", dev_priv->mm.mappable_gtt_used);
211 seq_printf(m, "%zu mappable gtt total\n", dev_priv->mm.mappable_gtt_total);
73aa808f
CW		 212 seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
213 seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
214 seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
215
216 mutex_unlock(&dev->struct_mutex);
217
218 return 0;
219}
220
221
4e5359cd
SF		 222static int i915_gem_pageflip_info(struct seq_file *m, void *data)
223{
224 struct drm_info_node *node = (struct drm_info_node *) m->private;
225 struct drm_device *dev = node->minor->dev;
226 unsigned long flags;
227 struct intel_crtc *crtc;
228
229 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
230 const char *pipe = crtc->pipe ? "B" : "A";
231 const char *plane = crtc->plane ? "B" : "A";
232 struct intel_unpin_work *work;
233
234 spin_lock_irqsave(&dev->event_lock, flags);
235 work = crtc->unpin_work;
236 if (work == NULL) {
237 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
238 pipe, plane);
239 } else {
240 if (!work->pending) {
241 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
242 pipe, plane);
243 } else {
244 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
245 pipe, plane);
246 }
247 if (work->enable_stall_check)
248 seq_printf(m, "Stall check enabled, ");
249 else
250 seq_printf(m, "Stall check waiting for page flip ioctl, ");
251 seq_printf(m, "%d prepares\n", work->pending);
252
253 if (work->old_fb_obj) {
254 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
255 if(obj_priv)
256 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
257 }
258 if (work->pending_flip_obj) {
259 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
260 if(obj_priv)
261 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
262 }
263 }
264 spin_unlock_irqrestore(&dev->event_lock, flags);
265 }
266
267 return 0;
268}
269
2017263e
BG		 270static int i915_gem_request_info(struct seq_file *m, void *data)
271{
272 struct drm_info_node *node = (struct drm_info_node *) m->private;
273 struct drm_device *dev = node->minor->dev;
274 drm_i915_private_t *dev_priv = dev->dev_private;
275 struct drm_i915_gem_request *gem_request;
c2c347a9 276 int ret, count;
de227ef0
CW		 277
278 ret = mutex_lock_interruptible(&dev->struct_mutex);
279 if (ret)
280 return ret;
2017263e 281
c2c347a9
CW		 282 count = 0;
283 if (!list_empty(&dev_priv->render_ring.request_list)) {
284 seq_printf(m, "Render requests:\n");
285 list_for_each_entry(gem_request,
286 &dev_priv->render_ring.request_list,
287 list) {
288 seq_printf(m, " %d @ %d\n",
289 gem_request->seqno,
290 (int) (jiffies - gem_request->emitted_jiffies));
291 }
292 count++;
293 }
294 if (!list_empty(&dev_priv->bsd_ring.request_list)) {
295 seq_printf(m, "BSD requests:\n");
296 list_for_each_entry(gem_request,
297 &dev_priv->bsd_ring.request_list,
298 list) {
299 seq_printf(m, " %d @ %d\n",
300 gem_request->seqno,
301 (int) (jiffies - gem_request->emitted_jiffies));
302 }
303 count++;
304 }
305 if (!list_empty(&dev_priv->blt_ring.request_list)) {
306 seq_printf(m, "BLT requests:\n");
307 list_for_each_entry(gem_request,
308 &dev_priv->blt_ring.request_list,
309 list) {
310 seq_printf(m, " %d @ %d\n",
311 gem_request->seqno,
312 (int) (jiffies - gem_request->emitted_jiffies));
313 }
314 count++;
2017263e 315 }
de227ef0
CW		 316 mutex_unlock(&dev->struct_mutex);
317
c2c347a9
CW		 318 if (count == 0)
319 seq_printf(m, "No requests\n");
320
2017263e
BG		 321 return 0;
322}
323
b2223497
CW		 324static void i915_ring_seqno_info(struct seq_file *m,
325 struct intel_ring_buffer *ring)
326{
327 if (ring->get_seqno) {
328 seq_printf(m, "Current sequence (%s): %d\n",
329 ring->name, ring->get_seqno(ring));
330 seq_printf(m, "Waiter sequence (%s): %d\n",
331 ring->name, ring->waiting_seqno);
332 seq_printf(m, "IRQ sequence (%s): %d\n",
333 ring->name, ring->irq_seqno);
334 }
335}
336
2017263e
BG		 337static int i915_gem_seqno_info(struct seq_file *m, void *data)
338{
339 struct drm_info_node *node = (struct drm_info_node *) m->private;
340 struct drm_device *dev = node->minor->dev;
341 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 342 int ret;
343
344 ret = mutex_lock_interruptible(&dev->struct_mutex);
345 if (ret)
346 return ret;
2017263e 347
b2223497
CW		 348 i915_ring_seqno_info(m, &dev_priv->render_ring);
349 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
350 i915_ring_seqno_info(m, &dev_priv->blt_ring);
de227ef0
CW		 351
352 mutex_unlock(&dev->struct_mutex);
353
2017263e
BG		 354 return 0;
355}
356
357
358static int i915_interrupt_info(struct seq_file *m, void *data)
359{
360 struct drm_info_node *node = (struct drm_info_node *) m->private;
361 struct drm_device *dev = node->minor->dev;
362 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 363 int ret;
364
365 ret = mutex_lock_interruptible(&dev->struct_mutex);
366 if (ret)
367 return ret;
2017263e 368
bad720ff 369 if (!HAS_PCH_SPLIT(dev)) {
5f6a1695
ZW		 370 seq_printf(m, "Interrupt enable: %08x\n",
371 I915_READ(IER));
372 seq_printf(m, "Interrupt identity: %08x\n",
373 I915_READ(IIR));
374 seq_printf(m, "Interrupt mask: %08x\n",
375 I915_READ(IMR));
376 seq_printf(m, "Pipe A stat: %08x\n",
377 I915_READ(PIPEASTAT));
378 seq_printf(m, "Pipe B stat: %08x\n",
379 I915_READ(PIPEBSTAT));
380 } else {
381 seq_printf(m, "North Display Interrupt enable: %08x\n",
382 I915_READ(DEIER));
383 seq_printf(m, "North Display Interrupt identity: %08x\n",
384 I915_READ(DEIIR));
385 seq_printf(m, "North Display Interrupt mask: %08x\n",
386 I915_READ(DEIMR));
387 seq_printf(m, "South Display Interrupt enable: %08x\n",
388 I915_READ(SDEIER));
389 seq_printf(m, "South Display Interrupt identity: %08x\n",
390 I915_READ(SDEIIR));
391 seq_printf(m, "South Display Interrupt mask: %08x\n",
392 I915_READ(SDEIMR));
393 seq_printf(m, "Graphics Interrupt enable: %08x\n",
394 I915_READ(GTIER));
395 seq_printf(m, "Graphics Interrupt identity: %08x\n",
396 I915_READ(GTIIR));
397 seq_printf(m, "Graphics Interrupt mask: %08x\n",
398 I915_READ(GTIMR));
399 }
2017263e
BG		 400 seq_printf(m, "Interrupts received: %d\n",
401 atomic_read(&dev_priv->irq_received));
b2223497
CW		 402 i915_ring_seqno_info(m, &dev_priv->render_ring);
403 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
404 i915_ring_seqno_info(m, &dev_priv->blt_ring);
de227ef0
CW		 405 mutex_unlock(&dev->struct_mutex);
406
2017263e
BG		 407 return 0;
408}
409
a6172a80
CW		 410static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
411{
412 struct drm_info_node *node = (struct drm_info_node *) m->private;
413 struct drm_device *dev = node->minor->dev;
414 drm_i915_private_t *dev_priv = dev->dev_private;
de227ef0
CW		 415 int i, ret;
416
417 ret = mutex_lock_interruptible(&dev->struct_mutex);
418 if (ret)
419 return ret;
a6172a80
CW		 420
421 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
422 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
423 for (i = 0; i < dev_priv->num_fence_regs; i++) {
424 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
425
c2c347a9
CW		 426 seq_printf(m, "Fenced object[%2d] = ", i);
427 if (obj == NULL)
428 seq_printf(m, "unused");
429 else
430 describe_obj(m, to_intel_bo(obj));
431 seq_printf(m, "\n");
a6172a80 432 }
de227ef0 433 mutex_unlock(&dev->struct_mutex);
a6172a80
CW		 434
435 return 0;
436}
437
2017263e
BG		 438static int i915_hws_info(struct seq_file *m, void *data)
439{
440 struct drm_info_node *node = (struct drm_info_node *) m->private;
441 struct drm_device *dev = node->minor->dev;
442 drm_i915_private_t *dev_priv = dev->dev_private;
4066c0ae 443 struct intel_ring_buffer *ring;
2017263e 444 volatile u32 *hws;
4066c0ae
CW		 445 int i;
446
447 switch ((uintptr_t)node->info_ent->data) {
e5c65260
CW		 448 case RING_RENDER: ring = &dev_priv->render_ring; break;
449 case RING_BSD: ring = &dev_priv->bsd_ring; break;
450 case RING_BLT: ring = &dev_priv->blt_ring; break;
4066c0ae
CW		 451 default: return -EINVAL;
452 }
2017263e 453
4066c0ae 454 hws = (volatile u32 *)ring->status_page.page_addr;
2017263e
BG		 455 if (hws == NULL)
456 return 0;
457
458 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
459 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
460 i * 4,
461 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
462 }
463 return 0;
464}
465
5cdf5881
CW		 466static void i915_dump_object(struct seq_file *m,
467 struct io_mapping *mapping,
468 struct drm_i915_gem_object *obj_priv)
6911a9b8 469{
5cdf5881 470 int page, page_count, i;
6911a9b8 471
5cdf5881 472 page_count = obj_priv->base.size / PAGE_SIZE;
6911a9b8 473 for (page = 0; page < page_count; page++) {
5cdf5881
CW		 474 u32 *mem = io_mapping_map_wc(mapping,
475 obj_priv->gtt_offset + page * PAGE_SIZE);
6911a9b8
BG		 476 for (i = 0; i < PAGE_SIZE; i += 4)
477 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
5cdf5881 478 io_mapping_unmap(mem);
6911a9b8
BG		 479 }
480}
481
482static int i915_batchbuffer_info(struct seq_file *m, void *data)
483{
484 struct drm_info_node *node = (struct drm_info_node *) m->private;
485 struct drm_device *dev = node->minor->dev;
486 drm_i915_private_t *dev_priv = dev->dev_private;
487 struct drm_gem_object *obj;
488 struct drm_i915_gem_object *obj_priv;
489 int ret;
490
de227ef0
CW		 491 ret = mutex_lock_interruptible(&dev->struct_mutex);
492 if (ret)
493 return ret;
6911a9b8 494
69dc4987 495 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, mm_list) {
a8089e84 496 obj = &obj_priv->base;
6911a9b8 497 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
5cdf5881
CW		 498 seq_printf(m, "--- gtt_offset = 0x%08x\n",
499 obj_priv->gtt_offset);
500 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj_priv);
6911a9b8
BG		 501 }
502 }
503
de227ef0 504 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG		 505
506 return 0;
507}
508
509static int i915_ringbuffer_data(struct seq_file *m, void *data)
510{
511 struct drm_info_node *node = (struct drm_info_node *) m->private;
512 struct drm_device *dev = node->minor->dev;
513 drm_i915_private_t *dev_priv = dev->dev_private;
c2c347a9 514 struct intel_ring_buffer *ring;
de227ef0
CW		 515 int ret;
516
c2c347a9 517 switch ((uintptr_t)node->info_ent->data) {
e5c65260
CW		 518 case RING_RENDER: ring = &dev_priv->render_ring; break;
519 case RING_BSD: ring = &dev_priv->bsd_ring; break;
520 case RING_BLT: ring = &dev_priv->blt_ring; break;
c2c347a9
CW		 521 default: return -EINVAL;
522 }
523
de227ef0
CW		 524 ret = mutex_lock_interruptible(&dev->struct_mutex);
525 if (ret)
526 return ret;
6911a9b8 527
c2c347a9 528 if (!ring->gem_object) {
6911a9b8 529 seq_printf(m, "No ringbuffer setup\n");
de227ef0 530 } else {
c2c347a9 531 u8 *virt = ring->virtual_start;
de227ef0 532 uint32_t off;
6911a9b8 533
c2c347a9 534 for (off = 0; off < ring->size; off += 4) {
de227ef0
CW		 535 uint32_t *ptr = (uint32_t *)(virt + off);
536 seq_printf(m, "%08x : %08x\n", off, *ptr);
537 }
6911a9b8 538 }
de227ef0 539 mutex_unlock(&dev->struct_mutex);
6911a9b8
BG		 540
541 return 0;
542}
543
544static int i915_ringbuffer_info(struct seq_file *m, void *data)
545{
546 struct drm_info_node *node = (struct drm_info_node *) m->private;
547 struct drm_device *dev = node->minor->dev;
548 drm_i915_private_t *dev_priv = dev->dev_private;
c2c347a9
CW		 549 struct intel_ring_buffer *ring;
550
551 switch ((uintptr_t)node->info_ent->data) {
e5c65260
CW		 552 case RING_RENDER: ring = &dev_priv->render_ring; break;
553 case RING_BSD: ring = &dev_priv->bsd_ring; break;
554 case RING_BLT: ring = &dev_priv->blt_ring; break;
c2c347a9
CW		 555 default: return -EINVAL;
556 }
6911a9b8 557
c2c347a9
CW		 558 if (ring->size == 0)
559 return 0;
6911a9b8 560
c2c347a9
CW		 561 seq_printf(m, "Ring %s:\n", ring->name);
562 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
563 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
564 seq_printf(m, " Size : %08x\n", ring->size);
565 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
566 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
567 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
6911a9b8
BG		 568
569 return 0;
570}
571
e5c65260
CW		 572static const char *ring_str(int ring)
573{
574 switch (ring) {
575 case RING_RENDER: return "render";
576 case RING_BSD: return "bsd";
577 case RING_BLT: return "blt";
578 default: return "";
579 }
580}
581
9df30794
CW		 582static const char *pin_flag(int pinned)
583{
584 if (pinned > 0)
585 return " P";
586 else if (pinned < 0)
587 return " p";
588 else
589 return "";
590}
591
592static const char *tiling_flag(int tiling)
593{
594 switch (tiling) {
595 default:
596 case I915_TILING_NONE: return "";
597 case I915_TILING_X: return " X";
598 case I915_TILING_Y: return " Y";
599 }
600}
601
602static const char *dirty_flag(int dirty)
603{
604 return dirty ? " dirty" : "";
605}
606
607static const char *purgeable_flag(int purgeable)
608{
609 return purgeable ? " purgeable" : "";
610}
611
63eeaf38
JB		 612static int i915_error_state(struct seq_file *m, void *unused)
613{
614 struct drm_info_node *node = (struct drm_info_node *) m->private;
615 struct drm_device *dev = node->minor->dev;
616 drm_i915_private_t *dev_priv = dev->dev_private;
617 struct drm_i915_error_state *error;
618 unsigned long flags;
9df30794 619 int i, page, offset, elt;
63eeaf38
JB		 620
621 spin_lock_irqsave(&dev_priv->error_lock, flags);
622 if (!dev_priv->first_error) {
623 seq_printf(m, "no error state collected\n");
624 goto out;
625 }
626
627 error = dev_priv->first_error;
628
8a905236
JB		 629 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
630 error->time.tv_usec);
9df30794 631 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
1d8f38f4
CW		 632 seq_printf(m, "EIR: 0x%08x\n", error->eir);
633 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
f406839f
CW		 634 if (INTEL_INFO(dev)->gen >= 6) {
635 seq_printf(m, "ERROR: 0x%08x\n", error->error);
1d8f38f4
CW		 636 seq_printf(m, "Blitter command stream:\n");
637 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
1d8f38f4 638 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
e5c65260 639 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
1d8f38f4
CW		 640 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
641 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
add354dd
CW		 642 seq_printf(m, "Video (BSD) command stream:\n");
643 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
add354dd 644 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
e5c65260 645 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
add354dd
CW		 646 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
647 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
f406839f 648 }
1d8f38f4
CW		 649 seq_printf(m, "Render command stream:\n");
650 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
63eeaf38
JB		 651 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
652 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
653 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
a6c45cf0 654 if (INTEL_INFO(dev)->gen >= 4) {
63eeaf38 655 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
1d8f38f4 656 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
63eeaf38 657 }
1d8f38f4
CW		 658 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
659 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
9df30794
CW		 660
661 if (error->active_bo_count) {
662 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
663
664 for (i = 0; i < error->active_bo_count; i++) {
e5c65260 665 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s %s",
9df30794
CW		 666 error->active_bo[i].gtt_offset,
667 error->active_bo[i].size,
668 error->active_bo[i].read_domains,
669 error->active_bo[i].write_domain,
670 error->active_bo[i].seqno,
671 pin_flag(error->active_bo[i].pinned),
672 tiling_flag(error->active_bo[i].tiling),
673 dirty_flag(error->active_bo[i].dirty),
e5c65260
CW		 674 purgeable_flag(error->active_bo[i].purgeable),
675 ring_str(error->active_bo[i].ring));
9df30794
CW		 676
677 if (error->active_bo[i].name)
678 seq_printf(m, " (name: %d)", error->active_bo[i].name);
679 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
680 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
681
682 seq_printf(m, "\n");
683 }
684 }
685
686 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
687 if (error->batchbuffer[i]) {
688 struct drm_i915_error_object *obj = error->batchbuffer[i];
689
690 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
691 offset = 0;
692 for (page = 0; page < obj->page_count; page++) {
693 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
694 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
695 offset += 4;
696 }
697 }
698 }
699 }
700
701 if (error->ringbuffer) {
702 struct drm_i915_error_object *obj = error->ringbuffer;
703
704 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
705 offset = 0;
706 for (page = 0; page < obj->page_count; page++) {
707 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
708 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
709 offset += 4;
710 }
711 }
712 }
63eeaf38 713
6ef3d427
CW		 714 if (error->overlay)
715 intel_overlay_print_error_state(m, error->overlay);
716
63eeaf38
JB		 717out:
718 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
719
720 return 0;
721}
6911a9b8 722
f97108d1
JB		 723static int i915_rstdby_delays(struct seq_file *m, void *unused)
724{
725 struct drm_info_node *node = (struct drm_info_node *) m->private;
726 struct drm_device *dev = node->minor->dev;
727 drm_i915_private_t *dev_priv = dev->dev_private;
728 u16 crstanddelay = I915_READ16(CRSTANDVID);
729
730 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
731
732 return 0;
733}
734
735static int i915_cur_delayinfo(struct seq_file *m, void *unused)
736{
737 struct drm_info_node *node = (struct drm_info_node *) m->private;
738 struct drm_device *dev = node->minor->dev;
739 drm_i915_private_t *dev_priv = dev->dev_private;
740 u16 rgvswctl = I915_READ16(MEMSWCTL);
7648fa99 741 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
f97108d1 742
7648fa99
JB		 743 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
744 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
745 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
746 MEMSTAT_VID_SHIFT);
747 seq_printf(m, "Current P-state: %d\n",
748 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
f97108d1
JB		 749
750 return 0;
751}
752
753static int i915_delayfreq_table(struct seq_file *m, void *unused)
754{
755 struct drm_info_node *node = (struct drm_info_node *) m->private;
756 struct drm_device *dev = node->minor->dev;
757 drm_i915_private_t *dev_priv = dev->dev_private;
758 u32 delayfreq;
759 int i;
760
761 for (i = 0; i < 16; i++) {
762 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
7648fa99
JB		 763 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
764 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
f97108d1
JB		 765 }
766
767 return 0;
768}
769
770static inline int MAP_TO_MV(int map)
771{
772 return 1250 - (map * 25);
773}
774
775static int i915_inttoext_table(struct seq_file *m, void *unused)
776{
777 struct drm_info_node *node = (struct drm_info_node *) m->private;
778 struct drm_device *dev = node->minor->dev;
779 drm_i915_private_t *dev_priv = dev->dev_private;
780 u32 inttoext;
781 int i;
782
783 for (i = 1; i <= 32; i++) {
784 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
785 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
786 }
787
788 return 0;
789}
790
791static int i915_drpc_info(struct seq_file *m, void *unused)
792{
793 struct drm_info_node *node = (struct drm_info_node *) m->private;
794 struct drm_device *dev = node->minor->dev;
795 drm_i915_private_t *dev_priv = dev->dev_private;
796 u32 rgvmodectl = I915_READ(MEMMODECTL);
7648fa99
JB		 797 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
798 u16 crstandvid = I915_READ16(CRSTANDVID);
f97108d1
JB		 799
800 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
801 "yes" : "no");
802 seq_printf(m, "Boost freq: %d\n",
803 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
804 MEMMODE_BOOST_FREQ_SHIFT);
805 seq_printf(m, "HW control enabled: %s\n",
806 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
807 seq_printf(m, "SW control enabled: %s\n",
808 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
809 seq_printf(m, "Gated voltage change: %s\n",
810 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
811 seq_printf(m, "Starting frequency: P%d\n",
812 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
7648fa99 813 seq_printf(m, "Max P-state: P%d\n",
f97108d1 814 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
7648fa99
JB		 815 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
816 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
817 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
818 seq_printf(m, "Render standby enabled: %s\n",
819 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
f97108d1
JB		 820
821 return 0;
822}
823
b5e50c3f
JB		 824static int i915_fbc_status(struct seq_file *m, void *unused)
825{
826 struct drm_info_node *node = (struct drm_info_node *) m->private;
827 struct drm_device *dev = node->minor->dev;
b5e50c3f 828 drm_i915_private_t *dev_priv = dev->dev_private;
b5e50c3f 829
ee5382ae 830 if (!I915_HAS_FBC(dev)) {
b5e50c3f
JB		 831 seq_printf(m, "FBC unsupported on this chipset\n");
832 return 0;
833 }
834
ee5382ae 835 if (intel_fbc_enabled(dev)) {
b5e50c3f
JB		 836 seq_printf(m, "FBC enabled\n");
837 } else {
838 seq_printf(m, "FBC disabled: ");
839 switch (dev_priv->no_fbc_reason) {
bed4a673
CW		 840 case FBC_NO_OUTPUT:
841 seq_printf(m, "no outputs");
842 break;
b5e50c3f
JB		 843 case FBC_STOLEN_TOO_SMALL:
844 seq_printf(m, "not enough stolen memory");
845 break;
846 case FBC_UNSUPPORTED_MODE:
847 seq_printf(m, "mode not supported");
848 break;
849 case FBC_MODE_TOO_LARGE:
850 seq_printf(m, "mode too large");
851 break;
852 case FBC_BAD_PLANE:
853 seq_printf(m, "FBC unsupported on plane");
854 break;
855 case FBC_NOT_TILED:
856 seq_printf(m, "scanout buffer not tiled");
857 break;
9c928d16
JB		 858 case FBC_MULTIPLE_PIPES:
859 seq_printf(m, "multiple pipes are enabled");
860 break;
b5e50c3f
JB		 861 default:
862 seq_printf(m, "unknown reason");
863 }
864 seq_printf(m, "\n");
865 }
866 return 0;
867}
868
4a9bef37
JB		 869static int i915_sr_status(struct seq_file *m, void *unused)
870{
871 struct drm_info_node *node = (struct drm_info_node *) m->private;
872 struct drm_device *dev = node->minor->dev;
873 drm_i915_private_t *dev_priv = dev->dev_private;
874 bool sr_enabled = false;
875
f00a3ddf 876 if (IS_GEN5(dev))
5ba2aaaa 877 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
a6c45cf0 878 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
4a9bef37
JB		 879 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
880 else if (IS_I915GM(dev))
881 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
882 else if (IS_PINEVIEW(dev))
883 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
884
5ba2aaaa
CW		 885 seq_printf(m, "self-refresh: %s\n",
886 sr_enabled ? "enabled" : "disabled");
4a9bef37
JB		 887
888 return 0;
889}
890
7648fa99
JB		 891static int i915_emon_status(struct seq_file *m, void *unused)
892{
893 struct drm_info_node *node = (struct drm_info_node *) m->private;
894 struct drm_device *dev = node->minor->dev;
895 drm_i915_private_t *dev_priv = dev->dev_private;
896 unsigned long temp, chipset, gfx;
de227ef0
CW		 897 int ret;
898
899 ret = mutex_lock_interruptible(&dev->struct_mutex);
900 if (ret)
901 return ret;
7648fa99
JB		 902
903 temp = i915_mch_val(dev_priv);
904 chipset = i915_chipset_val(dev_priv);
905 gfx = i915_gfx_val(dev_priv);
de227ef0 906 mutex_unlock(&dev->struct_mutex);
7648fa99
JB		 907
908 seq_printf(m, "GMCH temp: %ld\n", temp);
909 seq_printf(m, "Chipset power: %ld\n", chipset);
910 seq_printf(m, "GFX power: %ld\n", gfx);
911 seq_printf(m, "Total power: %ld\n", chipset + gfx);
912
913 return 0;
914}
915
916static int i915_gfxec(struct seq_file *m, void *unused)
917{
918 struct drm_info_node *node = (struct drm_info_node *) m->private;
919 struct drm_device *dev = node->minor->dev;
920 drm_i915_private_t *dev_priv = dev->dev_private;
921
922 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
923
924 return 0;
925}
926
44834a67
CW		 927static int i915_opregion(struct seq_file *m, void *unused)
928{
929 struct drm_info_node *node = (struct drm_info_node *) m->private;
930 struct drm_device *dev = node->minor->dev;
931 drm_i915_private_t *dev_priv = dev->dev_private;
932 struct intel_opregion *opregion = &dev_priv->opregion;
933 int ret;
934
935 ret = mutex_lock_interruptible(&dev->struct_mutex);
936 if (ret)
937 return ret;
938
939 if (opregion->header)
940 seq_write(m, opregion->header, OPREGION_SIZE);
941
942 mutex_unlock(&dev->struct_mutex);
943
944 return 0;
945}
946
37811fcc
CW		 947static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
948{
949 struct drm_info_node *node = (struct drm_info_node *) m->private;
950 struct drm_device *dev = node->minor->dev;
951 drm_i915_private_t *dev_priv = dev->dev_private;
952 struct intel_fbdev *ifbdev;
953 struct intel_framebuffer *fb;
954 int ret;
955
956 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
957 if (ret)
958 return ret;
959
960 ifbdev = dev_priv->fbdev;
961 fb = to_intel_framebuffer(ifbdev->helper.fb);
962
963 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
964 fb->base.width,
965 fb->base.height,
966 fb->base.depth,
967 fb->base.bits_per_pixel);
968 describe_obj(m, to_intel_bo(fb->obj));
969 seq_printf(m, "\n");
970
971 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
972 if (&fb->base == ifbdev->helper.fb)
973 continue;
974
975 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
976 fb->base.width,
977 fb->base.height,
978 fb->base.depth,
979 fb->base.bits_per_pixel);
980 describe_obj(m, to_intel_bo(fb->obj));
981 seq_printf(m, "\n");
982 }
983
984 mutex_unlock(&dev->mode_config.mutex);
985
986 return 0;
987}
988
f3cd474b
CW		 989static int
990i915_wedged_open(struct inode *inode,
991 struct file *filp)
992{
993 filp->private_data = inode->i_private;
994 return 0;
995}
996
997static ssize_t
998i915_wedged_read(struct file *filp,
999 char __user *ubuf,
1000 size_t max,
1001 loff_t *ppos)
1002{
1003 struct drm_device *dev = filp->private_data;
1004 drm_i915_private_t *dev_priv = dev->dev_private;
1005 char buf[80];
1006 int len;
1007
1008 len = snprintf(buf, sizeof (buf),
1009 "wedged : %d\n",
1010 atomic_read(&dev_priv->mm.wedged));
1011
f4433a8d
DC		 1012 if (len > sizeof (buf))
1013 len = sizeof (buf);
1014
f3cd474b
CW		 1015 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1016}
1017
1018static ssize_t
1019i915_wedged_write(struct file *filp,
1020 const char __user *ubuf,
1021 size_t cnt,
1022 loff_t *ppos)
1023{
1024 struct drm_device *dev = filp->private_data;
f3cd474b
CW		 1025 char buf[20];
1026 int val = 1;
1027
1028 if (cnt > 0) {
1029 if (cnt > sizeof (buf) - 1)
1030 return -EINVAL;
1031
1032 if (copy_from_user(buf, ubuf, cnt))
1033 return -EFAULT;
1034 buf[cnt] = 0;
1035
1036 val = simple_strtoul(buf, NULL, 0);
1037 }
1038
1039 DRM_INFO("Manually setting wedged to %d\n", val);
527f9e90 1040 i915_handle_error(dev, val);
f3cd474b
CW		 1041
1042 return cnt;
1043}
1044
1045static const struct file_operations i915_wedged_fops = {
1046 .owner = THIS_MODULE,
1047 .open = i915_wedged_open,
1048 .read = i915_wedged_read,
1049 .write = i915_wedged_write,
6038f373 1050 .llseek = default_llseek,
f3cd474b
CW		 1051};
1052
1053/* As the drm_debugfs_init() routines are called before dev->dev_private is
1054 * allocated we need to hook into the minor for release. */
1055static int
1056drm_add_fake_info_node(struct drm_minor *minor,
1057 struct dentry *ent,
1058 const void *key)
1059{
1060 struct drm_info_node *node;
1061
1062 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1063 if (node == NULL) {
1064 debugfs_remove(ent);
1065 return -ENOMEM;
1066 }
1067
1068 node->minor = minor;
1069 node->dent = ent;
1070 node->info_ent = (void *) key;
1071 list_add(&node->list, &minor->debugfs_nodes.list);
1072
1073 return 0;
1074}
1075
1076static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1077{
1078 struct drm_device *dev = minor->dev;
1079 struct dentry *ent;
1080
1081 ent = debugfs_create_file("i915_wedged",
1082 S_IRUGO | S_IWUSR,
1083 root, dev,
1084 &i915_wedged_fops);
1085 if (IS_ERR(ent))
1086 return PTR_ERR(ent);
1087
1088 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1089}
9e3a6d15 1090
27c202ad 1091static struct drm_info_list i915_debugfs_list[] = {
70d39fe4 1092 {"i915_capabilities", i915_capabilities, 0, 0},
73aa808f 1093 {"i915_gem_objects", i915_gem_object_info, 0},
433e12f7
BG		 1094 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1095 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1096 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
f13d3f73 1097 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
d21d5975 1098 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
4e5359cd 1099 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2017263e
BG		 1100 {"i915_gem_request", i915_gem_request_info, 0},
1101 {"i915_gem_seqno", i915_gem_seqno_info, 0},
a6172a80 1102 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2017263e 1103 {"i915_gem_interrupt", i915_interrupt_info, 0},
e5c65260
CW		 1104 {"i915_gem_hws", i915_hws_info, 0, (void *)RING_RENDER},
1105 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)RING_BLT},
1106 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)RING_BSD},
1107 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_RENDER},
1108 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_RENDER},
1109 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BSD},
1110 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BSD},
1111 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BLT},
1112 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BLT},
6911a9b8 1113 {"i915_batchbuffers", i915_batchbuffer_info, 0},
63eeaf38 1114 {"i915_error_state", i915_error_state, 0},
f97108d1
JB		 1115 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1116 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1117 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1118 {"i915_inttoext_table", i915_inttoext_table, 0},
1119 {"i915_drpc_info", i915_drpc_info, 0},
7648fa99
JB		 1120 {"i915_emon_status", i915_emon_status, 0},
1121 {"i915_gfxec", i915_gfxec, 0},
b5e50c3f 1122 {"i915_fbc_status", i915_fbc_status, 0},
4a9bef37 1123 {"i915_sr_status", i915_sr_status, 0},
44834a67 1124 {"i915_opregion", i915_opregion, 0},
37811fcc 1125 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2017263e 1126};
27c202ad 1127#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2017263e 1128
27c202ad 1129int i915_debugfs_init(struct drm_minor *minor)
2017263e 1130{
f3cd474b
CW		 1131 int ret;
1132
1133 ret = i915_wedged_create(minor->debugfs_root, minor);
1134 if (ret)
1135 return ret;
1136
27c202ad
BG		 1137 return drm_debugfs_create_files(i915_debugfs_list,
1138 I915_DEBUGFS_ENTRIES,
2017263e
BG		 1139 minor->debugfs_root, minor);
1140}
1141
27c202ad 1142void i915_debugfs_cleanup(struct drm_minor *minor)
2017263e 1143{
27c202ad
BG		 1144 drm_debugfs_remove_files(i915_debugfs_list,
1145 I915_DEBUGFS_ENTRIES, minor);
33db679b
KH		 1146 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1147 1, minor);
2017263e
BG		 1148}
1149
1150#endif /* CONFIG_DEBUG_FS */
Linux kernel - Deliverables
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