Commit | Line | Data |
---|---|---|
2017263e BG |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
21 | * IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * Keith Packard <keithp@keithp.com> | |
26 | * | |
27 | */ | |
28 | ||
29 | #include <linux/seq_file.h> | |
f3cd474b | 30 | #include <linux/debugfs.h> |
2017263e BG |
31 | #include "drmP.h" |
32 | #include "drm.h" | |
33 | #include "i915_drm.h" | |
34 | #include "i915_drv.h" | |
35 | ||
36 | #define DRM_I915_RING_DEBUG 1 | |
37 | ||
38 | ||
39 | #if defined(CONFIG_DEBUG_FS) | |
40 | ||
433e12f7 BG |
41 | #define ACTIVE_LIST 1 |
42 | #define FLUSHING_LIST 2 | |
43 | #define INACTIVE_LIST 3 | |
2017263e | 44 | |
a6172a80 CW |
45 | static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv) |
46 | { | |
47 | if (obj_priv->user_pin_count > 0) | |
48 | return "P"; | |
49 | else if (obj_priv->pin_count > 0) | |
50 | return "p"; | |
51 | else | |
52 | return " "; | |
53 | } | |
54 | ||
55 | static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv) | |
56 | { | |
57 | switch (obj_priv->tiling_mode) { | |
58 | default: | |
59 | case I915_TILING_NONE: return " "; | |
60 | case I915_TILING_X: return "X"; | |
61 | case I915_TILING_Y: return "Y"; | |
62 | } | |
63 | } | |
64 | ||
433e12f7 | 65 | static int i915_gem_object_list_info(struct seq_file *m, void *data) |
2017263e BG |
66 | { |
67 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
433e12f7 BG |
68 | uintptr_t list = (uintptr_t) node->info_ent->data; |
69 | struct list_head *head; | |
2017263e BG |
70 | struct drm_device *dev = node->minor->dev; |
71 | drm_i915_private_t *dev_priv = dev->dev_private; | |
72 | struct drm_i915_gem_object *obj_priv; | |
5e118f41 | 73 | spinlock_t *lock = NULL; |
2017263e | 74 | |
433e12f7 BG |
75 | switch (list) { |
76 | case ACTIVE_LIST: | |
77 | seq_printf(m, "Active:\n"); | |
5e118f41 | 78 | lock = &dev_priv->mm.active_list_lock; |
433e12f7 BG |
79 | head = &dev_priv->mm.active_list; |
80 | break; | |
81 | case INACTIVE_LIST: | |
a17458fc | 82 | seq_printf(m, "Inactive:\n"); |
433e12f7 BG |
83 | head = &dev_priv->mm.inactive_list; |
84 | break; | |
85 | case FLUSHING_LIST: | |
86 | seq_printf(m, "Flushing:\n"); | |
87 | head = &dev_priv->mm.flushing_list; | |
88 | break; | |
89 | default: | |
90 | DRM_INFO("Ooops, unexpected list\n"); | |
91 | return 0; | |
2017263e | 92 | } |
2017263e | 93 | |
a17458fc BG |
94 | if (lock) |
95 | spin_lock(lock); | |
433e12f7 | 96 | list_for_each_entry(obj_priv, head, list) |
2017263e BG |
97 | { |
98 | struct drm_gem_object *obj = obj_priv->obj; | |
f4ceda89 | 99 | |
725ceaa0 | 100 | seq_printf(m, " %p: %s %8zd %08x %08x %d %s", |
f4ceda89 | 101 | obj, |
a6172a80 | 102 | get_pin_flag(obj_priv), |
725ceaa0 | 103 | obj->size, |
f4ceda89 | 104 | obj->read_domains, obj->write_domain, |
725ceaa0 CW |
105 | obj_priv->last_rendering_seqno, |
106 | obj_priv->dirty ? "dirty" : ""); | |
f4ceda89 EA |
107 | |
108 | if (obj->name) | |
109 | seq_printf(m, " (name: %d)", obj->name); | |
110 | if (obj_priv->fence_reg != I915_FENCE_REG_NONE) | |
a01c75b3 BG |
111 | seq_printf(m, " (fence: %d)", obj_priv->fence_reg); |
112 | if (obj_priv->gtt_space != NULL) | |
113 | seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset); | |
114 | ||
f4ceda89 | 115 | seq_printf(m, "\n"); |
2017263e | 116 | } |
5e118f41 CW |
117 | |
118 | if (lock) | |
119 | spin_unlock(lock); | |
2017263e BG |
120 | return 0; |
121 | } | |
122 | ||
123 | static int i915_gem_request_info(struct seq_file *m, void *data) | |
124 | { | |
125 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
126 | struct drm_device *dev = node->minor->dev; | |
127 | drm_i915_private_t *dev_priv = dev->dev_private; | |
128 | struct drm_i915_gem_request *gem_request; | |
129 | ||
130 | seq_printf(m, "Request:\n"); | |
131 | list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) { | |
132 | seq_printf(m, " %d @ %d\n", | |
133 | gem_request->seqno, | |
134 | (int) (jiffies - gem_request->emitted_jiffies)); | |
135 | } | |
136 | return 0; | |
137 | } | |
138 | ||
139 | static int i915_gem_seqno_info(struct seq_file *m, void *data) | |
140 | { | |
141 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
142 | struct drm_device *dev = node->minor->dev; | |
143 | drm_i915_private_t *dev_priv = dev->dev_private; | |
144 | ||
145 | if (dev_priv->hw_status_page != NULL) { | |
146 | seq_printf(m, "Current sequence: %d\n", | |
147 | i915_get_gem_seqno(dev)); | |
148 | } else { | |
149 | seq_printf(m, "Current sequence: hws uninitialized\n"); | |
150 | } | |
151 | seq_printf(m, "Waiter sequence: %d\n", | |
152 | dev_priv->mm.waiting_gem_seqno); | |
153 | seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno); | |
154 | return 0; | |
155 | } | |
156 | ||
157 | ||
158 | static int i915_interrupt_info(struct seq_file *m, void *data) | |
159 | { | |
160 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
161 | struct drm_device *dev = node->minor->dev; | |
162 | drm_i915_private_t *dev_priv = dev->dev_private; | |
163 | ||
5f6a1695 ZW |
164 | if (!IS_IGDNG(dev)) { |
165 | seq_printf(m, "Interrupt enable: %08x\n", | |
166 | I915_READ(IER)); | |
167 | seq_printf(m, "Interrupt identity: %08x\n", | |
168 | I915_READ(IIR)); | |
169 | seq_printf(m, "Interrupt mask: %08x\n", | |
170 | I915_READ(IMR)); | |
171 | seq_printf(m, "Pipe A stat: %08x\n", | |
172 | I915_READ(PIPEASTAT)); | |
173 | seq_printf(m, "Pipe B stat: %08x\n", | |
174 | I915_READ(PIPEBSTAT)); | |
175 | } else { | |
176 | seq_printf(m, "North Display Interrupt enable: %08x\n", | |
177 | I915_READ(DEIER)); | |
178 | seq_printf(m, "North Display Interrupt identity: %08x\n", | |
179 | I915_READ(DEIIR)); | |
180 | seq_printf(m, "North Display Interrupt mask: %08x\n", | |
181 | I915_READ(DEIMR)); | |
182 | seq_printf(m, "South Display Interrupt enable: %08x\n", | |
183 | I915_READ(SDEIER)); | |
184 | seq_printf(m, "South Display Interrupt identity: %08x\n", | |
185 | I915_READ(SDEIIR)); | |
186 | seq_printf(m, "South Display Interrupt mask: %08x\n", | |
187 | I915_READ(SDEIMR)); | |
188 | seq_printf(m, "Graphics Interrupt enable: %08x\n", | |
189 | I915_READ(GTIER)); | |
190 | seq_printf(m, "Graphics Interrupt identity: %08x\n", | |
191 | I915_READ(GTIIR)); | |
192 | seq_printf(m, "Graphics Interrupt mask: %08x\n", | |
193 | I915_READ(GTIMR)); | |
194 | } | |
2017263e BG |
195 | seq_printf(m, "Interrupts received: %d\n", |
196 | atomic_read(&dev_priv->irq_received)); | |
197 | if (dev_priv->hw_status_page != NULL) { | |
198 | seq_printf(m, "Current sequence: %d\n", | |
199 | i915_get_gem_seqno(dev)); | |
200 | } else { | |
201 | seq_printf(m, "Current sequence: hws uninitialized\n"); | |
202 | } | |
203 | seq_printf(m, "Waiter sequence: %d\n", | |
204 | dev_priv->mm.waiting_gem_seqno); | |
205 | seq_printf(m, "IRQ sequence: %d\n", | |
206 | dev_priv->mm.irq_gem_seqno); | |
207 | return 0; | |
208 | } | |
209 | ||
a6172a80 CW |
210 | static int i915_gem_fence_regs_info(struct seq_file *m, void *data) |
211 | { | |
212 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
213 | struct drm_device *dev = node->minor->dev; | |
214 | drm_i915_private_t *dev_priv = dev->dev_private; | |
215 | int i; | |
216 | ||
217 | seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); | |
218 | seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); | |
219 | for (i = 0; i < dev_priv->num_fence_regs; i++) { | |
220 | struct drm_gem_object *obj = dev_priv->fence_regs[i].obj; | |
221 | ||
222 | if (obj == NULL) { | |
223 | seq_printf(m, "Fenced object[%2d] = unused\n", i); | |
224 | } else { | |
225 | struct drm_i915_gem_object *obj_priv; | |
226 | ||
227 | obj_priv = obj->driver_private; | |
228 | seq_printf(m, "Fenced object[%2d] = %p: %s " | |
0b4d569d | 229 | "%08x %08zx %08x %s %08x %08x %d", |
a6172a80 CW |
230 | i, obj, get_pin_flag(obj_priv), |
231 | obj_priv->gtt_offset, | |
232 | obj->size, obj_priv->stride, | |
233 | get_tiling_flag(obj_priv), | |
234 | obj->read_domains, obj->write_domain, | |
235 | obj_priv->last_rendering_seqno); | |
236 | if (obj->name) | |
237 | seq_printf(m, " (name: %d)", obj->name); | |
238 | seq_printf(m, "\n"); | |
239 | } | |
240 | } | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
2017263e BG |
245 | static int i915_hws_info(struct seq_file *m, void *data) |
246 | { | |
247 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
248 | struct drm_device *dev = node->minor->dev; | |
249 | drm_i915_private_t *dev_priv = dev->dev_private; | |
250 | int i; | |
251 | volatile u32 *hws; | |
252 | ||
253 | hws = (volatile u32 *)dev_priv->hw_status_page; | |
254 | if (hws == NULL) | |
255 | return 0; | |
256 | ||
257 | for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) { | |
258 | seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", | |
259 | i * 4, | |
260 | hws[i], hws[i + 1], hws[i + 2], hws[i + 3]); | |
261 | } | |
262 | return 0; | |
263 | } | |
264 | ||
6911a9b8 BG |
265 | static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count) |
266 | { | |
267 | int page, i; | |
268 | uint32_t *mem; | |
269 | ||
270 | for (page = 0; page < page_count; page++) { | |
ba86bf8b | 271 | mem = kmap_atomic(pages[page], KM_USER0); |
6911a9b8 BG |
272 | for (i = 0; i < PAGE_SIZE; i += 4) |
273 | seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); | |
ba86bf8b | 274 | kunmap_atomic(pages[page], KM_USER0); |
6911a9b8 BG |
275 | } |
276 | } | |
277 | ||
278 | static int i915_batchbuffer_info(struct seq_file *m, void *data) | |
279 | { | |
280 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
281 | struct drm_device *dev = node->minor->dev; | |
282 | drm_i915_private_t *dev_priv = dev->dev_private; | |
283 | struct drm_gem_object *obj; | |
284 | struct drm_i915_gem_object *obj_priv; | |
285 | int ret; | |
286 | ||
287 | spin_lock(&dev_priv->mm.active_list_lock); | |
288 | ||
289 | list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) { | |
290 | obj = obj_priv->obj; | |
291 | if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) { | |
292 | ret = i915_gem_object_get_pages(obj); | |
293 | if (ret) { | |
294 | DRM_ERROR("Failed to get pages: %d\n", ret); | |
295 | spin_unlock(&dev_priv->mm.active_list_lock); | |
296 | return ret; | |
297 | } | |
298 | ||
299 | seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset); | |
300 | i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE); | |
301 | ||
302 | i915_gem_object_put_pages(obj); | |
303 | } | |
304 | } | |
305 | ||
306 | spin_unlock(&dev_priv->mm.active_list_lock); | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
311 | static int i915_ringbuffer_data(struct seq_file *m, void *data) | |
312 | { | |
313 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
314 | struct drm_device *dev = node->minor->dev; | |
315 | drm_i915_private_t *dev_priv = dev->dev_private; | |
316 | u8 *virt; | |
317 | uint32_t *ptr, off; | |
318 | ||
319 | if (!dev_priv->ring.ring_obj) { | |
320 | seq_printf(m, "No ringbuffer setup\n"); | |
321 | return 0; | |
322 | } | |
323 | ||
324 | virt = dev_priv->ring.virtual_start; | |
325 | ||
326 | for (off = 0; off < dev_priv->ring.Size; off += 4) { | |
327 | ptr = (uint32_t *)(virt + off); | |
328 | seq_printf(m, "%08x : %08x\n", off, *ptr); | |
329 | } | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
334 | static int i915_ringbuffer_info(struct seq_file *m, void *data) | |
335 | { | |
336 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
337 | struct drm_device *dev = node->minor->dev; | |
338 | drm_i915_private_t *dev_priv = dev->dev_private; | |
0ef82af7 | 339 | unsigned int head, tail; |
6911a9b8 BG |
340 | |
341 | head = I915_READ(PRB0_HEAD) & HEAD_ADDR; | |
342 | tail = I915_READ(PRB0_TAIL) & TAIL_ADDR; | |
6911a9b8 BG |
343 | |
344 | seq_printf(m, "RingHead : %08x\n", head); | |
345 | seq_printf(m, "RingTail : %08x\n", tail); | |
6911a9b8 | 346 | seq_printf(m, "RingSize : %08lx\n", dev_priv->ring.Size); |
76cff81a | 347 | seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD)); |
6911a9b8 BG |
348 | |
349 | return 0; | |
350 | } | |
351 | ||
63eeaf38 JB |
352 | static int i915_error_state(struct seq_file *m, void *unused) |
353 | { | |
354 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
355 | struct drm_device *dev = node->minor->dev; | |
356 | drm_i915_private_t *dev_priv = dev->dev_private; | |
357 | struct drm_i915_error_state *error; | |
358 | unsigned long flags; | |
359 | ||
360 | spin_lock_irqsave(&dev_priv->error_lock, flags); | |
361 | if (!dev_priv->first_error) { | |
362 | seq_printf(m, "no error state collected\n"); | |
363 | goto out; | |
364 | } | |
365 | ||
366 | error = dev_priv->first_error; | |
367 | ||
8a905236 JB |
368 | seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
369 | error->time.tv_usec); | |
63eeaf38 JB |
370 | seq_printf(m, "EIR: 0x%08x\n", error->eir); |
371 | seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er); | |
372 | seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); | |
373 | seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir); | |
374 | seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr); | |
375 | seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone); | |
376 | seq_printf(m, " ACTHD: 0x%08x\n", error->acthd); | |
377 | if (IS_I965G(dev)) { | |
378 | seq_printf(m, " INSTPS: 0x%08x\n", error->instps); | |
379 | seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1); | |
380 | } | |
381 | ||
382 | out: | |
383 | spin_unlock_irqrestore(&dev_priv->error_lock, flags); | |
384 | ||
385 | return 0; | |
386 | } | |
6911a9b8 | 387 | |
9e3a6d15 BG |
388 | static int i915_registers_info(struct seq_file *m, void *data) { |
389 | struct drm_info_node *node = (struct drm_info_node *) m->private; | |
390 | struct drm_device *dev = node->minor->dev; | |
391 | drm_i915_private_t *dev_priv = dev->dev_private; | |
392 | uint32_t reg; | |
393 | ||
394 | #define DUMP_RANGE(start, end) \ | |
395 | for (reg=start; reg < end; reg += 4) \ | |
396 | seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg)); | |
397 | ||
398 | DUMP_RANGE(0x00000, 0x00fff); /* VGA registers */ | |
399 | DUMP_RANGE(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */ | |
400 | DUMP_RANGE(0x03000, 0x031ff); /* FENCE and PPGTT control registers */ | |
401 | DUMP_RANGE(0x03200, 0x03fff); /* frame buffer compression registers */ | |
402 | DUMP_RANGE(0x05000, 0x05fff); /* I/O control registers */ | |
403 | DUMP_RANGE(0x06000, 0x06fff); /* clock control registers */ | |
404 | DUMP_RANGE(0x07000, 0x07fff); /* 3D internal debug registers */ | |
405 | DUMP_RANGE(0x07400, 0x088ff); /* GPE debug registers */ | |
406 | DUMP_RANGE(0x0a000, 0x0afff); /* display palette registers */ | |
407 | DUMP_RANGE(0x10000, 0x13fff); /* MMIO MCHBAR */ | |
408 | DUMP_RANGE(0x30000, 0x3ffff); /* overlay registers */ | |
409 | DUMP_RANGE(0x60000, 0x6ffff); /* display engine pipeline registers */ | |
410 | DUMP_RANGE(0x70000, 0x72fff); /* display and cursor registers */ | |
411 | DUMP_RANGE(0x73000, 0x73fff); /* performance counters */ | |
412 | ||
413 | return 0; | |
414 | } | |
415 | ||
f3cd474b CW |
416 | static int |
417 | i915_wedged_open(struct inode *inode, | |
418 | struct file *filp) | |
419 | { | |
420 | filp->private_data = inode->i_private; | |
421 | return 0; | |
422 | } | |
423 | ||
424 | static ssize_t | |
425 | i915_wedged_read(struct file *filp, | |
426 | char __user *ubuf, | |
427 | size_t max, | |
428 | loff_t *ppos) | |
429 | { | |
430 | struct drm_device *dev = filp->private_data; | |
431 | drm_i915_private_t *dev_priv = dev->dev_private; | |
432 | char buf[80]; | |
433 | int len; | |
434 | ||
435 | len = snprintf(buf, sizeof (buf), | |
436 | "wedged : %d\n", | |
437 | atomic_read(&dev_priv->mm.wedged)); | |
438 | ||
439 | return simple_read_from_buffer(ubuf, max, ppos, buf, len); | |
440 | } | |
441 | ||
442 | static ssize_t | |
443 | i915_wedged_write(struct file *filp, | |
444 | const char __user *ubuf, | |
445 | size_t cnt, | |
446 | loff_t *ppos) | |
447 | { | |
448 | struct drm_device *dev = filp->private_data; | |
449 | drm_i915_private_t *dev_priv = dev->dev_private; | |
450 | char buf[20]; | |
451 | int val = 1; | |
452 | ||
453 | if (cnt > 0) { | |
454 | if (cnt > sizeof (buf) - 1) | |
455 | return -EINVAL; | |
456 | ||
457 | if (copy_from_user(buf, ubuf, cnt)) | |
458 | return -EFAULT; | |
459 | buf[cnt] = 0; | |
460 | ||
461 | val = simple_strtoul(buf, NULL, 0); | |
462 | } | |
463 | ||
464 | DRM_INFO("Manually setting wedged to %d\n", val); | |
465 | ||
466 | atomic_set(&dev_priv->mm.wedged, val); | |
467 | if (val) { | |
468 | DRM_WAKEUP(&dev_priv->irq_queue); | |
469 | queue_work(dev_priv->wq, &dev_priv->error_work); | |
470 | } | |
471 | ||
472 | return cnt; | |
473 | } | |
474 | ||
475 | static const struct file_operations i915_wedged_fops = { | |
476 | .owner = THIS_MODULE, | |
477 | .open = i915_wedged_open, | |
478 | .read = i915_wedged_read, | |
479 | .write = i915_wedged_write, | |
480 | }; | |
481 | ||
482 | /* As the drm_debugfs_init() routines are called before dev->dev_private is | |
483 | * allocated we need to hook into the minor for release. */ | |
484 | static int | |
485 | drm_add_fake_info_node(struct drm_minor *minor, | |
486 | struct dentry *ent, | |
487 | const void *key) | |
488 | { | |
489 | struct drm_info_node *node; | |
490 | ||
491 | node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL); | |
492 | if (node == NULL) { | |
493 | debugfs_remove(ent); | |
494 | return -ENOMEM; | |
495 | } | |
496 | ||
497 | node->minor = minor; | |
498 | node->dent = ent; | |
499 | node->info_ent = (void *) key; | |
500 | list_add(&node->list, &minor->debugfs_nodes.list); | |
501 | ||
502 | return 0; | |
503 | } | |
504 | ||
505 | static int i915_wedged_create(struct dentry *root, struct drm_minor *minor) | |
506 | { | |
507 | struct drm_device *dev = minor->dev; | |
508 | struct dentry *ent; | |
509 | ||
510 | ent = debugfs_create_file("i915_wedged", | |
511 | S_IRUGO | S_IWUSR, | |
512 | root, dev, | |
513 | &i915_wedged_fops); | |
514 | if (IS_ERR(ent)) | |
515 | return PTR_ERR(ent); | |
516 | ||
517 | return drm_add_fake_info_node(minor, ent, &i915_wedged_fops); | |
518 | } | |
9e3a6d15 | 519 | |
27c202ad | 520 | static struct drm_info_list i915_debugfs_list[] = { |
9e3a6d15 | 521 | {"i915_regs", i915_registers_info, 0}, |
433e12f7 BG |
522 | {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, |
523 | {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, | |
524 | {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, | |
2017263e BG |
525 | {"i915_gem_request", i915_gem_request_info, 0}, |
526 | {"i915_gem_seqno", i915_gem_seqno_info, 0}, | |
a6172a80 | 527 | {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, |
2017263e BG |
528 | {"i915_gem_interrupt", i915_interrupt_info, 0}, |
529 | {"i915_gem_hws", i915_hws_info, 0}, | |
6911a9b8 BG |
530 | {"i915_ringbuffer_data", i915_ringbuffer_data, 0}, |
531 | {"i915_ringbuffer_info", i915_ringbuffer_info, 0}, | |
532 | {"i915_batchbuffers", i915_batchbuffer_info, 0}, | |
63eeaf38 | 533 | {"i915_error_state", i915_error_state, 0}, |
2017263e | 534 | }; |
27c202ad | 535 | #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) |
2017263e | 536 | |
27c202ad | 537 | int i915_debugfs_init(struct drm_minor *minor) |
2017263e | 538 | { |
f3cd474b CW |
539 | int ret; |
540 | ||
541 | ret = i915_wedged_create(minor->debugfs_root, minor); | |
542 | if (ret) | |
543 | return ret; | |
544 | ||
27c202ad BG |
545 | return drm_debugfs_create_files(i915_debugfs_list, |
546 | I915_DEBUGFS_ENTRIES, | |
2017263e BG |
547 | minor->debugfs_root, minor); |
548 | } | |
549 | ||
27c202ad | 550 | void i915_debugfs_cleanup(struct drm_minor *minor) |
2017263e | 551 | { |
27c202ad BG |
552 | drm_debugfs_remove_files(i915_debugfs_list, |
553 | I915_DEBUGFS_ENTRIES, minor); | |
33db679b KH |
554 | drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops, |
555 | 1, minor); | |
2017263e BG |
556 | } |
557 | ||
558 | #endif /* CONFIG_DEBUG_FS */ |