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1da177e4 LT |
1 | /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*- |
2 | */ | |
0d6aa60b | 3 | /* |
bc54fd1a | 4 | * |
1da177e4 LT |
5 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
6 | * All Rights Reserved. | |
bc54fd1a DA |
7 | * |
8 | * Permission is hereby granted, free of charge, to any person obtaining a | |
9 | * copy of this software and associated documentation files (the | |
10 | * "Software"), to deal in the Software without restriction, including | |
11 | * without limitation the rights to use, copy, modify, merge, publish, | |
12 | * distribute, sub license, and/or sell copies of the Software, and to | |
13 | * permit persons to whom the Software is furnished to do so, subject to | |
14 | * the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice (including the | |
17 | * next paragraph) shall be included in all copies or substantial portions | |
18 | * of the Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS | |
21 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
22 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. | |
23 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR | |
24 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | |
25 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | |
26 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
27 | * | |
0d6aa60b | 28 | */ |
1da177e4 | 29 | |
5669fcac | 30 | #include <linux/device.h> |
1da177e4 LT |
31 | #include "drmP.h" |
32 | #include "drm.h" | |
33 | #include "i915_drm.h" | |
34 | #include "i915_drv.h" | |
35 | ||
79e53945 | 36 | #include <linux/console.h> |
354ff967 | 37 | #include "drm_crtc_helper.h" |
79e53945 | 38 | |
d6073d77 | 39 | static int i915_modeset = -1; |
79e53945 JB |
40 | module_param_named(modeset, i915_modeset, int, 0400); |
41 | ||
42 | unsigned int i915_fbpercrtc = 0; | |
43 | module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); | |
1da177e4 | 44 | |
652c393a JB |
45 | unsigned int i915_powersave = 1; |
46 | module_param_named(powersave, i915_powersave, int, 0400); | |
47 | ||
112b715e KH |
48 | static struct drm_driver driver; |
49 | ||
49ae35f2 KH |
50 | #define INTEL_VGA_DEVICE(id) { \ |
51 | .class = PCI_CLASS_DISPLAY_VGA << 8, \ | |
52 | .class_mask = 0xffff00, \ | |
53 | .vendor = 0x8086, \ | |
54 | .device = id, \ | |
55 | .subvendor = PCI_ANY_ID, \ | |
56 | .subdevice = PCI_ANY_ID, \ | |
57 | .driver_data = 0 } | |
58 | ||
1da177e4 | 59 | static struct pci_device_id pciidlist[] = { |
49ae35f2 KH |
60 | INTEL_VGA_DEVICE(0x3577), |
61 | INTEL_VGA_DEVICE(0x2562), | |
62 | INTEL_VGA_DEVICE(0x3582), | |
63 | INTEL_VGA_DEVICE(0x2572), | |
64 | INTEL_VGA_DEVICE(0x2582), | |
65 | INTEL_VGA_DEVICE(0x258a), | |
66 | INTEL_VGA_DEVICE(0x2592), | |
67 | INTEL_VGA_DEVICE(0x2772), | |
68 | INTEL_VGA_DEVICE(0x27a2), | |
69 | INTEL_VGA_DEVICE(0x27ae), | |
70 | INTEL_VGA_DEVICE(0x2972), | |
71 | INTEL_VGA_DEVICE(0x2982), | |
72 | INTEL_VGA_DEVICE(0x2992), | |
73 | INTEL_VGA_DEVICE(0x29a2), | |
74 | INTEL_VGA_DEVICE(0x29b2), | |
75 | INTEL_VGA_DEVICE(0x29c2), | |
76 | INTEL_VGA_DEVICE(0x29d2), | |
77 | INTEL_VGA_DEVICE(0x2a02), | |
78 | INTEL_VGA_DEVICE(0x2a12), | |
79 | INTEL_VGA_DEVICE(0x2a42), | |
80 | INTEL_VGA_DEVICE(0x2e02), | |
81 | INTEL_VGA_DEVICE(0x2e12), | |
82 | INTEL_VGA_DEVICE(0x2e22), | |
83 | INTEL_VGA_DEVICE(0x2e32), | |
84 | INTEL_VGA_DEVICE(0x2e42), | |
85 | INTEL_VGA_DEVICE(0xa001), | |
86 | INTEL_VGA_DEVICE(0xa011), | |
87 | INTEL_VGA_DEVICE(0x35e8), | |
88 | INTEL_VGA_DEVICE(0x0042), | |
89 | INTEL_VGA_DEVICE(0x0046), | |
90 | {0, 0, 0} | |
1da177e4 LT |
91 | }; |
92 | ||
79e53945 JB |
93 | #if defined(CONFIG_DRM_I915_KMS) |
94 | MODULE_DEVICE_TABLE(pci, pciidlist); | |
95 | #endif | |
96 | ||
b932ccb5 | 97 | static int i915_suspend(struct drm_device *dev, pm_message_t state) |
ba8bbcf6 JB |
98 | { |
99 | struct drm_i915_private *dev_priv = dev->dev_private; | |
ba8bbcf6 JB |
100 | |
101 | if (!dev || !dev_priv) { | |
1ae8c0a5 KP |
102 | DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv); |
103 | DRM_ERROR("DRM not initialized, aborting suspend.\n"); | |
ba8bbcf6 JB |
104 | return -ENODEV; |
105 | } | |
106 | ||
b932ccb5 DA |
107 | if (state.event == PM_EVENT_PRETHAW) |
108 | return 0; | |
109 | ||
ba8bbcf6 | 110 | pci_save_state(dev->pdev); |
ba8bbcf6 | 111 | |
5669fcac | 112 | /* If KMS is active, we do the leavevt stuff here */ |
226485e9 JB |
113 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
114 | if (i915_gem_idle(dev)) | |
115 | dev_err(&dev->pdev->dev, | |
116 | "GEM idle failed, resume may fail\n"); | |
117 | drm_irq_uninstall(dev); | |
5669fcac JB |
118 | } |
119 | ||
9e06dd39 JB |
120 | i915_save_state(dev); |
121 | ||
3b1c1c11 | 122 | intel_opregion_free(dev, 1); |
8ee1c3db | 123 | |
b932ccb5 DA |
124 | if (state.event == PM_EVENT_SUSPEND) { |
125 | /* Shut down the device */ | |
126 | pci_disable_device(dev->pdev); | |
127 | pci_set_power_state(dev->pdev, PCI_D3hot); | |
128 | } | |
ba8bbcf6 | 129 | |
c9354c85 LT |
130 | /* Modeset on resume, not lid events */ |
131 | dev_priv->modeset_on_lid = 0; | |
06891e27 | 132 | |
ba8bbcf6 JB |
133 | return 0; |
134 | } | |
135 | ||
136 | static int i915_resume(struct drm_device *dev) | |
137 | { | |
5669fcac JB |
138 | struct drm_i915_private *dev_priv = dev->dev_private; |
139 | int ret = 0; | |
140 | ||
ba8bbcf6 JB |
141 | if (pci_enable_device(dev->pdev)) |
142 | return -1; | |
ea7b44c8 | 143 | pci_set_master(dev->pdev); |
ba8bbcf6 | 144 | |
317c35d1 | 145 | i915_restore_state(dev); |
ba8bbcf6 | 146 | |
74a365b3 | 147 | intel_opregion_init(dev, 1); |
8ee1c3db | 148 | |
5669fcac JB |
149 | /* KMS EnterVT equivalent */ |
150 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { | |
151 | mutex_lock(&dev->struct_mutex); | |
152 | dev_priv->mm.suspended = 0; | |
153 | ||
154 | ret = i915_gem_init_ringbuffer(dev); | |
155 | if (ret != 0) | |
156 | ret = -1; | |
157 | mutex_unlock(&dev->struct_mutex); | |
226485e9 JB |
158 | |
159 | drm_irq_install(dev); | |
5669fcac | 160 | } |
354ff967 ZY |
161 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
162 | /* Resume the modeset for every activated CRTC */ | |
163 | drm_helper_resume_force_mode(dev); | |
164 | } | |
5669fcac | 165 | |
c9354c85 | 166 | dev_priv->modeset_on_lid = 0; |
06891e27 | 167 | |
5669fcac | 168 | return ret; |
ba8bbcf6 JB |
169 | } |
170 | ||
11ed50ec BG |
171 | /** |
172 | * i965_reset - reset chip after a hang | |
173 | * @dev: drm device to reset | |
174 | * @flags: reset domains | |
175 | * | |
176 | * Reset the chip. Useful if a hang is detected. Returns zero on successful | |
177 | * reset or otherwise an error code. | |
178 | * | |
179 | * Procedure is fairly simple: | |
180 | * - reset the chip using the reset reg | |
181 | * - re-init context state | |
182 | * - re-init hardware status page | |
183 | * - re-init ring buffer | |
184 | * - re-init interrupt state | |
185 | * - re-init display | |
186 | */ | |
187 | int i965_reset(struct drm_device *dev, u8 flags) | |
188 | { | |
189 | drm_i915_private_t *dev_priv = dev->dev_private; | |
190 | unsigned long timeout; | |
191 | u8 gdrst; | |
192 | /* | |
193 | * We really should only reset the display subsystem if we actually | |
194 | * need to | |
195 | */ | |
196 | bool need_display = true; | |
197 | ||
198 | mutex_lock(&dev->struct_mutex); | |
199 | ||
200 | /* | |
201 | * Clear request list | |
202 | */ | |
203 | i915_gem_retire_requests(dev); | |
204 | ||
205 | if (need_display) | |
206 | i915_save_display(dev); | |
207 | ||
208 | if (IS_I965G(dev) || IS_G4X(dev)) { | |
209 | /* | |
210 | * Set the domains we want to reset, then the reset bit (bit 0). | |
211 | * Clear the reset bit after a while and wait for hardware status | |
212 | * bit (bit 1) to be set | |
213 | */ | |
214 | pci_read_config_byte(dev->pdev, GDRST, &gdrst); | |
215 | pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0)); | |
216 | udelay(50); | |
217 | pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe); | |
218 | ||
219 | /* ...we don't want to loop forever though, 500ms should be plenty */ | |
220 | timeout = jiffies + msecs_to_jiffies(500); | |
221 | do { | |
222 | udelay(100); | |
223 | pci_read_config_byte(dev->pdev, GDRST, &gdrst); | |
224 | } while ((gdrst & 0x1) && time_after(timeout, jiffies)); | |
225 | ||
226 | if (gdrst & 0x1) { | |
227 | WARN(true, "i915: Failed to reset chip\n"); | |
228 | mutex_unlock(&dev->struct_mutex); | |
229 | return -EIO; | |
230 | } | |
231 | } else { | |
232 | DRM_ERROR("Error occurred. Don't know how to reset this chip.\n"); | |
233 | return -ENODEV; | |
234 | } | |
235 | ||
236 | /* Ok, now get things going again... */ | |
237 | ||
238 | /* | |
239 | * Everything depends on having the GTT running, so we need to start | |
240 | * there. Fortunately we don't need to do this unless we reset the | |
241 | * chip at a PCI level. | |
242 | * | |
243 | * Next we need to restore the context, but we don't use those | |
244 | * yet either... | |
245 | * | |
246 | * Ring buffer needs to be re-initialized in the KMS case, or if X | |
247 | * was running at the time of the reset (i.e. we weren't VT | |
248 | * switched away). | |
249 | */ | |
250 | if (drm_core_check_feature(dev, DRIVER_MODESET) || | |
251 | !dev_priv->mm.suspended) { | |
252 | drm_i915_ring_buffer_t *ring = &dev_priv->ring; | |
253 | struct drm_gem_object *obj = ring->ring_obj; | |
254 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | |
255 | dev_priv->mm.suspended = 0; | |
256 | ||
257 | /* Stop the ring if it's running. */ | |
258 | I915_WRITE(PRB0_CTL, 0); | |
259 | I915_WRITE(PRB0_TAIL, 0); | |
260 | I915_WRITE(PRB0_HEAD, 0); | |
261 | ||
262 | /* Initialize the ring. */ | |
263 | I915_WRITE(PRB0_START, obj_priv->gtt_offset); | |
264 | I915_WRITE(PRB0_CTL, | |
265 | ((obj->size - 4096) & RING_NR_PAGES) | | |
266 | RING_NO_REPORT | | |
267 | RING_VALID); | |
268 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) | |
269 | i915_kernel_lost_context(dev); | |
270 | else { | |
271 | ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR; | |
272 | ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR; | |
273 | ring->space = ring->head - (ring->tail + 8); | |
274 | if (ring->space < 0) | |
275 | ring->space += ring->Size; | |
276 | } | |
277 | ||
278 | mutex_unlock(&dev->struct_mutex); | |
279 | drm_irq_uninstall(dev); | |
280 | drm_irq_install(dev); | |
281 | mutex_lock(&dev->struct_mutex); | |
282 | } | |
283 | ||
284 | /* | |
285 | * Display needs restore too... | |
286 | */ | |
287 | if (need_display) | |
288 | i915_restore_display(dev); | |
289 | ||
290 | mutex_unlock(&dev->struct_mutex); | |
291 | return 0; | |
292 | } | |
293 | ||
294 | ||
112b715e KH |
295 | static int __devinit |
296 | i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
297 | { | |
298 | return drm_get_dev(pdev, ent, &driver); | |
299 | } | |
300 | ||
301 | static void | |
302 | i915_pci_remove(struct pci_dev *pdev) | |
303 | { | |
304 | struct drm_device *dev = pci_get_drvdata(pdev); | |
305 | ||
306 | drm_put_dev(dev); | |
307 | } | |
308 | ||
309 | static int | |
310 | i915_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |
311 | { | |
312 | struct drm_device *dev = pci_get_drvdata(pdev); | |
313 | ||
314 | return i915_suspend(dev, state); | |
315 | } | |
316 | ||
317 | static int | |
318 | i915_pci_resume(struct pci_dev *pdev) | |
319 | { | |
320 | struct drm_device *dev = pci_get_drvdata(pdev); | |
321 | ||
322 | return i915_resume(dev); | |
323 | } | |
324 | ||
cbda12d7 ZW |
325 | static int |
326 | i915_pm_suspend(struct device *dev) | |
327 | { | |
328 | return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND); | |
329 | } | |
330 | ||
331 | static int | |
332 | i915_pm_resume(struct device *dev) | |
333 | { | |
334 | return i915_pci_resume(to_pci_dev(dev)); | |
335 | } | |
336 | ||
337 | static int | |
338 | i915_pm_freeze(struct device *dev) | |
339 | { | |
340 | return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE); | |
341 | } | |
342 | ||
343 | static int | |
344 | i915_pm_thaw(struct device *dev) | |
345 | { | |
346 | /* thaw during hibernate, do nothing! */ | |
347 | return 0; | |
348 | } | |
349 | ||
350 | static int | |
351 | i915_pm_poweroff(struct device *dev) | |
352 | { | |
353 | return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE); | |
354 | } | |
355 | ||
356 | static int | |
357 | i915_pm_restore(struct device *dev) | |
358 | { | |
359 | return i915_pci_resume(to_pci_dev(dev)); | |
360 | } | |
361 | ||
362 | const struct dev_pm_ops i915_pm_ops = { | |
363 | .suspend = i915_pm_suspend, | |
364 | .resume = i915_pm_resume, | |
365 | .freeze = i915_pm_freeze, | |
366 | .thaw = i915_pm_thaw, | |
367 | .poweroff = i915_pm_poweroff, | |
368 | .restore = i915_pm_restore, | |
369 | }; | |
370 | ||
de151cf6 JB |
371 | static struct vm_operations_struct i915_gem_vm_ops = { |
372 | .fault = i915_gem_fault, | |
ab00b3e5 JB |
373 | .open = drm_gem_vm_open, |
374 | .close = drm_gem_vm_close, | |
de151cf6 JB |
375 | }; |
376 | ||
1da177e4 | 377 | static struct drm_driver driver = { |
792d2b9a DA |
378 | /* don't use mtrr's here, the Xserver or user space app should |
379 | * deal with them for intel hardware. | |
380 | */ | |
673a394b EA |
381 | .driver_features = |
382 | DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/ | |
383 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM, | |
22eae947 | 384 | .load = i915_driver_load, |
ba8bbcf6 | 385 | .unload = i915_driver_unload, |
673a394b | 386 | .open = i915_driver_open, |
22eae947 DA |
387 | .lastclose = i915_driver_lastclose, |
388 | .preclose = i915_driver_preclose, | |
673a394b | 389 | .postclose = i915_driver_postclose, |
cda17380 | 390 | .device_is_agp = i915_driver_device_is_agp, |
0a3e67a4 JB |
391 | .enable_vblank = i915_enable_vblank, |
392 | .disable_vblank = i915_disable_vblank, | |
1da177e4 LT |
393 | .irq_preinstall = i915_driver_irq_preinstall, |
394 | .irq_postinstall = i915_driver_irq_postinstall, | |
395 | .irq_uninstall = i915_driver_irq_uninstall, | |
396 | .irq_handler = i915_driver_irq_handler, | |
397 | .reclaim_buffers = drm_core_reclaim_buffers, | |
398 | .get_map_ofs = drm_core_get_map_ofs, | |
399 | .get_reg_ofs = drm_core_get_reg_ofs, | |
7c1c2871 DA |
400 | .master_create = i915_master_create, |
401 | .master_destroy = i915_master_destroy, | |
955b12de | 402 | #if defined(CONFIG_DEBUG_FS) |
27c202ad BG |
403 | .debugfs_init = i915_debugfs_init, |
404 | .debugfs_cleanup = i915_debugfs_cleanup, | |
955b12de | 405 | #endif |
673a394b EA |
406 | .gem_init_object = i915_gem_init_object, |
407 | .gem_free_object = i915_gem_free_object, | |
de151cf6 | 408 | .gem_vm_ops = &i915_gem_vm_ops, |
1da177e4 LT |
409 | .ioctls = i915_ioctls, |
410 | .fops = { | |
b5e89ed5 DA |
411 | .owner = THIS_MODULE, |
412 | .open = drm_open, | |
413 | .release = drm_release, | |
414 | .ioctl = drm_ioctl, | |
de151cf6 | 415 | .mmap = drm_gem_mmap, |
b5e89ed5 DA |
416 | .poll = drm_poll, |
417 | .fasync = drm_fasync, | |
c9a9c5e0 | 418 | .read = drm_read, |
8ca7c1df | 419 | #ifdef CONFIG_COMPAT |
b5e89ed5 | 420 | .compat_ioctl = i915_compat_ioctl, |
8ca7c1df | 421 | #endif |
22eae947 DA |
422 | }, |
423 | ||
1da177e4 | 424 | .pci_driver = { |
22eae947 DA |
425 | .name = DRIVER_NAME, |
426 | .id_table = pciidlist, | |
112b715e KH |
427 | .probe = i915_pci_probe, |
428 | .remove = i915_pci_remove, | |
cbda12d7 | 429 | .driver.pm = &i915_pm_ops, |
22eae947 | 430 | }, |
bc5f4523 | 431 | |
22eae947 DA |
432 | .name = DRIVER_NAME, |
433 | .desc = DRIVER_DESC, | |
434 | .date = DRIVER_DATE, | |
435 | .major = DRIVER_MAJOR, | |
436 | .minor = DRIVER_MINOR, | |
437 | .patchlevel = DRIVER_PATCHLEVEL, | |
1da177e4 LT |
438 | }; |
439 | ||
440 | static int __init i915_init(void) | |
441 | { | |
442 | driver.num_ioctls = i915_max_ioctl; | |
79e53945 | 443 | |
31169714 CW |
444 | i915_gem_shrinker_init(); |
445 | ||
79e53945 JB |
446 | /* |
447 | * If CONFIG_DRM_I915_KMS is set, default to KMS unless | |
448 | * explicitly disabled with the module pararmeter. | |
449 | * | |
450 | * Otherwise, just follow the parameter (defaulting to off). | |
451 | * | |
452 | * Allow optional vga_text_mode_force boot option to override | |
453 | * the default behavior. | |
454 | */ | |
455 | #if defined(CONFIG_DRM_I915_KMS) | |
456 | if (i915_modeset != 0) | |
457 | driver.driver_features |= DRIVER_MODESET; | |
458 | #endif | |
459 | if (i915_modeset == 1) | |
460 | driver.driver_features |= DRIVER_MODESET; | |
461 | ||
462 | #ifdef CONFIG_VGA_CONSOLE | |
463 | if (vgacon_text_force() && i915_modeset == -1) | |
464 | driver.driver_features &= ~DRIVER_MODESET; | |
465 | #endif | |
466 | ||
1da177e4 LT |
467 | return drm_init(&driver); |
468 | } | |
469 | ||
470 | static void __exit i915_exit(void) | |
471 | { | |
31169714 | 472 | i915_gem_shrinker_exit(); |
1da177e4 LT |
473 | drm_exit(&driver); |
474 | } | |
475 | ||
476 | module_init(i915_init); | |
477 | module_exit(i915_exit); | |
478 | ||
b5e89ed5 DA |
479 | MODULE_AUTHOR(DRIVER_AUTHOR); |
480 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1da177e4 | 481 | MODULE_LICENSE("GPL and additional rights"); |