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b47eb4a2 CW |
1 | /* |
2 | * Copyright © 2008-2010 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
21 | * IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * Chris Wilson <chris@chris-wilson.co.uuk> | |
26 | * | |
27 | */ | |
28 | ||
29 | #include "drmP.h" | |
b47eb4a2 CW |
30 | #include "i915_drv.h" |
31 | #include "i915_drm.h" | |
db53a302 | 32 | #include "i915_trace.h" |
b47eb4a2 | 33 | |
cd377ea9 | 34 | static bool |
05394f39 | 35 | mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind) |
b47eb4a2 | 36 | { |
1b50247a CW |
37 | if (obj->pin_count) |
38 | return false; | |
39 | ||
432e58ed | 40 | list_add(&obj->exec_list, unwind); |
05394f39 | 41 | return drm_mm_scan_add_block(obj->gtt_space); |
b47eb4a2 CW |
42 | } |
43 | ||
44 | int | |
a6e0aa42 | 45 | i915_gem_evict_something(struct drm_device *dev, int min_size, |
5eac3ab4 | 46 | unsigned alignment, bool mappable) |
b47eb4a2 CW |
47 | { |
48 | drm_i915_private_t *dev_priv = dev->dev_private; | |
cd377ea9 | 49 | struct list_head eviction_list, unwind_list; |
05394f39 | 50 | struct drm_i915_gem_object *obj; |
cd377ea9 | 51 | int ret = 0; |
b47eb4a2 | 52 | |
db53a302 CW |
53 | trace_i915_gem_evict(dev, min_size, alignment, mappable); |
54 | ||
cd377ea9 CW |
55 | /* |
56 | * The goal is to evict objects and amalgamate space in LRU order. | |
57 | * The oldest idle objects reside on the inactive list, which is in | |
58 | * retirement order. The next objects to retire are those on the (per | |
59 | * ring) active list that do not have an outstanding flush. Once the | |
60 | * hardware reports completion (the seqno is updated after the | |
61 | * batchbuffer has been finished) the clean buffer objects would | |
62 | * be retired to the inactive list. Any dirty objects would be added | |
63 | * to the tail of the flushing list. So after processing the clean | |
64 | * active objects we need to emit a MI_FLUSH to retire the flushing | |
65 | * list, hence the retirement order of the flushing list is in | |
66 | * advance of the dirty objects on the active lists. | |
67 | * | |
68 | * The retirement sequence is thus: | |
69 | * 1. Inactive objects (already retired) | |
70 | * 2. Clean active objects | |
71 | * 3. Flushing list | |
72 | * 4. Dirty active objects. | |
73 | * | |
74 | * On each list, the oldest objects lie at the HEAD with the freshest | |
75 | * object on the TAIL. | |
76 | */ | |
77 | ||
78 | INIT_LIST_HEAD(&unwind_list); | |
a6e0aa42 | 79 | if (mappable) |
6b9d89b4 CW |
80 | drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space, |
81 | min_size, alignment, 0, | |
82 | 0, dev_priv->mm.gtt_mappable_end); | |
a6e0aa42 | 83 | else |
6b9d89b4 CW |
84 | drm_mm_init_scan(&dev_priv->mm.gtt_space, |
85 | min_size, alignment, 0); | |
cd377ea9 CW |
86 | |
87 | /* First see if there is a large enough contiguous idle region... */ | |
05394f39 CW |
88 | list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) { |
89 | if (mark_free(obj, &unwind_list)) | |
cd377ea9 CW |
90 | goto found; |
91 | } | |
b47eb4a2 | 92 | |
cd377ea9 | 93 | /* Now merge in the soon-to-be-expired objects... */ |
05394f39 | 94 | list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) { |
cd377ea9 | 95 | /* Does the object require an outstanding flush? */ |
1b50247a | 96 | if (obj->base.write_domain) |
b47eb4a2 | 97 | continue; |
b47eb4a2 | 98 | |
05394f39 | 99 | if (mark_free(obj, &unwind_list)) |
cd377ea9 CW |
100 | goto found; |
101 | } | |
b47eb4a2 | 102 | |
cd377ea9 | 103 | /* Finally add anything with a pending flush (in order of retirement) */ |
05394f39 | 104 | list_for_each_entry(obj, &dev_priv->mm.flushing_list, mm_list) { |
05394f39 | 105 | if (mark_free(obj, &unwind_list)) |
cd377ea9 CW |
106 | goto found; |
107 | } | |
05394f39 | 108 | list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) { |
1b50247a | 109 | if (!obj->base.write_domain) |
b47eb4a2 | 110 | continue; |
b47eb4a2 | 111 | |
05394f39 | 112 | if (mark_free(obj, &unwind_list)) |
cd377ea9 CW |
113 | goto found; |
114 | } | |
115 | ||
116 | /* Nothing found, clean up and bail out! */ | |
092de6f2 CW |
117 | while (!list_empty(&unwind_list)) { |
118 | obj = list_first_entry(&unwind_list, | |
119 | struct drm_i915_gem_object, | |
120 | exec_list); | |
121 | ||
05394f39 | 122 | ret = drm_mm_scan_remove_block(obj->gtt_space); |
cd377ea9 | 123 | BUG_ON(ret); |
092de6f2 CW |
124 | |
125 | list_del_init(&obj->exec_list); | |
cd377ea9 CW |
126 | } |
127 | ||
128 | /* We expect the caller to unpin, evict all and try again, or give up. | |
129 | * So calling i915_gem_evict_everything() is unnecessary. | |
130 | */ | |
131 | return -ENOSPC; | |
132 | ||
133 | found: | |
e39a0150 CW |
134 | /* drm_mm doesn't allow any other other operations while |
135 | * scanning, therefore store to be evicted objects on a | |
136 | * temporary list. */ | |
cd377ea9 | 137 | INIT_LIST_HEAD(&eviction_list); |
e39a0150 | 138 | while (!list_empty(&unwind_list)) { |
05394f39 CW |
139 | obj = list_first_entry(&unwind_list, |
140 | struct drm_i915_gem_object, | |
432e58ed | 141 | exec_list); |
05394f39 | 142 | if (drm_mm_scan_remove_block(obj->gtt_space)) { |
432e58ed | 143 | list_move(&obj->exec_list, &eviction_list); |
b6708242 | 144 | drm_gem_object_reference(&obj->base); |
e39a0150 CW |
145 | continue; |
146 | } | |
432e58ed | 147 | list_del_init(&obj->exec_list); |
cd377ea9 | 148 | } |
b47eb4a2 | 149 | |
cd377ea9 | 150 | /* Unbinding will emit any required flushes */ |
e39a0150 | 151 | while (!list_empty(&eviction_list)) { |
05394f39 CW |
152 | obj = list_first_entry(&eviction_list, |
153 | struct drm_i915_gem_object, | |
432e58ed | 154 | exec_list); |
e39a0150 | 155 | if (ret == 0) |
05394f39 | 156 | ret = i915_gem_object_unbind(obj); |
092de6f2 | 157 | |
432e58ed | 158 | list_del_init(&obj->exec_list); |
05394f39 | 159 | drm_gem_object_unreference(&obj->base); |
b47eb4a2 | 160 | } |
cd377ea9 | 161 | |
e39a0150 | 162 | return ret; |
b47eb4a2 CW |
163 | } |
164 | ||
165 | int | |
5eac3ab4 | 166 | i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only) |
b47eb4a2 CW |
167 | { |
168 | drm_i915_private_t *dev_priv = dev->dev_private; | |
a39d7efc | 169 | struct drm_i915_gem_object *obj, *next; |
b47eb4a2 | 170 | bool lists_empty; |
b4519513 | 171 | int ret; |
b47eb4a2 | 172 | |
b47eb4a2 CW |
173 | lists_empty = (list_empty(&dev_priv->mm.inactive_list) && |
174 | list_empty(&dev_priv->mm.flushing_list) && | |
395b70be | 175 | list_empty(&dev_priv->mm.active_list)); |
b47eb4a2 CW |
176 | if (lists_empty) |
177 | return -ENOSPC; | |
178 | ||
db53a302 CW |
179 | trace_i915_gem_evict_everything(dev, purgeable_only); |
180 | ||
b2da9fe5 BW |
181 | /* The gpu_idle will flush everything in the write domain to the |
182 | * active list. Then we must move everything off the active list | |
183 | * with retire requests. | |
184 | */ | |
b4519513 CW |
185 | ret = i915_gpu_idle(dev); |
186 | if (ret) | |
187 | return ret; | |
b2da9fe5 BW |
188 | |
189 | i915_gem_retire_requests(dev); | |
190 | ||
b47eb4a2 CW |
191 | BUG_ON(!list_empty(&dev_priv->mm.flushing_list)); |
192 | ||
a39d7efc | 193 | /* Having flushed everything, unbind() should never raise an error */ |
5eac3ab4 CW |
194 | list_for_each_entry_safe(obj, next, |
195 | &dev_priv->mm.inactive_list, mm_list) { | |
196 | if (!purgeable_only || obj->madv != I915_MADV_WILLNEED) { | |
a39d7efc CW |
197 | if (obj->pin_count == 0) |
198 | WARN_ON(i915_gem_object_unbind(obj)); | |
b47eb4a2 CW |
199 | } |
200 | } | |
201 | ||
b4519513 | 202 | return 0; |
b47eb4a2 | 203 | } |