drm/i915: Recognise non-VGA display devices
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_gem_gtt.c
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76aaf220
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1/*
2 * Copyright © 2010 Daniel Vetter
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25#include "drmP.h"
26#include "drm.h"
27#include "i915_drm.h"
28#include "i915_drv.h"
29#include "i915_trace.h"
30#include "intel_drv.h"
31
32void i915_gem_restore_gtt_mappings(struct drm_device *dev)
33{
34 struct drm_i915_private *dev_priv = dev->dev_private;
05394f39 35 struct drm_i915_gem_object *obj;
76aaf220 36
05394f39 37 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
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38 i915_gem_clflush_object(obj);
39
185cbcb3 40 if (dev_priv->mm.gtt->needs_dmar) {
05394f39 41 BUG_ON(!obj->sg_list);
185cbcb3 42
05394f39
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43 intel_gtt_insert_sg_entries(obj->sg_list,
44 obj->num_sg,
45 obj->gtt_space->start
185cbcb3 46 >> PAGE_SHIFT,
05394f39 47 obj->agp_type);
185cbcb3 48 } else
05394f39 49 intel_gtt_insert_pages(obj->gtt_space->start
185cbcb3 50 >> PAGE_SHIFT,
05394f39
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51 obj->base.size >> PAGE_SHIFT,
52 obj->pages,
53 obj->agp_type);
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54 }
55
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56 intel_gtt_chipset_flush();
57}
7c2e6fdf 58
05394f39 59int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj)
7c2e6fdf 60{
05394f39 61 struct drm_device *dev = obj->base.dev;
185cbcb3 62 struct drm_i915_private *dev_priv = dev->dev_private;
185cbcb3 63 int ret;
7c2e6fdf 64
185cbcb3 65 if (dev_priv->mm.gtt->needs_dmar) {
05394f39
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66 ret = intel_gtt_map_memory(obj->pages,
67 obj->base.size >> PAGE_SHIFT,
68 &obj->sg_list,
69 &obj->num_sg);
185cbcb3
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70 if (ret != 0)
71 return ret;
72
05394f39
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73 intel_gtt_insert_sg_entries(obj->sg_list,
74 obj->num_sg,
75 obj->gtt_space->start >> PAGE_SHIFT,
76 obj->agp_type);
185cbcb3 77 } else
05394f39
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78 intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,
79 obj->base.size >> PAGE_SHIFT,
80 obj->pages,
81 obj->agp_type);
7c2e6fdf 82
185cbcb3 83 return 0;
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84}
85
05394f39 86void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)
7c2e6fdf 87{
d9126400
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88 intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT,
89 obj->base.size >> PAGE_SHIFT);
7c2e6fdf 90
d9126400 91 if (obj->sg_list) {
05394f39
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92 intel_gtt_unmap_memory(obj->sg_list, obj->num_sg);
93 obj->sg_list = NULL;
185cbcb3 94 }
7c2e6fdf 95}
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