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8ee1c3db MG |
1 | /* |
2 | * Copyright 2008 Intel Corporation <hong.liu@intel.com> | |
3 | * Copyright 2008 Red Hat <mjg@redhat.com> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
20 | * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
22 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
24 | * SOFTWARE. | |
25 | * | |
26 | */ | |
27 | ||
28 | #include <linux/acpi.h> | |
74a365b3 | 29 | #include <acpi/video.h> |
8ee1c3db MG |
30 | |
31 | #include "drmP.h" | |
32 | #include "i915_drm.h" | |
33 | #include "i915_drv.h" | |
34 | ||
35 | #define PCI_ASLE 0xe4 | |
36 | #define PCI_LBPC 0xf4 | |
37 | #define PCI_ASLS 0xfc | |
38 | ||
39 | #define OPREGION_SZ (8*1024) | |
40 | #define OPREGION_HEADER_OFFSET 0 | |
41 | #define OPREGION_ACPI_OFFSET 0x100 | |
42 | #define OPREGION_SWSCI_OFFSET 0x200 | |
43 | #define OPREGION_ASLE_OFFSET 0x300 | |
44 | #define OPREGION_VBT_OFFSET 0x1000 | |
45 | ||
46 | #define OPREGION_SIGNATURE "IntelGraphicsMem" | |
47 | #define MBOX_ACPI (1<<0) | |
48 | #define MBOX_SWSCI (1<<1) | |
49 | #define MBOX_ASLE (1<<2) | |
50 | ||
51 | struct opregion_header { | |
52 | u8 signature[16]; | |
53 | u32 size; | |
54 | u32 opregion_ver; | |
55 | u8 bios_ver[32]; | |
56 | u8 vbios_ver[16]; | |
57 | u8 driver_ver[16]; | |
58 | u32 mboxes; | |
59 | u8 reserved[164]; | |
60 | } __attribute__((packed)); | |
61 | ||
62 | /* OpRegion mailbox #1: public ACPI methods */ | |
63 | struct opregion_acpi { | |
64 | u32 drdy; /* driver readiness */ | |
65 | u32 csts; /* notification status */ | |
66 | u32 cevt; /* current event */ | |
67 | u8 rsvd1[20]; | |
68 | u32 didl[8]; /* supported display devices ID list */ | |
69 | u32 cpdl[8]; /* currently presented display list */ | |
70 | u32 cadl[8]; /* currently active display list */ | |
71 | u32 nadl[8]; /* next active devices list */ | |
72 | u32 aslp; /* ASL sleep time-out */ | |
73 | u32 tidx; /* toggle table index */ | |
74 | u32 chpd; /* current hotplug enable indicator */ | |
75 | u32 clid; /* current lid state*/ | |
76 | u32 cdck; /* current docking state */ | |
77 | u32 sxsw; /* Sx state resume */ | |
78 | u32 evts; /* ASL supported events */ | |
79 | u32 cnot; /* current OS notification */ | |
80 | u32 nrdy; /* driver status */ | |
81 | u8 rsvd2[60]; | |
82 | } __attribute__((packed)); | |
83 | ||
84 | /* OpRegion mailbox #2: SWSCI */ | |
85 | struct opregion_swsci { | |
86 | u32 scic; /* SWSCI command|status|data */ | |
87 | u32 parm; /* command parameters */ | |
88 | u32 dslp; /* driver sleep time-out */ | |
89 | u8 rsvd[244]; | |
90 | } __attribute__((packed)); | |
91 | ||
92 | /* OpRegion mailbox #3: ASLE */ | |
93 | struct opregion_asle { | |
94 | u32 ardy; /* driver readiness */ | |
95 | u32 aslc; /* ASLE interrupt command */ | |
96 | u32 tche; /* technology enabled indicator */ | |
97 | u32 alsi; /* current ALS illuminance reading */ | |
98 | u32 bclp; /* backlight brightness to set */ | |
99 | u32 pfit; /* panel fitting state */ | |
100 | u32 cblv; /* current brightness level */ | |
101 | u16 bclm[20]; /* backlight level duty cycle mapping table */ | |
102 | u32 cpfm; /* current panel fitting mode */ | |
103 | u32 epfm; /* enabled panel fitting modes */ | |
104 | u8 plut[74]; /* panel LUT and identifier */ | |
105 | u32 pfmb; /* PWM freq and min brightness */ | |
106 | u8 rsvd[102]; | |
107 | } __attribute__((packed)); | |
108 | ||
109 | /* ASLE irq request bits */ | |
110 | #define ASLE_SET_ALS_ILLUM (1 << 0) | |
111 | #define ASLE_SET_BACKLIGHT (1 << 1) | |
112 | #define ASLE_SET_PFIT (1 << 2) | |
113 | #define ASLE_SET_PWM_FREQ (1 << 3) | |
114 | #define ASLE_REQ_MSK 0xf | |
115 | ||
116 | /* response bits of ASLE irq request */ | |
117 | #define ASLE_ALS_ILLUM_FAIL (2<<10) | |
118 | #define ASLE_BACKLIGHT_FAIL (2<<12) | |
119 | #define ASLE_PFIT_FAIL (2<<14) | |
120 | #define ASLE_PWM_FREQ_FAIL (2<<16) | |
01c66889 ZY |
121 | #define ASLE_ALS_ILLUM_FAILED (1<<10) |
122 | #define ASLE_BACKLIGHT_FAILED (1<<12) | |
123 | #define ASLE_PFIT_FAILED (1<<14) | |
124 | #define ASLE_PWM_FREQ_FAILED (1<<16) | |
8ee1c3db MG |
125 | |
126 | /* ASLE backlight brightness to set */ | |
127 | #define ASLE_BCLP_VALID (1<<31) | |
128 | #define ASLE_BCLP_MSK (~(1<<31)) | |
129 | ||
130 | /* ASLE panel fitting request */ | |
131 | #define ASLE_PFIT_VALID (1<<31) | |
132 | #define ASLE_PFIT_CENTER (1<<0) | |
133 | #define ASLE_PFIT_STRETCH_TEXT (1<<1) | |
134 | #define ASLE_PFIT_STRETCH_GFX (1<<2) | |
135 | ||
136 | /* PWM frequency and minimum brightness */ | |
137 | #define ASLE_PFMB_BRIGHTNESS_MASK (0xff) | |
138 | #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8) | |
139 | #define ASLE_PFMB_PWM_MASK (0x7ffffe00) | |
140 | #define ASLE_PFMB_PWM_VALID (1<<31) | |
141 | ||
142 | #define ASLE_CBLV_VALID (1<<31) | |
143 | ||
74a365b3 MG |
144 | #define ACPI_OTHER_OUTPUT (0<<8) |
145 | #define ACPI_VGA_OUTPUT (1<<8) | |
146 | #define ACPI_TV_OUTPUT (2<<8) | |
147 | #define ACPI_DIGITAL_OUTPUT (3<<8) | |
148 | #define ACPI_LVDS_OUTPUT (4<<8) | |
149 | ||
8ee1c3db MG |
150 | static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) |
151 | { | |
152 | struct drm_i915_private *dev_priv = dev->dev_private; | |
153 | struct opregion_asle *asle = dev_priv->opregion.asle; | |
154 | u32 blc_pwm_ctl, blc_pwm_ctl2; | |
078a033f | 155 | u32 max_backlight, level, shift; |
8ee1c3db MG |
156 | |
157 | if (!(bclp & ASLE_BCLP_VALID)) | |
158 | return ASLE_BACKLIGHT_FAIL; | |
159 | ||
160 | bclp &= ASLE_BCLP_MSK; | |
161 | if (bclp < 0 || bclp > 255) | |
162 | return ASLE_BACKLIGHT_FAIL; | |
163 | ||
164 | blc_pwm_ctl = I915_READ(BLC_PWM_CTL); | |
8ee1c3db MG |
165 | blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2); |
166 | ||
078a033f | 167 | if (IS_I965G(dev) && (blc_pwm_ctl2 & BLM_COMBINATION_MODE)) |
8ee1c3db | 168 | pci_write_config_dword(dev->pdev, PCI_LBPC, bclp); |
078a033f | 169 | else { |
f2b115e6 | 170 | if (IS_PINEVIEW(dev)) { |
078a033f LP |
171 | blc_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); |
172 | max_backlight = (blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> | |
173 | BACKLIGHT_MODULATION_FREQ_SHIFT; | |
174 | shift = BACKLIGHT_DUTY_CYCLE_SHIFT + 1; | |
175 | } else { | |
176 | blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; | |
177 | max_backlight = ((blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> | |
178 | BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; | |
179 | shift = BACKLIGHT_DUTY_CYCLE_SHIFT; | |
180 | } | |
181 | level = (bclp * max_backlight) / 255; | |
182 | I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | (level << shift)); | |
183 | } | |
8ee1c3db MG |
184 | asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; |
185 | ||
186 | return 0; | |
187 | } | |
188 | ||
189 | static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi) | |
190 | { | |
191 | /* alsi is the current ALS reading in lux. 0 indicates below sensor | |
192 | range, 0xffff indicates above sensor range. 1-0xfffe are valid */ | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb) | |
197 | { | |
198 | struct drm_i915_private *dev_priv = dev->dev_private; | |
199 | if (pfmb & ASLE_PFMB_PWM_VALID) { | |
200 | u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL); | |
201 | u32 pwm = pfmb & ASLE_PFMB_PWM_MASK; | |
202 | blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK; | |
203 | pwm = pwm >> 9; | |
204 | /* FIXME - what do we do with the PWM? */ | |
205 | } | |
206 | return 0; | |
207 | } | |
208 | ||
209 | static u32 asle_set_pfit(struct drm_device *dev, u32 pfit) | |
210 | { | |
211 | /* Panel fitting is currently controlled by the X code, so this is a | |
212 | noop until modesetting support works fully */ | |
213 | if (!(pfit & ASLE_PFIT_VALID)) | |
214 | return ASLE_PFIT_FAIL; | |
215 | return 0; | |
216 | } | |
217 | ||
218 | void opregion_asle_intr(struct drm_device *dev) | |
219 | { | |
220 | struct drm_i915_private *dev_priv = dev->dev_private; | |
221 | struct opregion_asle *asle = dev_priv->opregion.asle; | |
222 | u32 asle_stat = 0; | |
223 | u32 asle_req; | |
224 | ||
225 | if (!asle) | |
226 | return; | |
227 | ||
228 | asle_req = asle->aslc & ASLE_REQ_MSK; | |
229 | ||
230 | if (!asle_req) { | |
44d98a61 | 231 | DRM_DEBUG_DRIVER("non asle set request??\n"); |
8ee1c3db MG |
232 | return; |
233 | } | |
234 | ||
235 | if (asle_req & ASLE_SET_ALS_ILLUM) | |
236 | asle_stat |= asle_set_als_illum(dev, asle->alsi); | |
237 | ||
238 | if (asle_req & ASLE_SET_BACKLIGHT) | |
239 | asle_stat |= asle_set_backlight(dev, asle->bclp); | |
240 | ||
241 | if (asle_req & ASLE_SET_PFIT) | |
242 | asle_stat |= asle_set_pfit(dev, asle->pfit); | |
243 | ||
244 | if (asle_req & ASLE_SET_PWM_FREQ) | |
245 | asle_stat |= asle_set_pwm_freq(dev, asle->pfmb); | |
246 | ||
247 | asle->aslc = asle_stat; | |
248 | } | |
249 | ||
01c66889 ZY |
250 | static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp) |
251 | { | |
252 | struct drm_i915_private *dev_priv = dev->dev_private; | |
253 | struct opregion_asle *asle = dev_priv->opregion.asle; | |
254 | u32 cpu_pwm_ctl, pch_pwm_ctl2; | |
255 | u32 max_backlight, level; | |
256 | ||
257 | if (!(bclp & ASLE_BCLP_VALID)) | |
258 | return ASLE_BACKLIGHT_FAILED; | |
259 | ||
260 | bclp &= ASLE_BCLP_MSK; | |
261 | if (bclp < 0 || bclp > 255) | |
262 | return ASLE_BACKLIGHT_FAILED; | |
263 | ||
264 | cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL); | |
265 | pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
266 | /* get the max PWM frequency */ | |
267 | max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK; | |
268 | /* calculate the expected PMW frequency */ | |
269 | level = (bclp * max_backlight) / 255; | |
270 | /* reserve the high 16 bits */ | |
271 | cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK); | |
272 | /* write the updated PWM frequency */ | |
273 | I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level); | |
274 | ||
275 | asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
280 | void ironlake_opregion_gse_intr(struct drm_device *dev) | |
281 | { | |
282 | struct drm_i915_private *dev_priv = dev->dev_private; | |
283 | struct opregion_asle *asle = dev_priv->opregion.asle; | |
284 | u32 asle_stat = 0; | |
285 | u32 asle_req; | |
286 | ||
287 | if (!asle) | |
288 | return; | |
289 | ||
290 | asle_req = asle->aslc & ASLE_REQ_MSK; | |
291 | ||
292 | if (!asle_req) { | |
293 | DRM_DEBUG_DRIVER("non asle set request??\n"); | |
294 | return; | |
295 | } | |
296 | ||
297 | if (asle_req & ASLE_SET_ALS_ILLUM) { | |
298 | DRM_DEBUG_DRIVER("Illum is not supported\n"); | |
299 | asle_stat |= ASLE_ALS_ILLUM_FAILED; | |
300 | } | |
301 | ||
302 | if (asle_req & ASLE_SET_BACKLIGHT) | |
303 | asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp); | |
304 | ||
305 | if (asle_req & ASLE_SET_PFIT) { | |
306 | DRM_DEBUG_DRIVER("Pfit is not supported\n"); | |
307 | asle_stat |= ASLE_PFIT_FAILED; | |
308 | } | |
309 | ||
310 | if (asle_req & ASLE_SET_PWM_FREQ) { | |
311 | DRM_DEBUG_DRIVER("PWM freq is not supported\n"); | |
312 | asle_stat |= ASLE_PWM_FREQ_FAILED; | |
313 | } | |
314 | ||
315 | asle->aslc = asle_stat; | |
316 | } | |
8ee1c3db MG |
317 | #define ASLE_ALS_EN (1<<0) |
318 | #define ASLE_BLC_EN (1<<1) | |
319 | #define ASLE_PFIT_EN (1<<2) | |
320 | #define ASLE_PFMB_EN (1<<3) | |
321 | ||
322 | void opregion_enable_asle(struct drm_device *dev) | |
323 | { | |
324 | struct drm_i915_private *dev_priv = dev->dev_private; | |
325 | struct opregion_asle *asle = dev_priv->opregion.asle; | |
326 | ||
327 | if (asle) { | |
8ee1c3db | 328 | if (IS_MOBILE(dev)) { |
7c463586 KP |
329 | unsigned long irqflags; |
330 | ||
331 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); | |
01c66889 | 332 | intel_enable_asle(dev); |
7c463586 KP |
333 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, |
334 | irqflags); | |
335 | } | |
8ee1c3db MG |
336 | |
337 | asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN | | |
338 | ASLE_PFMB_EN; | |
339 | asle->ardy = 1; | |
340 | } | |
341 | } | |
342 | ||
343 | #define ACPI_EV_DISPLAY_SWITCH (1<<0) | |
344 | #define ACPI_EV_LID (1<<1) | |
345 | #define ACPI_EV_DOCK (1<<2) | |
346 | ||
347 | static struct intel_opregion *system_opregion; | |
348 | ||
b358d0a6 HE |
349 | static int intel_opregion_video_event(struct notifier_block *nb, |
350 | unsigned long val, void *data) | |
8ee1c3db MG |
351 | { |
352 | /* The only video events relevant to opregion are 0x80. These indicate | |
353 | either a docking event, lid switch or display switch request. In | |
354 | Linux, these are handled by the dock, button and video drivers. | |
355 | We might want to fix the video driver to be opregion-aware in | |
356 | future, but right now we just indicate to the firmware that the | |
357 | request has been handled */ | |
358 | ||
359 | struct opregion_acpi *acpi; | |
360 | ||
361 | if (!system_opregion) | |
362 | return NOTIFY_DONE; | |
363 | ||
364 | acpi = system_opregion->acpi; | |
365 | acpi->csts = 0; | |
366 | ||
367 | return NOTIFY_OK; | |
368 | } | |
369 | ||
370 | static struct notifier_block intel_opregion_notifier = { | |
371 | .notifier_call = intel_opregion_video_event, | |
372 | }; | |
373 | ||
74a365b3 MG |
374 | /* |
375 | * Initialise the DIDL field in opregion. This passes a list of devices to | |
376 | * the firmware. Values are defined by section B.4.2 of the ACPI specification | |
377 | * (version 3) | |
378 | */ | |
379 | ||
380 | static void intel_didl_outputs(struct drm_device *dev) | |
381 | { | |
382 | struct drm_i915_private *dev_priv = dev->dev_private; | |
383 | struct intel_opregion *opregion = &dev_priv->opregion; | |
384 | struct drm_connector *connector; | |
3143751f ZR |
385 | acpi_handle handle; |
386 | struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL; | |
387 | unsigned long long device_id; | |
388 | acpi_status status; | |
74a365b3 MG |
389 | int i = 0; |
390 | ||
3143751f ZR |
391 | handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev); |
392 | if (!handle || ACPI_FAILURE(acpi_bus_get_device(handle, &acpi_dev))) | |
393 | return; | |
394 | ||
395 | if (acpi_is_video_device(acpi_dev)) | |
396 | acpi_video_bus = acpi_dev; | |
397 | else { | |
398 | list_for_each_entry(acpi_cdev, &acpi_dev->children, node) { | |
399 | if (acpi_is_video_device(acpi_cdev)) { | |
400 | acpi_video_bus = acpi_cdev; | |
401 | break; | |
402 | } | |
403 | } | |
404 | } | |
405 | ||
406 | if (!acpi_video_bus) { | |
407 | printk(KERN_WARNING "No ACPI video bus found\n"); | |
408 | return; | |
409 | } | |
410 | ||
411 | list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) { | |
412 | if (i >= 8) { | |
413 | dev_printk (KERN_ERR, &dev->pdev->dev, | |
414 | "More than 8 outputs detected\n"); | |
415 | return; | |
416 | } | |
417 | status = | |
418 | acpi_evaluate_integer(acpi_cdev->handle, "_ADR", | |
419 | NULL, &device_id); | |
420 | if (ACPI_SUCCESS(status)) { | |
421 | if (!device_id) | |
422 | goto blind_set; | |
423 | opregion->acpi->didl[i] = (u32)(device_id & 0x0f0f); | |
424 | i++; | |
425 | } | |
426 | } | |
427 | ||
428 | end: | |
429 | /* If fewer than 8 outputs, the list must be null terminated */ | |
430 | if (i < 8) | |
431 | opregion->acpi->didl[i] = 0; | |
432 | return; | |
433 | ||
434 | blind_set: | |
435 | i = 0; | |
74a365b3 MG |
436 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
437 | int output_type = ACPI_OTHER_OUTPUT; | |
438 | if (i >= 8) { | |
439 | dev_printk (KERN_ERR, &dev->pdev->dev, | |
440 | "More than 8 outputs detected\n"); | |
441 | return; | |
442 | } | |
443 | switch (connector->connector_type) { | |
444 | case DRM_MODE_CONNECTOR_VGA: | |
445 | case DRM_MODE_CONNECTOR_DVIA: | |
446 | output_type = ACPI_VGA_OUTPUT; | |
447 | break; | |
448 | case DRM_MODE_CONNECTOR_Composite: | |
449 | case DRM_MODE_CONNECTOR_SVIDEO: | |
450 | case DRM_MODE_CONNECTOR_Component: | |
451 | case DRM_MODE_CONNECTOR_9PinDIN: | |
452 | output_type = ACPI_TV_OUTPUT; | |
453 | break; | |
454 | case DRM_MODE_CONNECTOR_DVII: | |
455 | case DRM_MODE_CONNECTOR_DVID: | |
456 | case DRM_MODE_CONNECTOR_DisplayPort: | |
457 | case DRM_MODE_CONNECTOR_HDMIA: | |
458 | case DRM_MODE_CONNECTOR_HDMIB: | |
459 | output_type = ACPI_DIGITAL_OUTPUT; | |
460 | break; | |
461 | case DRM_MODE_CONNECTOR_LVDS: | |
462 | output_type = ACPI_LVDS_OUTPUT; | |
463 | break; | |
464 | } | |
465 | opregion->acpi->didl[i] |= (1<<31) | output_type | i; | |
466 | i++; | |
467 | } | |
3143751f | 468 | goto end; |
74a365b3 MG |
469 | } |
470 | ||
471 | int intel_opregion_init(struct drm_device *dev, int resume) | |
8ee1c3db MG |
472 | { |
473 | struct drm_i915_private *dev_priv = dev->dev_private; | |
474 | struct intel_opregion *opregion = &dev_priv->opregion; | |
475 | void *base; | |
476 | u32 asls, mboxes; | |
477 | int err = 0; | |
478 | ||
479 | pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); | |
44d98a61 | 480 | DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls); |
8ee1c3db | 481 | if (asls == 0) { |
44d98a61 | 482 | DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n"); |
8ee1c3db MG |
483 | return -ENOTSUPP; |
484 | } | |
485 | ||
486 | base = ioremap(asls, OPREGION_SZ); | |
487 | if (!base) | |
488 | return -ENOMEM; | |
489 | ||
490 | opregion->header = base; | |
491 | if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) { | |
44d98a61 | 492 | DRM_DEBUG_DRIVER("opregion signature mismatch\n"); |
8ee1c3db MG |
493 | err = -EINVAL; |
494 | goto err_out; | |
495 | } | |
496 | ||
497 | mboxes = opregion->header->mboxes; | |
498 | if (mboxes & MBOX_ACPI) { | |
44d98a61 | 499 | DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); |
8ee1c3db | 500 | opregion->acpi = base + OPREGION_ACPI_OFFSET; |
d770e3cf | 501 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
74a365b3 | 502 | intel_didl_outputs(dev); |
8ee1c3db | 503 | } else { |
44d98a61 | 504 | DRM_DEBUG_DRIVER("Public ACPI methods not supported\n"); |
8ee1c3db MG |
505 | err = -ENOTSUPP; |
506 | goto err_out; | |
507 | } | |
508 | opregion->enabled = 1; | |
509 | ||
510 | if (mboxes & MBOX_SWSCI) { | |
44d98a61 | 511 | DRM_DEBUG_DRIVER("SWSCI supported\n"); |
8ee1c3db MG |
512 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; |
513 | } | |
514 | if (mboxes & MBOX_ASLE) { | |
44d98a61 | 515 | DRM_DEBUG_DRIVER("ASLE supported\n"); |
8ee1c3db | 516 | opregion->asle = base + OPREGION_ASLE_OFFSET; |
44ab4315 | 517 | opregion_enable_asle(dev); |
8ee1c3db MG |
518 | } |
519 | ||
d770e3cf MG |
520 | if (!resume) |
521 | acpi_video_register(); | |
522 | ||
523 | ||
8ee1c3db MG |
524 | /* Notify BIOS we are ready to handle ACPI video ext notifs. |
525 | * Right now, all the events are handled by the ACPI video module. | |
526 | * We don't actually need to do anything with them. */ | |
527 | opregion->acpi->csts = 0; | |
528 | opregion->acpi->drdy = 1; | |
529 | ||
530 | system_opregion = opregion; | |
531 | register_acpi_notifier(&intel_opregion_notifier); | |
532 | ||
533 | return 0; | |
534 | ||
535 | err_out: | |
536 | iounmap(opregion->header); | |
537 | opregion->header = NULL; | |
538 | return err; | |
539 | } | |
540 | ||
3b1c1c11 | 541 | void intel_opregion_free(struct drm_device *dev, int suspend) |
8ee1c3db MG |
542 | { |
543 | struct drm_i915_private *dev_priv = dev->dev_private; | |
544 | struct intel_opregion *opregion = &dev_priv->opregion; | |
545 | ||
546 | if (!opregion->enabled) | |
547 | return; | |
548 | ||
3b1c1c11 | 549 | if (!suspend) |
86e437f0 | 550 | acpi_video_unregister(); |
3b1c1c11 | 551 | |
8ee1c3db MG |
552 | opregion->acpi->drdy = 0; |
553 | ||
554 | system_opregion = NULL; | |
555 | unregister_acpi_notifier(&intel_opregion_notifier); | |
556 | ||
557 | /* just clear all opregion memory pointers now */ | |
558 | iounmap(opregion->header); | |
559 | opregion->header = NULL; | |
560 | opregion->acpi = NULL; | |
561 | opregion->swsci = NULL; | |
562 | opregion->asle = NULL; | |
563 | ||
564 | opregion->enabled = 0; | |
565 | } |