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drm/i915: move dev_priv->suspend around
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB		 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
25e341cf 27#include <linux/dmi.h>
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH		 29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945
JB		 31#include "i915_drv.h"
32#include "intel_bios.h"
33
9b9d172d 34#define SLAVE_ADDR1 0x70
35#define SLAVE_ADDR2 0x72
79e53945 36
500a8cc4
ZW		 37static int panel_type;
38
79e53945
JB		 39static void *
40find_section(struct bdb_header *bdb, int section_id)
41{
42 u8 *base = (u8 *)bdb;
43 int index = 0;
44 u16 total, current_size;
45 u8 current_id;
46
47 /* skip to first section */
48 index += bdb->header_size;
49 total = bdb->bdb_size;
50
51 /* walk the sections looking for section_id */
52 while (index < total) {
53 current_id = *(base + index);
54 index++;
55 current_size = *((u16 *)(base + index));
56 index += 2;
57 if (current_id == section_id)
58 return base + index;
59 index += current_size;
60 }
61
62 return NULL;
63}
64
db545019
DMEA		 65static u16
66get_blocksize(void *p)
67{
68 u16 *block_ptr, block_size;
69
70 block_ptr = (u16 *)((char *)p - 2);
71 block_size = *block_ptr;
72 return block_size;
73}
74
79e53945 75static void
88631706 76fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 77 const struct lvds_dvo_timing *dvo_timing)
88631706
ML		 78{
79 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
80 dvo_timing->hactive_lo;
81 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
82 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
83 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
84 dvo_timing->hsync_pulse_width;
85 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
86 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
87
88 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
89 dvo_timing->vactive_lo;
90 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
91 dvo_timing->vsync_off;
92 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
93 dvo_timing->vsync_pulse_width;
94 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
95 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
96 panel_fixed_mode->clock = dvo_timing->clock * 10;
97 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
98
9bc35499
AJ		 99 if (dvo_timing->hsync_positive)
100 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
101 else
102 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
103
104 if (dvo_timing->vsync_positive)
105 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
106 else
107 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
108
88631706
ML		 109 /* Some VBTs have bogus h/vtotal values */
110 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
111 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
112 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
113 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
114
115 drm_mode_set_name(panel_fixed_mode);
116}
117
99834ea4
CW		 118static bool
119lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
120 const struct lvds_dvo_timing *b)
121{
122 if (a->hactive_hi != b->hactive_hi ||
123 a->hactive_lo != b->hactive_lo)
124 return false;
125
126 if (a->hsync_off_hi != b->hsync_off_hi ||
127 a->hsync_off_lo != b->hsync_off_lo)
128 return false;
129
130 if (a->hsync_pulse_width != b->hsync_pulse_width)
131 return false;
132
133 if (a->hblank_hi != b->hblank_hi ||
134 a->hblank_lo != b->hblank_lo)
135 return false;
136
137 if (a->vactive_hi != b->vactive_hi ||
138 a->vactive_lo != b->vactive_lo)
139 return false;
140
141 if (a->vsync_off != b->vsync_off)
142 return false;
143
144 if (a->vsync_pulse_width != b->vsync_pulse_width)
145 return false;
146
147 if (a->vblank_hi != b->vblank_hi ||
148 a->vblank_lo != b->vblank_lo)
149 return false;
150
151 return true;
152}
153
154static const struct lvds_dvo_timing *
155get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
156 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
157 int index)
158{
159 /*
160 * the size of fp_timing varies on the different platform.
161 * So calculate the DVO timing relative offset in LVDS data
162 * entry to get the DVO timing entry
163 */
164
165 int lfp_data_size =
166 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
168 int dvo_timing_offset =
169 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
170 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
171 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
172
173 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
174}
175
b0354385
TI		 176/* get lvds_fp_timing entry
177 * this function may return NULL if the corresponding entry is invalid
178 */
179static const struct lvds_fp_timing *
180get_lvds_fp_timing(const struct bdb_header *bdb,
181 const struct bdb_lvds_lfp_data *data,
182 const struct bdb_lvds_lfp_data_ptrs *ptrs,
183 int index)
184{
185 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
186 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
187 size_t ofs;
188
189 if (index >= ARRAY_SIZE(ptrs->ptr))
190 return NULL;
191 ofs = ptrs->ptr[index].fp_timing_offset;
192 if (ofs < data_ofs ||
193 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
194 return NULL;
195 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
196}
197
88631706
ML		 198/* Try to find integrated panel data */
199static void
200parse_lfp_panel_data(struct drm_i915_private *dev_priv,
201 struct bdb_header *bdb)
79e53945 202{
99834ea4
CW		 203 const struct bdb_lvds_options *lvds_options;
204 const struct bdb_lvds_lfp_data *lvds_lfp_data;
205 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
206 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 207 const struct lvds_fp_timing *fp_timing;
79e53945 208 struct drm_display_mode *panel_fixed_mode;
99834ea4 209 int i, downclock;
79e53945 210
79e53945
JB		 211 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
212 if (!lvds_options)
213 return;
214
41aa3448 215 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
79e53945
JB		 216 if (lvds_options->panel_type == 0xff)
217 return;
6a04002b 218
500a8cc4 219 panel_type = lvds_options->panel_type;
79e53945
JB		 220
221 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
222 if (!lvds_lfp_data)
223 return;
224
1b16de0b
JB		 225 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
226 if (!lvds_lfp_data_ptrs)
227 return;
228
41aa3448 229 dev_priv->vbt.lvds_vbt = 1;
79e53945 230
99834ea4
CW		 231 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
232 lvds_lfp_data_ptrs,
233 lvds_options->panel_type);
79e53945 234
9a298b2a 235 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW		 236 if (!panel_fixed_mode)
237 return;
79e53945 238
99834ea4 239 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 240
41aa3448 241 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 242
28c97730 243 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 244 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 245
d1fcea6a 246 /*
99834ea4
CW		 247 * Iterate over the LVDS panel timing info to find the lowest clock
248 * for the native resolution.
d1fcea6a 249 */
99834ea4 250 downclock = panel_dvo_timing->clock;
d1fcea6a 251 for (i = 0; i < 16; i++) {
99834ea4
CW		 252 const struct lvds_dvo_timing *dvo_timing;
253
254 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
255 lvds_lfp_data_ptrs,
256 i);
257 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
258 dvo_timing->clock < downclock)
259 downclock = dvo_timing->clock;
d1fcea6a 260 }
99834ea4 261
d330a953 262 if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
d1fcea6a 263 dev_priv->lvds_downclock_avail = 1;
99834ea4 264 dev_priv->lvds_downclock = downclock * 10;
bbb0aef5
JP		 265 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
266 "Normal Clock %dKHz, downclock %dKHz\n",
99834ea4 267 panel_fixed_mode->clock, 10*downclock);
d1fcea6a 268 }
b0354385
TI		 269
270 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
271 lvds_lfp_data_ptrs,
272 lvds_options->panel_type);
273 if (fp_timing) {
274 /* check the resolution, just to be sure */
275 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
276 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 277 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 278 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 279 dev_priv->vbt.bios_lvds_val);
b0354385
TI		 280 }
281 }
88631706
ML		 282}
283
f00076d2
JN		 284static void
285parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
286{
287 const struct bdb_lfp_backlight_data *backlight_data;
288 const struct bdb_lfp_backlight_data_entry *entry;
289
290 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
291 if (!backlight_data)
292 return;
293
294 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
295 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
296 backlight_data->entry_size);
297 return;
298 }
299
300 entry = &backlight_data->data[panel_type];
301
302 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
303 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
304 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
305 "active %s, min brightness %u, level %u\n",
306 dev_priv->vbt.backlight.pwm_freq_hz,
307 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
308 entry->min_brightness,
309 backlight_data->level[panel_type]);
310}
311
88631706
ML		 312/* Try to find sdvo panel data */
313static void
314parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
315 struct bdb_header *bdb)
316{
88631706
ML		 317 struct lvds_dvo_timing *dvo_timing;
318 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 319 int index;
79e53945 320
d330a953 321 index = i915.vbt_sdvo_panel_type;
c10e408a
MF		 322 if (index == -2) {
323 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
324 return;
325 }
326
5a1e5b6c
CW		 327 if (index == -1) {
328 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
329
330 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
331 if (!sdvo_lvds_options)
332 return;
333
334 index = sdvo_lvds_options->panel_type;
335 }
88631706
ML		 336
337 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
338 if (!dvo_timing)
339 return;
340
9a298b2a 341 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML		 342 if (!panel_fixed_mode)
343 return;
344
5a1e5b6c 345 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 346
41aa3448 347 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 348
5a1e5b6c
CW		 349 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
350 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB		 351}
352
9a4114ff
BF		 353static int intel_bios_ssc_frequency(struct drm_device *dev,
354 bool alternate)
355{
356 switch (INTEL_INFO(dev)->gen) {
357 case 2:
e91e941b 358 return alternate ? 66667 : 48000;
9a4114ff
BF		 359 case 3:
360 case 4:
e91e941b 361 return alternate ? 100000 : 96000;
9a4114ff 362 default:
e91e941b 363 return alternate ? 100000 : 120000;
9a4114ff
BF		 364 }
365}
366
79e53945
JB		 367static void
368parse_general_features(struct drm_i915_private *dev_priv,
369 struct bdb_header *bdb)
370{
bad720ff 371 struct drm_device *dev = dev_priv->dev;
79e53945
JB		 372 struct bdb_general_features *general;
373
79e53945
JB		 374 general = find_section(bdb, BDB_GENERAL_FEATURES);
375 if (general) {
41aa3448
RV		 376 dev_priv->vbt.int_tv_support = general->int_tv_support;
377 dev_priv->vbt.int_crt_support = general->int_crt_support;
378 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
379 dev_priv->vbt.lvds_ssc_freq =
9a4114ff 380 intel_bios_ssc_frequency(dev, general->ssc_freq);
41aa3448
RV		 381 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
382 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
3f704fa2 383 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
41aa3448
RV		 384 dev_priv->vbt.int_tv_support,
385 dev_priv->vbt.int_crt_support,
386 dev_priv->vbt.lvds_use_ssc,
387 dev_priv->vbt.lvds_ssc_freq,
388 dev_priv->vbt.display_clock_mode,
389 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB		 390 }
391}
392
db545019
DMEA		 393static void
394parse_general_definitions(struct drm_i915_private *dev_priv,
395 struct bdb_header *bdb)
396{
397 struct bdb_general_definitions *general;
db545019 398
db545019
DMEA		 399 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
400 if (general) {
401 u16 block_size = get_blocksize(general);
402 if (block_size >= sizeof(*general)) {
403 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 404 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
3bd7d909 405 if (intel_gmbus_is_port_valid(bus_pin))
41aa3448 406 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 407 } else {
28c97730 408 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 409 block_size);
db545019
DMEA		 410 }
411 }
412}
413
9b9d172d 414static void
415parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
44834a67 416 struct bdb_header *bdb)
9b9d172d 417{
418 struct sdvo_device_mapping *p_mapping;
419 struct bdb_general_definitions *p_defs;
768f69c9 420 union child_device_config *p_child;
9b9d172d 421 int i, child_device_num, count;
db545019 422 u16 block_size;
9b9d172d 423
424 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
425 if (!p_defs) {
44834a67 426 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 427 return;
428 }
429 /* judge whether the size of child device meets the requirements.
430 * If the child device size obtained from general definition block
431 * is different with sizeof(struct child_device_config), skip the
432 * parsing of sdvo device info
433 */
434 if (p_defs->child_dev_size != sizeof(*p_child)) {
435 /* different child dev size . Ignore it */
28c97730 436 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
9b9d172d 437 return;
438 }
439 /* get the block size of general definitions */
db545019 440 block_size = get_blocksize(p_defs);
9b9d172d 441 /* get the number of child device */
442 child_device_num = (block_size - sizeof(*p_defs)) /
443 sizeof(*p_child);
444 count = 0;
445 for (i = 0; i < child_device_num; i++) {
446 p_child = &(p_defs->devices[i]);
768f69c9 447 if (!p_child->old.device_type) {
9b9d172d 448 /* skip the device block if device type is invalid */
449 continue;
450 }
768f69c9
PZ		 451 if (p_child->old.slave_addr != SLAVE_ADDR1 &&
452 p_child->old.slave_addr != SLAVE_ADDR2) {
9b9d172d 453 /*
454 * If the slave address is neither 0x70 nor 0x72,
455 * it is not a SDVO device. Skip it.
456 */
457 continue;
458 }
768f69c9
PZ		 459 if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
460 p_child->old.dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 461 /* skip the incorrect SDVO port */
0206e353 462 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 463 continue;
464 }
28c97730
ZY		 465 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
466 " %s port\n",
768f69c9
PZ		 467 p_child->old.slave_addr,
468 (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
9b9d172d 469 "SDVOB" : "SDVOC");
768f69c9 470 p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
9b9d172d 471 if (!p_mapping->initialized) {
768f69c9
PZ		 472 p_mapping->dvo_port = p_child->old.dvo_port;
473 p_mapping->slave_addr = p_child->old.slave_addr;
474 p_mapping->dvo_wiring = p_child->old.dvo_wiring;
475 p_mapping->ddc_pin = p_child->old.ddc_pin;
476 p_mapping->i2c_pin = p_child->old.i2c_pin;
9b9d172d 477 p_mapping->initialized = 1;
46eb3036 478 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW		 479 p_mapping->dvo_port,
480 p_mapping->slave_addr,
481 p_mapping->dvo_wiring,
482 p_mapping->ddc_pin,
46eb3036 483 p_mapping->i2c_pin);
9b9d172d 484 } else {
28c97730 485 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 486 "two SDVO device.\n");
487 }
768f69c9 488 if (p_child->old.slave2_addr) {
9b9d172d 489 /* Maybe this is a SDVO device with multiple inputs */
490 /* And the mapping info is not added */
28c97730
ZY		 491 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
492 " is a SDVO device with multiple inputs.\n");
9b9d172d 493 }
494 count++;
495 }
496
497 if (!count) {
498 /* No SDVO device info is found */
28c97730 499 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 500 }
501 return;
502}
32f9d658
ZW		 503
504static void
505parse_driver_features(struct drm_i915_private *dev_priv,
506 struct bdb_header *bdb)
507{
32f9d658
ZW		 508 struct bdb_driver_features *driver;
509
32f9d658 510 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB		 511 if (!driver)
512 return;
513
6fca55b1 514 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
41aa3448 515 dev_priv->vbt.edp_support = 1;
652c393a 516
5ceb0f9b 517 if (driver->dual_frequency)
652c393a 518 dev_priv->render_reclock_avail = true;
32f9d658
ZW		 519}
520
500a8cc4
ZW		 521static void
522parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
523{
524 struct bdb_edp *edp;
9f0e7ff4
JB		 525 struct edp_power_seq *edp_pps;
526 struct edp_link_params *edp_link_params;
500a8cc4
ZW		 527
528 edp = find_section(bdb, BDB_EDP);
529 if (!edp) {
6fca55b1 530 if (dev_priv->vbt.edp_support)
9a30a61f 531 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW		 532 return;
533 }
534
535 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
536 case EDP_18BPP:
41aa3448 537 dev_priv->vbt.edp_bpp = 18;
500a8cc4
ZW		 538 break;
539 case EDP_24BPP:
41aa3448 540 dev_priv->vbt.edp_bpp = 24;
500a8cc4
ZW		 541 break;
542 case EDP_30BPP:
41aa3448 543 dev_priv->vbt.edp_bpp = 30;
500a8cc4
ZW		 544 break;
545 }
5ceb0f9b 546
9f0e7ff4
JB		 547 /* Get the eDP sequencing and link info */
548 edp_pps = &edp->power_seqs[panel_type];
549 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 550
41aa3448 551 dev_priv->vbt.edp_pps = *edp_pps;
5ceb0f9b 552
41aa3448 553 dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
9f0e7ff4
JB		 554 DP_LINK_BW_1_62;
555 switch (edp_link_params->lanes) {
556 case 0:
41aa3448 557 dev_priv->vbt.edp_lanes = 1;
9f0e7ff4
JB		 558 break;
559 case 1:
41aa3448 560 dev_priv->vbt.edp_lanes = 2;
9f0e7ff4
JB		 561 break;
562 case 3:
563 default:
41aa3448 564 dev_priv->vbt.edp_lanes = 4;
9f0e7ff4
JB		 565 break;
566 }
567 switch (edp_link_params->preemphasis) {
568 case 0:
41aa3448 569 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
9f0e7ff4
JB		 570 break;
571 case 1:
41aa3448 572 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
9f0e7ff4
JB		 573 break;
574 case 2:
41aa3448 575 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
9f0e7ff4
JB		 576 break;
577 case 3:
41aa3448 578 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
9f0e7ff4
JB		 579 break;
580 }
581 switch (edp_link_params->vswing) {
582 case 0:
41aa3448 583 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
9f0e7ff4
JB		 584 break;
585 case 1:
41aa3448 586 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
9f0e7ff4
JB		 587 break;
588 case 2:
41aa3448 589 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
9f0e7ff4
JB		 590 break;
591 case 3:
41aa3448 592 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
9f0e7ff4
JB		 593 break;
594 }
500a8cc4
ZW		 595}
596
d17c5443
SK		 597static void
598parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
599{
600 struct bdb_mipi *mipi;
601
ea9a6baf 602 mipi = find_section(bdb, BDB_MIPI_CONFIG);
d17c5443
SK		 603 if (!mipi) {
604 DRM_DEBUG_KMS("No MIPI BDB found");
605 return;
606 }
607
608 /* XXX: add more info */
ea9a6baf 609 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
d17c5443
SK		 610}
611
6acab15a
PZ		 612static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
613 struct bdb_header *bdb)
614{
615 union child_device_config *it, *child = NULL;
616 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
617 uint8_t hdmi_level_shift;
618 int i, j;
554d6af5 619 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
6bf19e7c 620 uint8_t aux_channel;
6acab15a
PZ		 621 /* Each DDI port can have more than one value on the "DVO Port" field,
622 * so look for all the possible values for each port and abort if more
623 * than one is found. */
624 int dvo_ports[][2] = {
625 {DVO_PORT_HDMIA, DVO_PORT_DPA},
626 {DVO_PORT_HDMIB, DVO_PORT_DPB},
627 {DVO_PORT_HDMIC, DVO_PORT_DPC},
628 {DVO_PORT_HDMID, DVO_PORT_DPD},
629 {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
630 };
631
632 /* Find the child device to use, abort if more than one found. */
633 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
634 it = dev_priv->vbt.child_dev + i;
635
636 for (j = 0; j < 2; j++) {
637 if (dvo_ports[port][j] == -1)
638 break;
639
640 if (it->common.dvo_port == dvo_ports[port][j]) {
641 if (child) {
642 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
643 port_name(port));
644 return;
645 }
646 child = it;
647 }
648 }
649 }
650 if (!child)
651 return;
652
6bf19e7c
PZ		 653 aux_channel = child->raw[25];
654
78eb06c3
VS		 655 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
656 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
657 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
658 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
659 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 660
311a2094
PZ		 661 info->supports_dvi = is_dvi;
662 info->supports_hdmi = is_hdmi;
663 info->supports_dp = is_dp;
664
554d6af5
PZ		 665 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
666 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
667
668 if (is_edp && is_dvi)
669 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
670 port_name(port));
671 if (is_crt && port != PORT_E)
672 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
673 if (is_crt && (is_dvi || is_dp))
674 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
675 port_name(port));
676 if (is_dvi && (port == PORT_A || port == PORT_E))
677 DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port));
678 if (!is_dvi && !is_dp && !is_crt)
679 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
680 port_name(port));
681 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
682 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ		 683
684 if (is_dvi) {
685 if (child->common.ddc_pin == 0x05 && port != PORT_B)
686 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
687 if (child->common.ddc_pin == 0x04 && port != PORT_C)
688 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
689 if (child->common.ddc_pin == 0x06 && port != PORT_D)
690 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
691 }
692
693 if (is_dp) {
694 if (aux_channel == 0x40 && port != PORT_A)
695 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
696 if (aux_channel == 0x10 && port != PORT_B)
697 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
698 if (aux_channel == 0x20 && port != PORT_C)
699 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
700 if (aux_channel == 0x30 && port != PORT_D)
701 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
702 }
703
6acab15a
PZ		 704 if (bdb->version >= 158) {
705 /* The VBT HDMI level shift values match the table we have. */
706 hdmi_level_shift = child->raw[7] & 0xF;
707 if (hdmi_level_shift < 0xC) {
708 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
709 port_name(port),
710 hdmi_level_shift);
711 info->hdmi_level_shift = hdmi_level_shift;
712 }
713 }
714}
715
716static void parse_ddi_ports(struct drm_i915_private *dev_priv,
717 struct bdb_header *bdb)
718{
719 struct drm_device *dev = dev_priv->dev;
720 enum port port;
721
722 if (!HAS_DDI(dev))
723 return;
724
725 if (!dev_priv->vbt.child_dev_num)
726 return;
727
728 if (bdb->version < 155)
729 return;
730
731 for (port = PORT_A; port < I915_MAX_PORTS; port++)
732 parse_ddi_port(dev_priv, port, bdb);
733}
734
6363ee6f
ZY		 735static void
736parse_device_mapping(struct drm_i915_private *dev_priv,
737 struct bdb_header *bdb)
738{
739 struct bdb_general_definitions *p_defs;
768f69c9 740 union child_device_config *p_child, *child_dev_ptr;
6363ee6f
ZY		 741 int i, child_device_num, count;
742 u16 block_size;
743
744 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
745 if (!p_defs) {
44834a67 746 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY		 747 return;
748 }
749 /* judge whether the size of child device meets the requirements.
750 * If the child device size obtained from general definition block
751 * is different with sizeof(struct child_device_config), skip the
752 * parsing of sdvo device info
753 */
754 if (p_defs->child_dev_size != sizeof(*p_child)) {
755 /* different child dev size . Ignore it */
756 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
757 return;
758 }
759 /* get the block size of general definitions */
760 block_size = get_blocksize(p_defs);
761 /* get the number of child device */
762 child_device_num = (block_size - sizeof(*p_defs)) /
763 sizeof(*p_child);
764 count = 0;
765 /* get the number of child device that is present */
766 for (i = 0; i < child_device_num; i++) {
767 p_child = &(p_defs->devices[i]);
768f69c9 768 if (!p_child->common.device_type) {
6363ee6f
ZY		 769 /* skip the device block if device type is invalid */
770 continue;
771 }
772 count++;
773 }
774 if (!count) {
0206e353 775 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY		 776 return;
777 }
41aa3448
RV		 778 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
779 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY		 780 DRM_DEBUG_KMS("No memory space for child device\n");
781 return;
782 }
783
41aa3448 784 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY		 785 count = 0;
786 for (i = 0; i < child_device_num; i++) {
787 p_child = &(p_defs->devices[i]);
768f69c9 788 if (!p_child->common.device_type) {
6363ee6f
ZY		 789 /* skip the device block if device type is invalid */
790 continue;
791 }
41aa3448 792 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f
ZY		 793 count++;
794 memcpy((void *)child_dev_ptr, (void *)p_child,
795 sizeof(*p_child));
796 }
797 return;
798}
44834a67 799
6a04002b
SQ		 800static void
801init_vbt_defaults(struct drm_i915_private *dev_priv)
802{
9a4114ff 803 struct drm_device *dev = dev_priv->dev;
6acab15a 804 enum port port;
9a4114ff 805
41aa3448 806 dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
6a04002b
SQ		 807
808 /* LFP panel data */
41aa3448
RV		 809 dev_priv->vbt.lvds_dither = 1;
810 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ		 811
812 /* SDVO panel data */
41aa3448 813 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ		 814
815 /* general features */
41aa3448
RV		 816 dev_priv->vbt.int_tv_support = 1;
817 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF		 818
819 /* Default to using SSC */
41aa3448 820 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL		 821 /*
822 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
823 * clock for LVDS.
824 */
825 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
826 !HAS_PCH_SPLIT(dev));
e91e941b 827 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ		 828
829 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ		 830 struct ddi_vbt_port_info *info =
831 &dev_priv->vbt.ddi_port_info[port];
832
6acab15a 833 /* Recommended BSpec default: 800mV 0dB. */
311a2094
PZ		 834 info->hdmi_level_shift = 6;
835
836 info->supports_dvi = (port != PORT_A && port != PORT_E);
837 info->supports_hdmi = info->supports_dvi;
838 info->supports_dp = (port != PORT_E);
6acab15a 839 }
6a04002b
SQ		 840}
841
25e341cf
DV		 842static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
843{
844 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
845 "VBIOS ROM for %s\n",
846 id->ident);
847 return 1;
848}
849
850static const struct dmi_system_id intel_no_opregion_vbt[] = {
851 {
852 .callback = intel_no_opregion_vbt_callback,
853 .ident = "ThinkCentre A57",
854 .matches = {
855 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
856 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
857 },
858 },
859 { }
860};
861
79e53945 862/**
6d139a87 863 * intel_parse_bios - find VBT and initialize settings from the BIOS
79e53945
JB		 864 * @dev: DRM device
865 *
866 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
867 * to appropriate values.
868 *
79e53945
JB		 869 * Returns 0 on success, nonzero on failure.
870 */
0317c6ce 871int
6d139a87 872intel_parse_bios(struct drm_device *dev)
79e53945
JB		 873{
874 struct drm_i915_private *dev_priv = dev->dev_private;
875 struct pci_dev *pdev = dev->pdev;
44834a67
CW		 876 struct bdb_header *bdb = NULL;
877 u8 __iomem *bios = NULL;
878
ab5c608b
BW		 879 if (HAS_PCH_NOP(dev))
880 return -ENODEV;
881
6a04002b 882 init_vbt_defaults(dev_priv);
f899fc64 883
44834a67 884 /* XXX Should this validation be moved to intel_opregion.c? */
25e341cf 885 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) {
44834a67
CW		 886 struct vbt_header *vbt = dev_priv->opregion.vbt;
887 if (memcmp(vbt->signature, "$VBT", 4) == 0) {
562396b9 888 DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
44834a67
CW		 889 vbt->signature);
890 bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
891 } else
892 dev_priv->opregion.vbt = NULL;
79e53945
JB		 893 }
894
44834a67
CW		 895 if (bdb == NULL) {
896 struct vbt_header *vbt = NULL;
897 size_t size;
898 int i;
79e53945 899
44834a67
CW		 900 bios = pci_map_rom(pdev, &size);
901 if (!bios)
902 return -1;
903
904 /* Scour memory looking for the VBT signature */
905 for (i = 0; i + 4 < size; i++) {
906 if (!memcmp(bios + i, "$VBT", 4)) {
907 vbt = (struct vbt_header *)(bios + i);
908 break;
909 }
910 }
911
912 if (!vbt) {
bd45545f 913 DRM_DEBUG_DRIVER("VBT signature missing\n");
44834a67
CW		 914 pci_unmap_rom(pdev, bios);
915 return -1;
916 }
917
918 bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
919 }
79e53945
JB		 920
921 /* Grab useful general definitions */
922 parse_general_features(dev_priv, bdb);
db545019 923 parse_general_definitions(dev_priv, bdb);
88631706 924 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 925 parse_lfp_backlight(dev_priv, bdb);
88631706 926 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 927 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 928 parse_device_mapping(dev_priv, bdb);
32f9d658 929 parse_driver_features(dev_priv, bdb);
500a8cc4 930 parse_edp(dev_priv, bdb);
d17c5443 931 parse_mipi(dev_priv, bdb);
6acab15a 932 parse_ddi_ports(dev_priv, bdb);
32f9d658 933
44834a67
CW		 934 if (bios)
935 pci_unmap_rom(pdev, bios);
79e53945
JB		 936
937 return 0;
938}
6d139a87
BF		 939
940/* Ensure that vital registers have been initialised, even if the BIOS
941 * is absent or just failing to do its job.
942 */
943void intel_setup_bios(struct drm_device *dev)
944{
945 struct drm_i915_private *dev_priv = dev->dev_private;
946
947 /* Set the Panel Power On/Off timings if uninitialized. */
42d42e7e
DL		 948 if (!HAS_PCH_SPLIT(dev) &&
949 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
6d139a87
BF		 950 /* Set T2 to 40ms and T5 to 200ms */
951 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
952
953 /* Set T3 to 35ms and Tx to 200ms */
954 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
955 }
956}
Linux kernel - Deliverables
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