Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
9bc35499
AJ
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
df457245
VS
142 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
143 dvo_timing->himage_lo;
144 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
145 dvo_timing->vimage_lo;
146
88631706
ML
147 /* Some VBTs have bogus h/vtotal values */
148 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
149 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
150 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
151 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
152
153 drm_mode_set_name(panel_fixed_mode);
154}
155
99834ea4
CW
156static const struct lvds_dvo_timing *
157get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
158 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
159 int index)
160{
161 /*
162 * the size of fp_timing varies on the different platform.
163 * So calculate the DVO timing relative offset in LVDS data
164 * entry to get the DVO timing entry
165 */
166
167 int lfp_data_size =
168 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
169 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
170 int dvo_timing_offset =
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
172 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
173 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
174
175 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
176}
177
b0354385
TI
178/* get lvds_fp_timing entry
179 * this function may return NULL if the corresponding entry is invalid
180 */
181static const struct lvds_fp_timing *
182get_lvds_fp_timing(const struct bdb_header *bdb,
183 const struct bdb_lvds_lfp_data *data,
184 const struct bdb_lvds_lfp_data_ptrs *ptrs,
185 int index)
186{
187 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
188 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
189 size_t ofs;
190
191 if (index >= ARRAY_SIZE(ptrs->ptr))
192 return NULL;
193 ofs = ptrs->ptr[index].fp_timing_offset;
194 if (ofs < data_ofs ||
195 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
196 return NULL;
197 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
198}
199
88631706
ML
200/* Try to find integrated panel data */
201static void
202parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 203 const struct bdb_header *bdb)
79e53945 204{
99834ea4
CW
205 const struct bdb_lvds_options *lvds_options;
206 const struct bdb_lvds_lfp_data *lvds_lfp_data;
207 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
208 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 209 const struct lvds_fp_timing *fp_timing;
79e53945 210 struct drm_display_mode *panel_fixed_mode;
3e845c7a 211 int panel_type;
c329a4ec 212 int drrs_mode;
a0562819 213 int ret;
79e53945 214
79e53945
JB
215 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
216 if (!lvds_options)
217 return;
218
41aa3448 219 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819 220
6f9f4b7a 221 ret = intel_opregion_get_panel_type(dev_priv);
a0562819
VS
222 if (ret >= 0) {
223 WARN_ON(ret > 0xf);
224 panel_type = ret;
225 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
226 } else {
227 if (lvds_options->panel_type > 0xf) {
228 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
229 lvds_options->panel_type);
230 return;
231 }
232 panel_type = lvds_options->panel_type;
233 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 234 }
6a04002b 235
3e845c7a 236 dev_priv->vbt.panel_type = panel_type;
79e53945 237
83a7280e
PB
238 drrs_mode = (lvds_options->dps_panel_type_bits
239 >> (panel_type * 2)) & MODE_MASK;
240 /*
241 * VBT has static DRRS = 0 and seamless DRRS = 2.
242 * The below piece of code is required to adjust vbt.drrs_type
243 * to match the enum drrs_support_type.
244 */
245 switch (drrs_mode) {
246 case 0:
247 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
248 DRM_DEBUG_KMS("DRRS supported mode is static\n");
249 break;
250 case 2:
251 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
252 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
253 break;
254 default:
255 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
256 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
257 break;
258 }
259
79e53945
JB
260 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
261 if (!lvds_lfp_data)
262 return;
263
1b16de0b
JB
264 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
265 if (!lvds_lfp_data_ptrs)
266 return;
267
41aa3448 268 dev_priv->vbt.lvds_vbt = 1;
79e53945 269
99834ea4
CW
270 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
271 lvds_lfp_data_ptrs,
3e845c7a 272 panel_type);
79e53945 273
9a298b2a 274 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
275 if (!panel_fixed_mode)
276 return;
79e53945 277
99834ea4 278 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 279
41aa3448 280 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 281
28c97730 282 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 283 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 284
b0354385
TI
285 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
286 lvds_lfp_data_ptrs,
3e845c7a 287 panel_type);
b0354385
TI
288 if (fp_timing) {
289 /* check the resolution, just to be sure */
290 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
291 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 292 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 293 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 294 dev_priv->vbt.bios_lvds_val);
b0354385
TI
295 }
296 }
88631706
ML
297}
298
f00076d2 299static void
dcb58a40
JN
300parse_lfp_backlight(struct drm_i915_private *dev_priv,
301 const struct bdb_header *bdb)
f00076d2
JN
302{
303 const struct bdb_lfp_backlight_data *backlight_data;
304 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 305 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
306
307 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
308 if (!backlight_data)
309 return;
310
311 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
312 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
313 backlight_data->entry_size);
314 return;
315 }
316
317 entry = &backlight_data->data[panel_type];
318
39fbc9c8
JN
319 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
320 if (!dev_priv->vbt.backlight.present) {
321 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
322 entry->type);
323 return;
324 }
325
9a41e17d
D
326 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
327 if (bdb->version >= 191 &&
328 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
329 const struct bdb_lfp_backlight_control_method *method;
330
331 method = &backlight_data->backlight_control[panel_type];
332 dev_priv->vbt.backlight.type = method->type;
333 }
334
f00076d2
JN
335 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
336 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 337 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2
JN
338 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
339 "active %s, min brightness %u, level %u\n",
340 dev_priv->vbt.backlight.pwm_freq_hz,
341 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 342 dev_priv->vbt.backlight.min_brightness,
f00076d2
JN
343 backlight_data->level[panel_type]);
344}
345
88631706
ML
346/* Try to find sdvo panel data */
347static void
348parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 349 const struct bdb_header *bdb)
88631706 350{
e8ef3b4c 351 const struct lvds_dvo_timing *dvo_timing;
88631706 352 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 353 int index;
79e53945 354
d330a953 355 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
356 if (index == -2) {
357 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
358 return;
359 }
360
5a1e5b6c 361 if (index == -1) {
e8ef3b4c 362 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
363
364 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
365 if (!sdvo_lvds_options)
366 return;
367
368 index = sdvo_lvds_options->panel_type;
369 }
88631706
ML
370
371 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
372 if (!dvo_timing)
373 return;
374
9a298b2a 375 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
376 if (!panel_fixed_mode)
377 return;
378
5a1e5b6c 379 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 380
41aa3448 381 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 382
5a1e5b6c
CW
383 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
384 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
385}
386
98f3a1dc 387static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
388 bool alternate)
389{
98f3a1dc 390 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 391 case 2:
e91e941b 392 return alternate ? 66667 : 48000;
9a4114ff
BF
393 case 3:
394 case 4:
e91e941b 395 return alternate ? 100000 : 96000;
9a4114ff 396 default:
e91e941b 397 return alternate ? 100000 : 120000;
9a4114ff
BF
398 }
399}
400
79e53945
JB
401static void
402parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 403 const struct bdb_header *bdb)
79e53945 404{
e8ef3b4c 405 const struct bdb_general_features *general;
79e53945 406
79e53945 407 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
408 if (!general)
409 return;
410
411 dev_priv->vbt.int_tv_support = general->int_tv_support;
412 /* int_crt_support can't be trusted on earlier platforms */
413 if (bdb->version >= 155 &&
414 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
415 dev_priv->vbt.int_crt_support = general->int_crt_support;
416 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
417 dev_priv->vbt.lvds_ssc_freq =
418 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
419 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
420 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
421 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
422 dev_priv->vbt.int_tv_support,
423 dev_priv->vbt.int_crt_support,
424 dev_priv->vbt.lvds_use_ssc,
425 dev_priv->vbt.lvds_ssc_freq,
426 dev_priv->vbt.display_clock_mode,
427 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
428}
429
db545019
DMEA
430static void
431parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 432 const struct bdb_header *bdb)
db545019 433{
e8ef3b4c 434 const struct bdb_general_definitions *general;
db545019 435
db545019
DMEA
436 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
437 if (general) {
438 u16 block_size = get_blocksize(general);
439 if (block_size >= sizeof(*general)) {
440 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 441 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 442 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 443 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 444 } else {
28c97730 445 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 446 block_size);
db545019
DMEA
447 }
448 }
449}
450
e8ef3b4c
JN
451static const union child_device_config *
452child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 453{
e8ef3b4c 454 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
455}
456
9b9d172d 457static void
458parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 459 const struct bdb_header *bdb)
9b9d172d 460{
461 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 462 const struct bdb_general_definitions *p_defs;
6cc38aca 463 const struct old_child_dev_config *child; /* legacy */
9b9d172d 464 int i, child_device_num, count;
db545019 465 u16 block_size;
9b9d172d 466
467 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
468 if (!p_defs) {
44834a67 469 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 470 return;
471 }
6cc38aca
JN
472
473 /*
474 * Only parse SDVO mappings when the general definitions block child
475 * device size matches that of the *legacy* child device config
476 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 477 */
6cc38aca
JN
478 if (p_defs->child_dev_size != sizeof(*child)) {
479 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 480 return;
481 }
482 /* get the block size of general definitions */
db545019 483 block_size = get_blocksize(p_defs);
9b9d172d 484 /* get the number of child device */
485 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 486 p_defs->child_dev_size;
9b9d172d 487 count = 0;
488 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
489 child = &child_device_ptr(p_defs, i)->old;
490 if (!child->device_type) {
9b9d172d 491 /* skip the device block if device type is invalid */
492 continue;
493 }
6cc38aca
JN
494 if (child->slave_addr != SLAVE_ADDR1 &&
495 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 496 /*
497 * If the slave address is neither 0x70 nor 0x72,
498 * it is not a SDVO device. Skip it.
499 */
500 continue;
501 }
6cc38aca
JN
502 if (child->dvo_port != DEVICE_PORT_DVOB &&
503 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 504 /* skip the incorrect SDVO port */
0206e353 505 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 506 continue;
507 }
28c97730 508 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
509 " %s port\n",
510 child->slave_addr,
511 (child->dvo_port == DEVICE_PORT_DVOB) ?
512 "SDVOB" : "SDVOC");
9d6c875d 513 p_mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
9b9d172d 514 if (!p_mapping->initialized) {
6cc38aca
JN
515 p_mapping->dvo_port = child->dvo_port;
516 p_mapping->slave_addr = child->slave_addr;
517 p_mapping->dvo_wiring = child->dvo_wiring;
518 p_mapping->ddc_pin = child->ddc_pin;
519 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 520 p_mapping->initialized = 1;
46eb3036 521 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
522 p_mapping->dvo_port,
523 p_mapping->slave_addr,
524 p_mapping->dvo_wiring,
525 p_mapping->ddc_pin,
46eb3036 526 p_mapping->i2c_pin);
9b9d172d 527 } else {
28c97730 528 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 529 "two SDVO device.\n");
530 }
6cc38aca 531 if (child->slave2_addr) {
9b9d172d 532 /* Maybe this is a SDVO device with multiple inputs */
533 /* And the mapping info is not added */
28c97730
ZY
534 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
535 " is a SDVO device with multiple inputs.\n");
9b9d172d 536 }
537 count++;
538 }
539
540 if (!count) {
541 /* No SDVO device info is found */
28c97730 542 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 543 }
544 return;
545}
32f9d658
ZW
546
547static void
548parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 549 const struct bdb_header *bdb)
32f9d658 550{
e8ef3b4c 551 const struct bdb_driver_features *driver;
32f9d658 552
32f9d658 553 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
554 if (!driver)
555 return;
556
6fca55b1 557 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 558 dev_priv->vbt.edp.support = 1;
652c393a 559
83a7280e
PB
560 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
561 /*
562 * If DRRS is not supported, drrs_type has to be set to 0.
563 * This is because, VBT is configured in such a way that
564 * static DRRS is 0 and DRRS not supported is represented by
565 * driver->drrs_enabled=false
566 */
567 if (!driver->drrs_enabled)
568 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
569}
570
500a8cc4 571static void
dcb58a40 572parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 573{
e8ef3b4c
JN
574 const struct bdb_edp *edp;
575 const struct edp_power_seq *edp_pps;
576 const struct edp_link_params *edp_link_params;
3e845c7a 577 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
578
579 edp = find_section(bdb, BDB_EDP);
580 if (!edp) {
6aa23e65 581 if (dev_priv->vbt.edp.support)
9a30a61f 582 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
583 return;
584 }
585
586 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
587 case EDP_18BPP:
6aa23e65 588 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
589 break;
590 case EDP_24BPP:
6aa23e65 591 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
592 break;
593 case EDP_30BPP:
6aa23e65 594 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
595 break;
596 }
5ceb0f9b 597
9f0e7ff4
JB
598 /* Get the eDP sequencing and link info */
599 edp_pps = &edp->power_seqs[panel_type];
600 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 601
6aa23e65 602 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 603
e13e2b2c
JN
604 switch (edp_link_params->rate) {
605 case EDP_RATE_1_62:
6aa23e65 606 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
607 break;
608 case EDP_RATE_2_7:
6aa23e65 609 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
610 break;
611 default:
612 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
613 edp_link_params->rate);
614 break;
615 }
616
9f0e7ff4 617 switch (edp_link_params->lanes) {
e13e2b2c 618 case EDP_LANE_1:
6aa23e65 619 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 620 break;
e13e2b2c 621 case EDP_LANE_2:
6aa23e65 622 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 623 break;
e13e2b2c 624 case EDP_LANE_4:
6aa23e65 625 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 626 break;
e13e2b2c
JN
627 default:
628 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
629 edp_link_params->lanes);
630 break;
9f0e7ff4 631 }
e13e2b2c 632
9f0e7ff4 633 switch (edp_link_params->preemphasis) {
e13e2b2c 634 case EDP_PREEMPHASIS_NONE:
6aa23e65 635 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 636 break;
e13e2b2c 637 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 638 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 639 break;
e13e2b2c 640 case EDP_PREEMPHASIS_6dB:
6aa23e65 641 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 642 break;
e13e2b2c 643 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 644 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 645 break;
e13e2b2c
JN
646 default:
647 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
648 edp_link_params->preemphasis);
649 break;
9f0e7ff4 650 }
e13e2b2c 651
9f0e7ff4 652 switch (edp_link_params->vswing) {
e13e2b2c 653 case EDP_VSWING_0_4V:
6aa23e65 654 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 655 break;
e13e2b2c 656 case EDP_VSWING_0_6V:
6aa23e65 657 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 658 break;
e13e2b2c 659 case EDP_VSWING_0_8V:
6aa23e65 660 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 661 break;
e13e2b2c 662 case EDP_VSWING_1_2V:
6aa23e65 663 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 664 break;
e13e2b2c
JN
665 default:
666 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
667 edp_link_params->vswing);
668 break;
9f0e7ff4 669 }
9a57f5bb
SJ
670
671 if (bdb->version >= 173) {
672 uint8_t vswing;
673
9e458034
SJ
674 /* Don't read from VBT if module parameter has valid value*/
675 if (i915.edp_vswing) {
06411f08 676 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
9e458034
SJ
677 } else {
678 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 679 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 680 }
9a57f5bb 681 }
500a8cc4
ZW
682}
683
bfd7ebda 684static void
dcb58a40 685parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 686{
e8ef3b4c
JN
687 const struct bdb_psr *psr;
688 const struct psr_table *psr_table;
3e845c7a 689 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
690
691 psr = find_section(bdb, BDB_PSR);
692 if (!psr) {
693 DRM_DEBUG_KMS("No PSR BDB found.\n");
694 return;
695 }
696
697 psr_table = &psr->psr_table[panel_type];
698
699 dev_priv->vbt.psr.full_link = psr_table->full_link;
700 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
701
702 /* Allowed VBT values goes from 0 to 15 */
703 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
704 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
705
706 switch (psr_table->lines_to_wait) {
707 case 0:
708 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
709 break;
710 case 1:
711 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
712 break;
713 case 2:
714 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
715 break;
716 case 3:
717 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
718 break;
719 default:
720 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
721 psr_table->lines_to_wait);
722 break;
723 }
724
725 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
726 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
727}
728
d17c5443 729static void
0f8689f5
JN
730parse_mipi_config(struct drm_i915_private *dev_priv,
731 const struct bdb_header *bdb)
d17c5443 732{
e8ef3b4c 733 const struct bdb_mipi_config *start;
e8ef3b4c
JN
734 const struct mipi_config *config;
735 const struct mipi_pps_data *pps;
3e845c7a 736 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 737
3e6bd011 738 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 739 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
740 return;
741
d3b542fc
SK
742 /* Initialize this to undefined indicating no generic MIPI support */
743 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
744
745 /* Block #40 is already parsed and panel_fixed_mode is
746 * stored in dev_priv->lfp_lvds_vbt_mode
747 * resuse this when needed
748 */
d17c5443 749
d3b542fc
SK
750 /* Parse #52 for panel index used from panel_type already
751 * parsed
752 */
753 start = find_section(bdb, BDB_MIPI_CONFIG);
754 if (!start) {
755 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
756 return;
757 }
758
d3b542fc
SK
759 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
760 panel_type);
761
762 /*
763 * get hold of the correct configuration block and pps data as per
764 * the panel_type as index
765 */
766 config = &start->config[panel_type];
767 pps = &start->pps[panel_type];
768
769 /* store as of now full data. Trim when we realise all is not needed */
770 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
771 if (!dev_priv->vbt.dsi.config)
772 return;
773
774 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
775 if (!dev_priv->vbt.dsi.pps) {
776 kfree(dev_priv->vbt.dsi.config);
777 return;
778 }
779
9f7c5b17
D
780 /*
781 * These fields are introduced from the VBT version 197 onwards,
782 * so making sure that these bits are set zero in the previous
783 * versions.
784 */
785 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
786 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
787 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
788 }
789
d3b542fc 790 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 791 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
792}
793
5db72099
JN
794/* Find the sequence block and size for the given panel. */
795static const u8 *
796find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 797 u16 panel_id, u32 *seq_size)
5db72099
JN
798{
799 u32 total = get_blocksize(sequence);
800 const u8 *data = &sequence->data[0];
801 u8 current_id;
2a33d934
JN
802 u32 current_size;
803 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
804 int index = 0;
805 int i;
806
2a33d934
JN
807 /* skip new block size */
808 if (sequence->version >= 3)
809 data += 4;
810
811 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
812 if (index + header_size > total) {
813 DRM_ERROR("Invalid sequence block (header)\n");
814 return NULL;
815 }
816
5db72099 817 current_id = *(data + index);
2a33d934
JN
818 if (sequence->version >= 3)
819 current_size = *((const u32 *)(data + index + 1));
820 else
821 current_size = *((const u16 *)(data + index + 1));
5db72099 822
2a33d934 823 index += header_size;
5db72099
JN
824
825 if (index + current_size > total) {
826 DRM_ERROR("Invalid sequence block\n");
827 return NULL;
828 }
829
830 if (current_id == panel_id) {
831 *seq_size = current_size;
832 return data + index;
833 }
834
835 index += current_size;
836 }
837
838 DRM_ERROR("Sequence block detected but no valid configuration\n");
839
840 return NULL;
841}
842
8d3ed2f3
JN
843static int goto_next_sequence(const u8 *data, int index, int total)
844{
845 u16 len;
846
847 /* Skip Sequence Byte. */
848 for (index = index + 1; index < total; index += len) {
849 u8 operation_byte = *(data + index);
850 index++;
851
852 switch (operation_byte) {
853 case MIPI_SEQ_ELEM_END:
854 return index;
855 case MIPI_SEQ_ELEM_SEND_PKT:
856 if (index + 4 > total)
857 return 0;
858
859 len = *((const u16 *)(data + index + 2)) + 4;
860 break;
861 case MIPI_SEQ_ELEM_DELAY:
862 len = 4;
863 break;
864 case MIPI_SEQ_ELEM_GPIO:
865 len = 2;
866 break;
f4d64936
JN
867 case MIPI_SEQ_ELEM_I2C:
868 if (index + 7 > total)
869 return 0;
870 len = *(data + index + 6) + 7;
871 break;
8d3ed2f3
JN
872 default:
873 DRM_ERROR("Unknown operation byte\n");
874 return 0;
875 }
876 }
877
878 return 0;
879}
880
2a33d934
JN
881static int goto_next_sequence_v3(const u8 *data, int index, int total)
882{
883 int seq_end;
884 u16 len;
6765bd6d 885 u32 size_of_sequence;
2a33d934
JN
886
887 /*
888 * Could skip sequence based on Size of Sequence alone, but also do some
889 * checking on the structure.
890 */
891 if (total < 5) {
892 DRM_ERROR("Too small sequence size\n");
893 return 0;
894 }
895
6765bd6d
JN
896 /* Skip Sequence Byte. */
897 index++;
898
899 /*
900 * Size of Sequence. Excludes the Sequence Byte and the size itself,
901 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
902 * byte.
903 */
904 size_of_sequence = *((const uint32_t *)(data + index));
905 index += 4;
906
907 seq_end = index + size_of_sequence;
2a33d934
JN
908 if (seq_end > total) {
909 DRM_ERROR("Invalid sequence size\n");
910 return 0;
911 }
912
6765bd6d 913 for (; index < total; index += len) {
2a33d934
JN
914 u8 operation_byte = *(data + index);
915 index++;
916
917 if (operation_byte == MIPI_SEQ_ELEM_END) {
918 if (index != seq_end) {
919 DRM_ERROR("Invalid element structure\n");
920 return 0;
921 }
922 return index;
923 }
924
925 len = *(data + index);
926 index++;
927
928 /*
929 * FIXME: Would be nice to check elements like for v1/v2 in
930 * goto_next_sequence() above.
931 */
932 switch (operation_byte) {
933 case MIPI_SEQ_ELEM_SEND_PKT:
934 case MIPI_SEQ_ELEM_DELAY:
935 case MIPI_SEQ_ELEM_GPIO:
936 case MIPI_SEQ_ELEM_I2C:
937 case MIPI_SEQ_ELEM_SPI:
938 case MIPI_SEQ_ELEM_PMIC:
939 break;
940 default:
941 DRM_ERROR("Unknown operation byte %u\n",
942 operation_byte);
943 break;
944 }
945 }
946
947 return 0;
948}
949
0f8689f5
JN
950static void
951parse_mipi_sequence(struct drm_i915_private *dev_priv,
952 const struct bdb_header *bdb)
953{
3e845c7a 954 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
955 const struct bdb_mipi_sequence *sequence;
956 const u8 *seq_data;
2a33d934 957 u32 seq_size;
0f8689f5 958 u8 *data;
8d3ed2f3 959 int index = 0;
0f8689f5
JN
960
961 /* Only our generic panel driver uses the sequence block. */
962 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
963 return;
d3b542fc 964
d3b542fc
SK
965 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
966 if (!sequence) {
967 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
968 return;
969 }
970
cd67d226 971 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
972 if (sequence->version >= 4) {
973 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
974 sequence->version);
cd67d226
JN
975 return;
976 }
977
2a33d934 978 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 979
5db72099
JN
980 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
981 if (!seq_data)
d3b542fc 982 return;
d3b542fc 983
8d3ed2f3
JN
984 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
985 if (!data)
d3b542fc
SK
986 return;
987
8d3ed2f3
JN
988 /* Parse the sequences, store pointers to each sequence. */
989 for (;;) {
990 u8 seq_id = *(data + index);
991 if (seq_id == MIPI_SEQ_END)
992 break;
d3b542fc 993
8d3ed2f3
JN
994 if (seq_id >= MIPI_SEQ_MAX) {
995 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
996 goto err;
997 }
998
8d3ed2f3 999 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 1000
2a33d934
JN
1001 if (sequence->version >= 3)
1002 index = goto_next_sequence_v3(data, index, seq_size);
1003 else
1004 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
1005 if (!index) {
1006 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
1007 goto err;
1008 }
d3b542fc
SK
1009 }
1010
8d3ed2f3
JN
1011 dev_priv->vbt.dsi.data = data;
1012 dev_priv->vbt.dsi.size = seq_size;
1013 dev_priv->vbt.dsi.seq_version = sequence->version;
1014
1015 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 1016 return;
d3b542fc 1017
8d3ed2f3
JN
1018err:
1019 kfree(data);
ed3b6679 1020 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
1021}
1022
75067dde
AK
1023static u8 translate_iboost(u8 val)
1024{
1025 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1026
1027 if (val >= ARRAY_SIZE(mapping)) {
1028 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1029 return 0;
1030 }
1031 return mapping[val];
1032}
1033
6acab15a 1034static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1035 const struct bdb_header *bdb)
6acab15a
PZ
1036{
1037 union child_device_config *it, *child = NULL;
1038 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1039 uint8_t hdmi_level_shift;
1040 int i, j;
554d6af5 1041 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1042 uint8_t aux_channel, ddc_pin;
6acab15a
PZ
1043 /* Each DDI port can have more than one value on the "DVO Port" field,
1044 * so look for all the possible values for each port and abort if more
1045 * than one is found. */
2800e4c2
RV
1046 int dvo_ports[][3] = {
1047 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1048 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1049 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1050 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1051 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1052 };
1053
1054 /* Find the child device to use, abort if more than one found. */
1055 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1056 it = dev_priv->vbt.child_dev + i;
1057
2800e4c2 1058 for (j = 0; j < 3; j++) {
6acab15a
PZ
1059 if (dvo_ports[port][j] == -1)
1060 break;
1061
1062 if (it->common.dvo_port == dvo_ports[port][j]) {
1063 if (child) {
1064 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1065 port_name(port));
1066 return;
1067 }
1068 child = it;
1069 }
1070 }
1071 }
1072 if (!child)
1073 return;
1074
6bf19e7c 1075 aux_channel = child->raw[25];
11c1b657 1076 ddc_pin = child->common.ddc_pin;
6bf19e7c 1077
78eb06c3
VS
1078 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1079 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1080 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1081 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1082 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1083
311a2094
PZ
1084 info->supports_dvi = is_dvi;
1085 info->supports_hdmi = is_hdmi;
1086 info->supports_dp = is_dp;
1087
554d6af5
PZ
1088 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1089 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1090
1091 if (is_edp && is_dvi)
1092 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1093 port_name(port));
1094 if (is_crt && port != PORT_E)
1095 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1096 if (is_crt && (is_dvi || is_dp))
1097 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1098 port_name(port));
1099 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1100 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1101 if (!is_dvi && !is_dp && !is_crt)
1102 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1103 port_name(port));
1104 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1105 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1106
1107 if (is_dvi) {
11c1b657
XZ
1108 if (port == PORT_E) {
1109 info->alternate_ddc_pin = ddc_pin;
1110 /* if DDIE share ddc pin with other port, then
1111 * dvi/hdmi couldn't exist on the shared port.
1112 * Otherwise they share the same ddc bin and system
1113 * couldn't communicate with them seperately. */
1114 if (ddc_pin == DDC_PIN_B) {
1115 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1116 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1117 } else if (ddc_pin == DDC_PIN_C) {
1118 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1119 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1120 } else if (ddc_pin == DDC_PIN_D) {
1121 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1122 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1123 }
1124 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
6bf19e7c 1125 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
11c1b657 1126 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
6bf19e7c 1127 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
11c1b657 1128 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
6bf19e7c
PZ
1129 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1130 }
1131
1132 if (is_dp) {
500ea70d
RV
1133 if (port == PORT_E) {
1134 info->alternate_aux_channel = aux_channel;
1135 /* if DDIE share aux channel with other port, then
1136 * DP couldn't exist on the shared port. Otherwise
1137 * they share the same aux channel and system
1138 * couldn't communicate with them seperately. */
1139 if (aux_channel == DP_AUX_A)
1140 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1141 else if (aux_channel == DP_AUX_B)
1142 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1143 else if (aux_channel == DP_AUX_C)
1144 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1145 else if (aux_channel == DP_AUX_D)
1146 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1147 }
1148 else if (aux_channel == DP_AUX_A && port != PORT_A)
6bf19e7c 1149 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
500ea70d 1150 else if (aux_channel == DP_AUX_B && port != PORT_B)
6bf19e7c 1151 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
500ea70d 1152 else if (aux_channel == DP_AUX_C && port != PORT_C)
6bf19e7c 1153 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
500ea70d 1154 else if (aux_channel == DP_AUX_D && port != PORT_D)
6bf19e7c
PZ
1155 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1156 }
1157
6acab15a
PZ
1158 if (bdb->version >= 158) {
1159 /* The VBT HDMI level shift values match the table we have. */
1160 hdmi_level_shift = child->raw[7] & 0xF;
ce4dd49e
DL
1161 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1162 port_name(port),
1163 hdmi_level_shift);
1164 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1165 }
75067dde
AK
1166
1167 /* Parse the I_boost config for SKL and above */
4e27bd50 1168 if (bdb->version >= 196 && child->common.iboost) {
75067dde
AK
1169 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1170 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1171 port_name(port), info->dp_boost_level);
1172 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1173 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1174 port_name(port), info->hdmi_boost_level);
1175 }
6acab15a
PZ
1176}
1177
1178static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1179 const struct bdb_header *bdb)
6acab15a 1180{
6acab15a
PZ
1181 enum port port;
1182
98f3a1dc 1183 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1184 return;
1185
1186 if (!dev_priv->vbt.child_dev_num)
1187 return;
1188
1189 if (bdb->version < 155)
1190 return;
1191
1192 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1193 parse_ddi_port(dev_priv, port, bdb);
1194}
1195
6363ee6f
ZY
1196static void
1197parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1198 const struct bdb_header *bdb)
6363ee6f 1199{
e8ef3b4c
JN
1200 const struct bdb_general_definitions *p_defs;
1201 const union child_device_config *p_child;
1202 union child_device_config *child_dev_ptr;
6363ee6f 1203 int i, child_device_num, count;
e2d6cf7f
DW
1204 u8 expected_size;
1205 u16 block_size;
6363ee6f
ZY
1206
1207 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1208 if (!p_defs) {
44834a67 1209 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1210 return;
1211 }
7244f309
VS
1212 if (bdb->version < 106) {
1213 expected_size = 22;
fa05178c 1214 } else if (bdb->version < 111) {
52b69c84
VS
1215 expected_size = 27;
1216 } else if (bdb->version < 195) {
1217 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1218 expected_size = sizeof(struct old_child_dev_config);
1219 } else if (bdb->version == 195) {
1220 expected_size = 37;
1221 } else if (bdb->version <= 197) {
1222 expected_size = 38;
1223 } else {
1224 expected_size = 38;
1225 BUILD_BUG_ON(sizeof(*p_child) < 38);
1226 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1227 bdb->version, expected_size);
1228 }
1229
e2d6cf7f
DW
1230 /* Flag an error for unexpected size, but continue anyway. */
1231 if (p_defs->child_dev_size != expected_size)
1232 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1233 p_defs->child_dev_size, expected_size, bdb->version);
1234
52b69c84
VS
1235 /* The legacy sized child device config is the minimum we need. */
1236 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1237 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1238 p_defs->child_dev_size);
1239 return;
1240 }
1241
6363ee6f
ZY
1242 /* get the block size of general definitions */
1243 block_size = get_blocksize(p_defs);
1244 /* get the number of child device */
1245 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1246 p_defs->child_dev_size;
6363ee6f
ZY
1247 count = 0;
1248 /* get the number of child device that is present */
1249 for (i = 0; i < child_device_num; i++) {
90e4f159 1250 p_child = child_device_ptr(p_defs, i);
768f69c9 1251 if (!p_child->common.device_type) {
6363ee6f
ZY
1252 /* skip the device block if device type is invalid */
1253 continue;
1254 }
1255 count++;
1256 }
1257 if (!count) {
0206e353 1258 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1259 return;
1260 }
41aa3448
RV
1261 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1262 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1263 DRM_DEBUG_KMS("No memory space for child device\n");
1264 return;
1265 }
1266
41aa3448 1267 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1268 count = 0;
1269 for (i = 0; i < child_device_num; i++) {
90e4f159 1270 p_child = child_device_ptr(p_defs, i);
768f69c9 1271 if (!p_child->common.device_type) {
6363ee6f
ZY
1272 /* skip the device block if device type is invalid */
1273 continue;
1274 }
3e6bd011 1275
41aa3448 1276 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1277 count++;
e2d6cf7f
DW
1278
1279 /*
1280 * Copy as much as we know (sizeof) and is available
1281 * (child_dev_size) of the child device. Accessing the data must
1282 * depend on VBT version.
1283 */
1284 memcpy(child_dev_ptr, p_child,
1285 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
4e27bd50
SS
1286
1287 /*
1288 * copied full block, now init values when they are not
1289 * available in current version
1290 */
1291 if (bdb->version < 196) {
1292 /* Set default values for bits added from v196 */
1293 child_dev_ptr->common.iboost = 0;
1294 child_dev_ptr->common.hpd_invert = 0;
1295 }
1296
1297 if (bdb->version < 192)
1298 child_dev_ptr->common.lspcon = 0;
6363ee6f
ZY
1299 }
1300 return;
1301}
44834a67 1302
6a04002b
SQ
1303static void
1304init_vbt_defaults(struct drm_i915_private *dev_priv)
1305{
6acab15a 1306 enum port port;
9a4114ff 1307
988c7015 1308 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1309
56c4b63a
JN
1310 /* Default to having backlight */
1311 dev_priv->vbt.backlight.present = true;
1312
6a04002b 1313 /* LFP panel data */
41aa3448
RV
1314 dev_priv->vbt.lvds_dither = 1;
1315 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1316
1317 /* SDVO panel data */
41aa3448 1318 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1319
1320 /* general features */
41aa3448
RV
1321 dev_priv->vbt.int_tv_support = 1;
1322 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1323
1324 /* Default to using SSC */
41aa3448 1325 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1326 /*
1327 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1328 * clock for LVDS.
1329 */
98f3a1dc
JN
1330 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1331 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1332 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1333
1334 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1335 struct ddi_vbt_port_info *info =
1336 &dev_priv->vbt.ddi_port_info[port];
1337
ce4dd49e 1338 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
311a2094
PZ
1339
1340 info->supports_dvi = (port != PORT_A && port != PORT_E);
1341 info->supports_hdmi = info->supports_dvi;
1342 info->supports_dp = (port != PORT_E);
6acab15a 1343 }
6a04002b
SQ
1344}
1345
caf37fa4
JN
1346static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1347{
1348 const void *_vbt = vbt;
1349
1350 return _vbt + vbt->bdb_offset;
1351}
1352
f0067a31
JN
1353/**
1354 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1355 * @buf: pointer to a buffer to validate
1356 * @size: size of the buffer
1357 *
1358 * Returns true on valid VBT.
1359 */
1360bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1361{
f0067a31 1362 const struct vbt_header *vbt = buf;
dcb58a40 1363 const struct bdb_header *bdb;
3dd4e846 1364
caf37fa4 1365 if (!vbt)
f0067a31 1366 return false;
caf37fa4 1367
f0067a31 1368 if (sizeof(struct vbt_header) > size) {
3dd4e846 1369 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1370 return false;
3dd4e846
CW
1371 }
1372
1373 if (memcmp(vbt->signature, "$VBT", 4)) {
1374 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1375 return false;
3dd4e846
CW
1376 }
1377
f0067a31 1378 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
3dd4e846 1379 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1380 return false;
3dd4e846
CW
1381 }
1382
caf37fa4 1383 bdb = get_bdb_header(vbt);
f0067a31 1384 if (vbt->bdb_offset + bdb->bdb_size > size) {
3dd4e846 1385 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1386 return false;
3dd4e846
CW
1387 }
1388
caf37fa4 1389 return vbt;
3dd4e846
CW
1390}
1391
caf37fa4 1392static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1393{
b34a991a
JN
1394 size_t i;
1395
1396 /* Scour memory looking for the VBT signature. */
1397 for (i = 0; i + 4 < size; i++) {
f0067a31 1398 void *vbt;
115719fc 1399
f0067a31
JN
1400 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1401 continue;
1402
1403 /*
1404 * This is the one place where we explicitly discard the address
1405 * space (__iomem) of the BIOS/VBT.
1406 */
1407 vbt = (void __force *) bios + i;
1408 if (intel_bios_is_valid_vbt(vbt, size - i))
1409 return vbt;
1410
1411 break;
b34a991a
JN
1412 }
1413
f0067a31 1414 return NULL;
b34a991a
JN
1415}
1416
79e53945 1417/**
8b8e1a89 1418 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1419 * @dev_priv: i915 device instance
79e53945
JB
1420 *
1421 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1422 * to appropriate values.
1423 *
79e53945
JB
1424 * Returns 0 on success, nonzero on failure.
1425 */
0317c6ce 1426int
98f3a1dc 1427intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1428{
91c8a326 1429 struct pci_dev *pdev = dev_priv->drm.pdev;
f0067a31 1430 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1431 const struct bdb_header *bdb;
44834a67
CW
1432 u8 __iomem *bios = NULL;
1433
98f3a1dc 1434 if (HAS_PCH_NOP(dev_priv))
ab5c608b
BW
1435 return -ENODEV;
1436
6a04002b 1437 init_vbt_defaults(dev_priv);
f899fc64 1438
f0067a31 1439 if (!vbt) {
b34a991a 1440 size_t size;
79e53945 1441
44834a67
CW
1442 bios = pci_map_rom(pdev, &size);
1443 if (!bios)
1444 return -1;
1445
caf37fa4
JN
1446 vbt = find_vbt(bios, size);
1447 if (!vbt) {
44834a67
CW
1448 pci_unmap_rom(pdev, bios);
1449 return -1;
1450 }
e2051c44
JN
1451
1452 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1453 }
79e53945 1454
caf37fa4
JN
1455 bdb = get_bdb_header(vbt);
1456
3556dd40
JN
1457 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1458 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1459
79e53945
JB
1460 /* Grab useful general definitions */
1461 parse_general_features(dev_priv, bdb);
db545019 1462 parse_general_definitions(dev_priv, bdb);
88631706 1463 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1464 parse_lfp_backlight(dev_priv, bdb);
88631706 1465 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1466 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1467 parse_device_mapping(dev_priv, bdb);
32f9d658 1468 parse_driver_features(dev_priv, bdb);
500a8cc4 1469 parse_edp(dev_priv, bdb);
bfd7ebda 1470 parse_psr(dev_priv, bdb);
0f8689f5
JN
1471 parse_mipi_config(dev_priv, bdb);
1472 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1473 parse_ddi_ports(dev_priv, bdb);
32f9d658 1474
44834a67
CW
1475 if (bios)
1476 pci_unmap_rom(pdev, bios);
79e53945
JB
1477
1478 return 0;
1479}
3bdd14d5
JN
1480
1481/**
1482 * intel_bios_is_tv_present - is integrated TV present in VBT
1483 * @dev_priv: i915 device instance
1484 *
1485 * Return true if TV is present. If no child devices were parsed from VBT,
1486 * assume TV is present.
1487 */
1488bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1489{
1490 union child_device_config *p_child;
1491 int i;
1492
1493 if (!dev_priv->vbt.int_tv_support)
1494 return false;
1495
1496 if (!dev_priv->vbt.child_dev_num)
1497 return true;
1498
1499 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1500 p_child = dev_priv->vbt.child_dev + i;
1501 /*
1502 * If the device type is not TV, continue.
1503 */
1504 switch (p_child->old.device_type) {
1505 case DEVICE_TYPE_INT_TV:
1506 case DEVICE_TYPE_TV:
1507 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1508 break;
1509 default:
1510 continue;
1511 }
1512 /* Only when the addin_offset is non-zero, it is regarded
1513 * as present.
1514 */
1515 if (p_child->old.addin_offset)
1516 return true;
1517 }
1518
1519 return false;
1520}
5a69d13d
JN
1521
1522/**
1523 * intel_bios_is_lvds_present - is LVDS present in VBT
1524 * @dev_priv: i915 device instance
1525 * @i2c_pin: i2c pin for LVDS if present
1526 *
1527 * Return true if LVDS is present. If no child devices were parsed from VBT,
1528 * assume LVDS is present.
1529 */
1530bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1531{
1532 int i;
1533
1534 if (!dev_priv->vbt.child_dev_num)
1535 return true;
1536
1537 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1538 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1539 struct old_child_dev_config *child = &uchild->old;
1540
1541 /* If the device type is not LFP, continue.
1542 * We have to check both the new identifiers as well as the
1543 * old for compatibility with some BIOSes.
1544 */
1545 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1546 child->device_type != DEVICE_TYPE_LFP)
1547 continue;
1548
1549 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1550 *i2c_pin = child->i2c_pin;
1551
1552 /* However, we cannot trust the BIOS writers to populate
1553 * the VBT correctly. Since LVDS requires additional
1554 * information from AIM blocks, a non-zero addin offset is
1555 * a good indicator that the LVDS is actually present.
1556 */
1557 if (child->addin_offset)
1558 return true;
1559
1560 /* But even then some BIOS writers perform some black magic
1561 * and instantiate the device without reference to any
1562 * additional data. Trust that if the VBT was written into
1563 * the OpRegion then they have validated the LVDS's existence.
1564 */
1565 if (dev_priv->opregion.vbt)
1566 return true;
1567 }
1568
1569 return false;
1570}
951d9efe 1571
22f35042
VS
1572/**
1573 * intel_bios_is_port_present - is the specified digital port present
1574 * @dev_priv: i915 device instance
1575 * @port: port to check
1576 *
1577 * Return true if the device in %port is present.
1578 */
1579bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1580{
1581 static const struct {
1582 u16 dp, hdmi;
1583 } port_mapping[] = {
1584 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1585 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1586 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1587 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1588 };
1589 int i;
1590
1591 /* FIXME maybe deal with port A as well? */
1592 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1593 return false;
1594
1595 if (!dev_priv->vbt.child_dev_num)
1596 return false;
1597
1598 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1599 const union child_device_config *p_child =
1600 &dev_priv->vbt.child_dev[i];
1601 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1602 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1603 (p_child->common.device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1604 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
1605 return true;
1606 }
1607
1608 return false;
1609}
1610
951d9efe
JN
1611/**
1612 * intel_bios_is_port_edp - is the device in given port eDP
1613 * @dev_priv: i915 device instance
1614 * @port: port to check
1615 *
1616 * Return true if the device in %port is eDP.
1617 */
1618bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1619{
1620 union child_device_config *p_child;
1621 static const short port_mapping[] = {
1622 [PORT_B] = DVO_PORT_DPB,
1623 [PORT_C] = DVO_PORT_DPC,
1624 [PORT_D] = DVO_PORT_DPD,
1625 [PORT_E] = DVO_PORT_DPE,
1626 };
1627 int i;
1628
1629 if (!dev_priv->vbt.child_dev_num)
1630 return false;
1631
1632 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1633 p_child = dev_priv->vbt.child_dev + i;
1634
1635 if (p_child->common.dvo_port == port_mapping[port] &&
1636 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1637 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1638 return true;
1639 }
1640
1641 return false;
1642}
7137aec1 1643
d6199256
VS
1644bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port)
1645{
1646 static const struct {
1647 u16 dp, hdmi;
1648 } port_mapping[] = {
1649 /*
1650 * Buggy VBTs may declare DP ports as having
1651 * HDMI type dvo_port :( So let's check both.
1652 */
1653 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1654 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1655 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1656 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1657 };
1658 int i;
1659
1660 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1661 return false;
1662
1663 if (!dev_priv->vbt.child_dev_num)
1664 return false;
1665
1666 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1667 const union child_device_config *p_child =
1668 &dev_priv->vbt.child_dev[i];
1669
1670 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1671 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1672 (p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) ==
1673 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
1674 return true;
1675 }
1676
1677 return false;
1678}
1679
7137aec1
JN
1680/**
1681 * intel_bios_is_dsi_present - is DSI present in VBT
1682 * @dev_priv: i915 device instance
1683 * @port: port for DSI if present
1684 *
1685 * Return true if DSI is present, and return the port in %port.
1686 */
1687bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1688 enum port *port)
1689{
1690 union child_device_config *p_child;
1691 u8 dvo_port;
1692 int i;
1693
1694 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1695 p_child = dev_priv->vbt.child_dev + i;
1696
1697 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1698 continue;
1699
1700 dvo_port = p_child->common.dvo_port;
1701
1702 switch (dvo_port) {
1703 case DVO_PORT_MIPIA:
1704 case DVO_PORT_MIPIC:
7caaef33
JN
1705 if (port)
1706 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1707 return true;
1708 case DVO_PORT_MIPIB:
1709 case DVO_PORT_MIPID:
1710 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1711 port_name(dvo_port - DVO_PORT_MIPIA));
1712 break;
1713 }
1714 }
1715
1716 return false;
1717}
d252bf68
SS
1718
1719/**
1720 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1721 * @dev_priv: i915 device instance
1722 * @port: port to check
1723 *
1724 * Return true if HPD should be inverted for %port.
1725 */
1726bool
1727intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1728 enum port port)
1729{
1730 int i;
1731
1732 if (WARN_ON_ONCE(!IS_BROXTON(dev_priv)))
1733 return false;
1734
1735 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1736 if (!dev_priv->vbt.child_dev[i].common.hpd_invert)
1737 continue;
1738
1739 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1740 case DVO_PORT_DPA:
1741 case DVO_PORT_HDMIA:
1742 if (port == PORT_A)
1743 return true;
1744 break;
1745 case DVO_PORT_DPB:
1746 case DVO_PORT_HDMIB:
1747 if (port == PORT_B)
1748 return true;
1749 break;
1750 case DVO_PORT_DPC:
1751 case DVO_PORT_HDMIC:
1752 if (port == PORT_C)
1753 return true;
1754 break;
1755 default:
1756 break;
1757 }
1758 }
1759
1760 return false;
1761}
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