drm/i915: move edp low vswing config to vbt data
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
500a8cc4
ZW
61static int panel_type;
62
08c0888b
JN
63/* Get BDB block size given a pointer to Block ID. */
64static u32 _get_blocksize(const u8 *block_base)
65{
66 /* The MIPI Sequence Block v3+ has a separate size field. */
67 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
68 return *((const u32 *)(block_base + 4));
69 else
70 return *((const u16 *)(block_base + 1));
71}
72
73/* Get BDB block size give a pointer to data after Block ID and Block Size. */
74static u32 get_blocksize(const void *block_data)
75{
76 return _get_blocksize(block_data - 3);
77}
78
e8ef3b4c
JN
79static const void *
80find_section(const void *_bdb, int section_id)
79e53945 81{
e8ef3b4c
JN
82 const struct bdb_header *bdb = _bdb;
83 const u8 *base = _bdb;
79e53945 84 int index = 0;
cd67d226 85 u32 total, current_size;
79e53945
JB
86 u8 current_id;
87
88 /* skip to first section */
89 index += bdb->header_size;
90 total = bdb->bdb_size;
91
92 /* walk the sections looking for section_id */
d1f13fd2 93 while (index + 3 < total) {
79e53945 94 current_id = *(base + index);
08c0888b
JN
95 current_size = _get_blocksize(base + index);
96 index += 3;
cd67d226 97
d1f13fd2
CW
98 if (index + current_size > total)
99 return NULL;
100
79e53945
JB
101 if (current_id == section_id)
102 return base + index;
d1f13fd2 103
79e53945
JB
104 index += current_size;
105 }
106
107 return NULL;
108}
109
79e53945 110static void
88631706 111fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 112 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
113{
114 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
115 dvo_timing->hactive_lo;
116 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
117 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
118 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
119 dvo_timing->hsync_pulse_width;
120 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
121 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
122
123 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
124 dvo_timing->vactive_lo;
125 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
126 dvo_timing->vsync_off;
127 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
128 dvo_timing->vsync_pulse_width;
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
9bc35499
AJ
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
88631706
ML
144 /* Some VBTs have bogus h/vtotal values */
145 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
146 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
147 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
148 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
149
150 drm_mode_set_name(panel_fixed_mode);
151}
152
99834ea4
CW
153static const struct lvds_dvo_timing *
154get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
155 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
156 int index)
157{
158 /*
159 * the size of fp_timing varies on the different platform.
160 * So calculate the DVO timing relative offset in LVDS data
161 * entry to get the DVO timing entry
162 */
163
164 int lfp_data_size =
165 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
166 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
167 int dvo_timing_offset =
168 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
169 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
170 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
171
172 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
173}
174
b0354385
TI
175/* get lvds_fp_timing entry
176 * this function may return NULL if the corresponding entry is invalid
177 */
178static const struct lvds_fp_timing *
179get_lvds_fp_timing(const struct bdb_header *bdb,
180 const struct bdb_lvds_lfp_data *data,
181 const struct bdb_lvds_lfp_data_ptrs *ptrs,
182 int index)
183{
184 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
185 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
186 size_t ofs;
187
188 if (index >= ARRAY_SIZE(ptrs->ptr))
189 return NULL;
190 ofs = ptrs->ptr[index].fp_timing_offset;
191 if (ofs < data_ofs ||
192 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
193 return NULL;
194 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
195}
196
88631706
ML
197/* Try to find integrated panel data */
198static void
199parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 200 const struct bdb_header *bdb)
79e53945 201{
99834ea4
CW
202 const struct bdb_lvds_options *lvds_options;
203 const struct bdb_lvds_lfp_data *lvds_lfp_data;
204 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
205 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 206 const struct lvds_fp_timing *fp_timing;
79e53945 207 struct drm_display_mode *panel_fixed_mode;
c329a4ec 208 int drrs_mode;
79e53945 209
79e53945
JB
210 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
211 if (!lvds_options)
212 return;
213
41aa3448 214 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
79e53945
JB
215 if (lvds_options->panel_type == 0xff)
216 return;
6a04002b 217
500a8cc4 218 panel_type = lvds_options->panel_type;
79e53945 219
83a7280e
PB
220 drrs_mode = (lvds_options->dps_panel_type_bits
221 >> (panel_type * 2)) & MODE_MASK;
222 /*
223 * VBT has static DRRS = 0 and seamless DRRS = 2.
224 * The below piece of code is required to adjust vbt.drrs_type
225 * to match the enum drrs_support_type.
226 */
227 switch (drrs_mode) {
228 case 0:
229 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
230 DRM_DEBUG_KMS("DRRS supported mode is static\n");
231 break;
232 case 2:
233 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
234 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
235 break;
236 default:
237 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
238 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
239 break;
240 }
241
79e53945
JB
242 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
243 if (!lvds_lfp_data)
244 return;
245
1b16de0b
JB
246 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
247 if (!lvds_lfp_data_ptrs)
248 return;
249
41aa3448 250 dev_priv->vbt.lvds_vbt = 1;
79e53945 251
99834ea4
CW
252 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
253 lvds_lfp_data_ptrs,
254 lvds_options->panel_type);
79e53945 255
9a298b2a 256 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
257 if (!panel_fixed_mode)
258 return;
79e53945 259
99834ea4 260 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 261
41aa3448 262 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 263
28c97730 264 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 265 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 266
b0354385
TI
267 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
268 lvds_lfp_data_ptrs,
269 lvds_options->panel_type);
270 if (fp_timing) {
271 /* check the resolution, just to be sure */
272 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
273 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 274 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 275 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 276 dev_priv->vbt.bios_lvds_val);
b0354385
TI
277 }
278 }
88631706
ML
279}
280
f00076d2 281static void
dcb58a40
JN
282parse_lfp_backlight(struct drm_i915_private *dev_priv,
283 const struct bdb_header *bdb)
f00076d2
JN
284{
285 const struct bdb_lfp_backlight_data *backlight_data;
286 const struct bdb_lfp_backlight_data_entry *entry;
287
288 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
289 if (!backlight_data)
290 return;
291
292 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
293 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
294 backlight_data->entry_size);
295 return;
296 }
297
298 entry = &backlight_data->data[panel_type];
299
39fbc9c8
JN
300 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
301 if (!dev_priv->vbt.backlight.present) {
302 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
303 entry->type);
304 return;
305 }
306
f00076d2
JN
307 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
308 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 309 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2
JN
310 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
311 "active %s, min brightness %u, level %u\n",
312 dev_priv->vbt.backlight.pwm_freq_hz,
313 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 314 dev_priv->vbt.backlight.min_brightness,
f00076d2
JN
315 backlight_data->level[panel_type]);
316}
317
88631706
ML
318/* Try to find sdvo panel data */
319static void
320parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 321 const struct bdb_header *bdb)
88631706 322{
e8ef3b4c 323 const struct lvds_dvo_timing *dvo_timing;
88631706 324 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 325 int index;
79e53945 326
d330a953 327 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
328 if (index == -2) {
329 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
330 return;
331 }
332
5a1e5b6c 333 if (index == -1) {
e8ef3b4c 334 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
335
336 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
337 if (!sdvo_lvds_options)
338 return;
339
340 index = sdvo_lvds_options->panel_type;
341 }
88631706
ML
342
343 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
344 if (!dvo_timing)
345 return;
346
9a298b2a 347 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
348 if (!panel_fixed_mode)
349 return;
350
5a1e5b6c 351 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 352
41aa3448 353 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 354
5a1e5b6c
CW
355 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
356 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
357}
358
98f3a1dc 359static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
360 bool alternate)
361{
98f3a1dc 362 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 363 case 2:
e91e941b 364 return alternate ? 66667 : 48000;
9a4114ff
BF
365 case 3:
366 case 4:
e91e941b 367 return alternate ? 100000 : 96000;
9a4114ff 368 default:
e91e941b 369 return alternate ? 100000 : 120000;
9a4114ff
BF
370 }
371}
372
79e53945
JB
373static void
374parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 375 const struct bdb_header *bdb)
79e53945 376{
e8ef3b4c 377 const struct bdb_general_features *general;
79e53945 378
79e53945 379 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
380 if (!general)
381 return;
382
383 dev_priv->vbt.int_tv_support = general->int_tv_support;
384 /* int_crt_support can't be trusted on earlier platforms */
385 if (bdb->version >= 155 &&
386 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
387 dev_priv->vbt.int_crt_support = general->int_crt_support;
388 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
389 dev_priv->vbt.lvds_ssc_freq =
390 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
391 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
392 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
393 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
394 dev_priv->vbt.int_tv_support,
395 dev_priv->vbt.int_crt_support,
396 dev_priv->vbt.lvds_use_ssc,
397 dev_priv->vbt.lvds_ssc_freq,
398 dev_priv->vbt.display_clock_mode,
399 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
400}
401
db545019
DMEA
402static void
403parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 404 const struct bdb_header *bdb)
db545019 405{
e8ef3b4c 406 const struct bdb_general_definitions *general;
db545019 407
db545019
DMEA
408 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
409 if (general) {
410 u16 block_size = get_blocksize(general);
411 if (block_size >= sizeof(*general)) {
412 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 413 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 414 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 415 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 416 } else {
28c97730 417 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 418 block_size);
db545019
DMEA
419 }
420 }
421}
422
e8ef3b4c
JN
423static const union child_device_config *
424child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 425{
e8ef3b4c 426 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
427}
428
9b9d172d 429static void
430parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 431 const struct bdb_header *bdb)
9b9d172d 432{
433 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 434 const struct bdb_general_definitions *p_defs;
6cc38aca 435 const struct old_child_dev_config *child; /* legacy */
9b9d172d 436 int i, child_device_num, count;
db545019 437 u16 block_size;
9b9d172d 438
439 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
440 if (!p_defs) {
44834a67 441 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 442 return;
443 }
6cc38aca
JN
444
445 /*
446 * Only parse SDVO mappings when the general definitions block child
447 * device size matches that of the *legacy* child device config
448 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 449 */
6cc38aca
JN
450 if (p_defs->child_dev_size != sizeof(*child)) {
451 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 452 return;
453 }
454 /* get the block size of general definitions */
db545019 455 block_size = get_blocksize(p_defs);
9b9d172d 456 /* get the number of child device */
457 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 458 p_defs->child_dev_size;
9b9d172d 459 count = 0;
460 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
461 child = &child_device_ptr(p_defs, i)->old;
462 if (!child->device_type) {
9b9d172d 463 /* skip the device block if device type is invalid */
464 continue;
465 }
6cc38aca
JN
466 if (child->slave_addr != SLAVE_ADDR1 &&
467 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 468 /*
469 * If the slave address is neither 0x70 nor 0x72,
470 * it is not a SDVO device. Skip it.
471 */
472 continue;
473 }
6cc38aca
JN
474 if (child->dvo_port != DEVICE_PORT_DVOB &&
475 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 476 /* skip the incorrect SDVO port */
0206e353 477 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 478 continue;
479 }
28c97730 480 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
481 " %s port\n",
482 child->slave_addr,
483 (child->dvo_port == DEVICE_PORT_DVOB) ?
484 "SDVOB" : "SDVOC");
485 p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]);
9b9d172d 486 if (!p_mapping->initialized) {
6cc38aca
JN
487 p_mapping->dvo_port = child->dvo_port;
488 p_mapping->slave_addr = child->slave_addr;
489 p_mapping->dvo_wiring = child->dvo_wiring;
490 p_mapping->ddc_pin = child->ddc_pin;
491 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 492 p_mapping->initialized = 1;
46eb3036 493 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
494 p_mapping->dvo_port,
495 p_mapping->slave_addr,
496 p_mapping->dvo_wiring,
497 p_mapping->ddc_pin,
46eb3036 498 p_mapping->i2c_pin);
9b9d172d 499 } else {
28c97730 500 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 501 "two SDVO device.\n");
502 }
6cc38aca 503 if (child->slave2_addr) {
9b9d172d 504 /* Maybe this is a SDVO device with multiple inputs */
505 /* And the mapping info is not added */
28c97730
ZY
506 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
507 " is a SDVO device with multiple inputs.\n");
9b9d172d 508 }
509 count++;
510 }
511
512 if (!count) {
513 /* No SDVO device info is found */
28c97730 514 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 515 }
516 return;
517}
32f9d658
ZW
518
519static void
520parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 521 const struct bdb_header *bdb)
32f9d658 522{
e8ef3b4c 523 const struct bdb_driver_features *driver;
32f9d658 524
32f9d658 525 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
526 if (!driver)
527 return;
528
6fca55b1 529 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 530 dev_priv->vbt.edp.support = 1;
652c393a 531
5ceb0f9b 532 if (driver->dual_frequency)
652c393a 533 dev_priv->render_reclock_avail = true;
83a7280e
PB
534
535 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
536 /*
537 * If DRRS is not supported, drrs_type has to be set to 0.
538 * This is because, VBT is configured in such a way that
539 * static DRRS is 0 and DRRS not supported is represented by
540 * driver->drrs_enabled=false
541 */
542 if (!driver->drrs_enabled)
543 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
544}
545
500a8cc4 546static void
dcb58a40 547parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 548{
e8ef3b4c
JN
549 const struct bdb_edp *edp;
550 const struct edp_power_seq *edp_pps;
551 const struct edp_link_params *edp_link_params;
500a8cc4
ZW
552
553 edp = find_section(bdb, BDB_EDP);
554 if (!edp) {
6aa23e65 555 if (dev_priv->vbt.edp.support)
9a30a61f 556 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
557 return;
558 }
559
560 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
561 case EDP_18BPP:
6aa23e65 562 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
563 break;
564 case EDP_24BPP:
6aa23e65 565 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
566 break;
567 case EDP_30BPP:
6aa23e65 568 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
569 break;
570 }
5ceb0f9b 571
9f0e7ff4
JB
572 /* Get the eDP sequencing and link info */
573 edp_pps = &edp->power_seqs[panel_type];
574 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 575
6aa23e65 576 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 577
e13e2b2c
JN
578 switch (edp_link_params->rate) {
579 case EDP_RATE_1_62:
6aa23e65 580 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
581 break;
582 case EDP_RATE_2_7:
6aa23e65 583 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
584 break;
585 default:
586 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
587 edp_link_params->rate);
588 break;
589 }
590
9f0e7ff4 591 switch (edp_link_params->lanes) {
e13e2b2c 592 case EDP_LANE_1:
6aa23e65 593 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 594 break;
e13e2b2c 595 case EDP_LANE_2:
6aa23e65 596 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 597 break;
e13e2b2c 598 case EDP_LANE_4:
6aa23e65 599 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 600 break;
e13e2b2c
JN
601 default:
602 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
603 edp_link_params->lanes);
604 break;
9f0e7ff4 605 }
e13e2b2c 606
9f0e7ff4 607 switch (edp_link_params->preemphasis) {
e13e2b2c 608 case EDP_PREEMPHASIS_NONE:
6aa23e65 609 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 610 break;
e13e2b2c 611 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 612 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 613 break;
e13e2b2c 614 case EDP_PREEMPHASIS_6dB:
6aa23e65 615 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 616 break;
e13e2b2c 617 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 618 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 619 break;
e13e2b2c
JN
620 default:
621 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
622 edp_link_params->preemphasis);
623 break;
9f0e7ff4 624 }
e13e2b2c 625
9f0e7ff4 626 switch (edp_link_params->vswing) {
e13e2b2c 627 case EDP_VSWING_0_4V:
6aa23e65 628 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 629 break;
e13e2b2c 630 case EDP_VSWING_0_6V:
6aa23e65 631 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 632 break;
e13e2b2c 633 case EDP_VSWING_0_8V:
6aa23e65 634 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 635 break;
e13e2b2c 636 case EDP_VSWING_1_2V:
6aa23e65 637 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 638 break;
e13e2b2c
JN
639 default:
640 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
641 edp_link_params->vswing);
642 break;
9f0e7ff4 643 }
9a57f5bb
SJ
644
645 if (bdb->version >= 173) {
646 uint8_t vswing;
647
9e458034
SJ
648 /* Don't read from VBT if module parameter has valid value*/
649 if (i915.edp_vswing) {
06411f08 650 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
9e458034
SJ
651 } else {
652 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 653 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 654 }
9a57f5bb 655 }
500a8cc4
ZW
656}
657
bfd7ebda 658static void
dcb58a40 659parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 660{
e8ef3b4c
JN
661 const struct bdb_psr *psr;
662 const struct psr_table *psr_table;
bfd7ebda
RV
663
664 psr = find_section(bdb, BDB_PSR);
665 if (!psr) {
666 DRM_DEBUG_KMS("No PSR BDB found.\n");
667 return;
668 }
669
670 psr_table = &psr->psr_table[panel_type];
671
672 dev_priv->vbt.psr.full_link = psr_table->full_link;
673 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
674
675 /* Allowed VBT values goes from 0 to 15 */
676 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
677 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
678
679 switch (psr_table->lines_to_wait) {
680 case 0:
681 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
682 break;
683 case 1:
684 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
685 break;
686 case 2:
687 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
688 break;
689 case 3:
690 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
691 break;
692 default:
693 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
694 psr_table->lines_to_wait);
695 break;
696 }
697
698 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
699 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
700}
701
d17c5443 702static void
0f8689f5
JN
703parse_mipi_config(struct drm_i915_private *dev_priv,
704 const struct bdb_header *bdb)
d17c5443 705{
e8ef3b4c 706 const struct bdb_mipi_config *start;
e8ef3b4c
JN
707 const struct mipi_config *config;
708 const struct mipi_pps_data *pps;
d3b542fc 709
3e6bd011 710 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 711 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
712 return;
713
d3b542fc
SK
714 /* Initialize this to undefined indicating no generic MIPI support */
715 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
716
717 /* Block #40 is already parsed and panel_fixed_mode is
718 * stored in dev_priv->lfp_lvds_vbt_mode
719 * resuse this when needed
720 */
d17c5443 721
d3b542fc
SK
722 /* Parse #52 for panel index used from panel_type already
723 * parsed
724 */
725 start = find_section(bdb, BDB_MIPI_CONFIG);
726 if (!start) {
727 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
728 return;
729 }
730
d3b542fc
SK
731 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
732 panel_type);
733
734 /*
735 * get hold of the correct configuration block and pps data as per
736 * the panel_type as index
737 */
738 config = &start->config[panel_type];
739 pps = &start->pps[panel_type];
740
741 /* store as of now full data. Trim when we realise all is not needed */
742 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
743 if (!dev_priv->vbt.dsi.config)
744 return;
745
746 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
747 if (!dev_priv->vbt.dsi.pps) {
748 kfree(dev_priv->vbt.dsi.config);
749 return;
750 }
751
752 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 753 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
754}
755
5db72099
JN
756/* Find the sequence block and size for the given panel. */
757static const u8 *
758find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 759 u16 panel_id, u32 *seq_size)
5db72099
JN
760{
761 u32 total = get_blocksize(sequence);
762 const u8 *data = &sequence->data[0];
763 u8 current_id;
2a33d934
JN
764 u32 current_size;
765 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
766 int index = 0;
767 int i;
768
2a33d934
JN
769 /* skip new block size */
770 if (sequence->version >= 3)
771 data += 4;
772
773 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
774 if (index + header_size > total) {
775 DRM_ERROR("Invalid sequence block (header)\n");
776 return NULL;
777 }
778
5db72099 779 current_id = *(data + index);
2a33d934
JN
780 if (sequence->version >= 3)
781 current_size = *((const u32 *)(data + index + 1));
782 else
783 current_size = *((const u16 *)(data + index + 1));
5db72099 784
2a33d934 785 index += header_size;
5db72099
JN
786
787 if (index + current_size > total) {
788 DRM_ERROR("Invalid sequence block\n");
789 return NULL;
790 }
791
792 if (current_id == panel_id) {
793 *seq_size = current_size;
794 return data + index;
795 }
796
797 index += current_size;
798 }
799
800 DRM_ERROR("Sequence block detected but no valid configuration\n");
801
802 return NULL;
803}
804
8d3ed2f3
JN
805static int goto_next_sequence(const u8 *data, int index, int total)
806{
807 u16 len;
808
809 /* Skip Sequence Byte. */
810 for (index = index + 1; index < total; index += len) {
811 u8 operation_byte = *(data + index);
812 index++;
813
814 switch (operation_byte) {
815 case MIPI_SEQ_ELEM_END:
816 return index;
817 case MIPI_SEQ_ELEM_SEND_PKT:
818 if (index + 4 > total)
819 return 0;
820
821 len = *((const u16 *)(data + index + 2)) + 4;
822 break;
823 case MIPI_SEQ_ELEM_DELAY:
824 len = 4;
825 break;
826 case MIPI_SEQ_ELEM_GPIO:
827 len = 2;
828 break;
f4d64936
JN
829 case MIPI_SEQ_ELEM_I2C:
830 if (index + 7 > total)
831 return 0;
832 len = *(data + index + 6) + 7;
833 break;
8d3ed2f3
JN
834 default:
835 DRM_ERROR("Unknown operation byte\n");
836 return 0;
837 }
838 }
839
840 return 0;
841}
842
2a33d934
JN
843static int goto_next_sequence_v3(const u8 *data, int index, int total)
844{
845 int seq_end;
846 u16 len;
6765bd6d 847 u32 size_of_sequence;
2a33d934
JN
848
849 /*
850 * Could skip sequence based on Size of Sequence alone, but also do some
851 * checking on the structure.
852 */
853 if (total < 5) {
854 DRM_ERROR("Too small sequence size\n");
855 return 0;
856 }
857
6765bd6d
JN
858 /* Skip Sequence Byte. */
859 index++;
860
861 /*
862 * Size of Sequence. Excludes the Sequence Byte and the size itself,
863 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
864 * byte.
865 */
866 size_of_sequence = *((const uint32_t *)(data + index));
867 index += 4;
868
869 seq_end = index + size_of_sequence;
2a33d934
JN
870 if (seq_end > total) {
871 DRM_ERROR("Invalid sequence size\n");
872 return 0;
873 }
874
6765bd6d 875 for (; index < total; index += len) {
2a33d934
JN
876 u8 operation_byte = *(data + index);
877 index++;
878
879 if (operation_byte == MIPI_SEQ_ELEM_END) {
880 if (index != seq_end) {
881 DRM_ERROR("Invalid element structure\n");
882 return 0;
883 }
884 return index;
885 }
886
887 len = *(data + index);
888 index++;
889
890 /*
891 * FIXME: Would be nice to check elements like for v1/v2 in
892 * goto_next_sequence() above.
893 */
894 switch (operation_byte) {
895 case MIPI_SEQ_ELEM_SEND_PKT:
896 case MIPI_SEQ_ELEM_DELAY:
897 case MIPI_SEQ_ELEM_GPIO:
898 case MIPI_SEQ_ELEM_I2C:
899 case MIPI_SEQ_ELEM_SPI:
900 case MIPI_SEQ_ELEM_PMIC:
901 break;
902 default:
903 DRM_ERROR("Unknown operation byte %u\n",
904 operation_byte);
905 break;
906 }
907 }
908
909 return 0;
910}
911
0f8689f5
JN
912static void
913parse_mipi_sequence(struct drm_i915_private *dev_priv,
914 const struct bdb_header *bdb)
915{
916 const struct bdb_mipi_sequence *sequence;
917 const u8 *seq_data;
2a33d934 918 u32 seq_size;
0f8689f5 919 u8 *data;
8d3ed2f3 920 int index = 0;
0f8689f5
JN
921
922 /* Only our generic panel driver uses the sequence block. */
923 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
924 return;
d3b542fc 925
d3b542fc
SK
926 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
927 if (!sequence) {
928 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
929 return;
930 }
931
cd67d226 932 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
933 if (sequence->version >= 4) {
934 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
935 sequence->version);
cd67d226
JN
936 return;
937 }
938
2a33d934 939 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 940
5db72099
JN
941 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
942 if (!seq_data)
d3b542fc 943 return;
d3b542fc 944
8d3ed2f3
JN
945 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
946 if (!data)
d3b542fc
SK
947 return;
948
8d3ed2f3
JN
949 /* Parse the sequences, store pointers to each sequence. */
950 for (;;) {
951 u8 seq_id = *(data + index);
952 if (seq_id == MIPI_SEQ_END)
953 break;
d3b542fc 954
8d3ed2f3
JN
955 if (seq_id >= MIPI_SEQ_MAX) {
956 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
957 goto err;
958 }
959
8d3ed2f3 960 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 961
2a33d934
JN
962 if (sequence->version >= 3)
963 index = goto_next_sequence_v3(data, index, seq_size);
964 else
965 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
966 if (!index) {
967 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
968 goto err;
969 }
d3b542fc
SK
970 }
971
8d3ed2f3
JN
972 dev_priv->vbt.dsi.data = data;
973 dev_priv->vbt.dsi.size = seq_size;
974 dev_priv->vbt.dsi.seq_version = sequence->version;
975
976 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 977 return;
d3b542fc 978
8d3ed2f3
JN
979err:
980 kfree(data);
ed3b6679 981 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
982}
983
75067dde
AK
984static u8 translate_iboost(u8 val)
985{
986 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
987
988 if (val >= ARRAY_SIZE(mapping)) {
989 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
990 return 0;
991 }
992 return mapping[val];
993}
994
6acab15a 995static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 996 const struct bdb_header *bdb)
6acab15a
PZ
997{
998 union child_device_config *it, *child = NULL;
999 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1000 uint8_t hdmi_level_shift;
1001 int i, j;
554d6af5 1002 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1003 uint8_t aux_channel, ddc_pin;
6acab15a
PZ
1004 /* Each DDI port can have more than one value on the "DVO Port" field,
1005 * so look for all the possible values for each port and abort if more
1006 * than one is found. */
2800e4c2
RV
1007 int dvo_ports[][3] = {
1008 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1009 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1010 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1011 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1012 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1013 };
1014
1015 /* Find the child device to use, abort if more than one found. */
1016 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1017 it = dev_priv->vbt.child_dev + i;
1018
2800e4c2 1019 for (j = 0; j < 3; j++) {
6acab15a
PZ
1020 if (dvo_ports[port][j] == -1)
1021 break;
1022
1023 if (it->common.dvo_port == dvo_ports[port][j]) {
1024 if (child) {
1025 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1026 port_name(port));
1027 return;
1028 }
1029 child = it;
1030 }
1031 }
1032 }
1033 if (!child)
1034 return;
1035
6bf19e7c 1036 aux_channel = child->raw[25];
11c1b657 1037 ddc_pin = child->common.ddc_pin;
6bf19e7c 1038
78eb06c3
VS
1039 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1040 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1041 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1042 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1043 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1044
311a2094
PZ
1045 info->supports_dvi = is_dvi;
1046 info->supports_hdmi = is_hdmi;
1047 info->supports_dp = is_dp;
1048
554d6af5
PZ
1049 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1050 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1051
1052 if (is_edp && is_dvi)
1053 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1054 port_name(port));
1055 if (is_crt && port != PORT_E)
1056 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1057 if (is_crt && (is_dvi || is_dp))
1058 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1059 port_name(port));
1060 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1061 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1062 if (!is_dvi && !is_dp && !is_crt)
1063 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1064 port_name(port));
1065 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1066 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1067
1068 if (is_dvi) {
11c1b657
XZ
1069 if (port == PORT_E) {
1070 info->alternate_ddc_pin = ddc_pin;
1071 /* if DDIE share ddc pin with other port, then
1072 * dvi/hdmi couldn't exist on the shared port.
1073 * Otherwise they share the same ddc bin and system
1074 * couldn't communicate with them seperately. */
1075 if (ddc_pin == DDC_PIN_B) {
1076 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1077 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1078 } else if (ddc_pin == DDC_PIN_C) {
1079 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1080 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1081 } else if (ddc_pin == DDC_PIN_D) {
1082 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1083 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1084 }
1085 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
6bf19e7c 1086 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
11c1b657 1087 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
6bf19e7c 1088 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
11c1b657 1089 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
6bf19e7c
PZ
1090 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1091 }
1092
1093 if (is_dp) {
500ea70d
RV
1094 if (port == PORT_E) {
1095 info->alternate_aux_channel = aux_channel;
1096 /* if DDIE share aux channel with other port, then
1097 * DP couldn't exist on the shared port. Otherwise
1098 * they share the same aux channel and system
1099 * couldn't communicate with them seperately. */
1100 if (aux_channel == DP_AUX_A)
1101 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1102 else if (aux_channel == DP_AUX_B)
1103 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1104 else if (aux_channel == DP_AUX_C)
1105 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1106 else if (aux_channel == DP_AUX_D)
1107 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1108 }
1109 else if (aux_channel == DP_AUX_A && port != PORT_A)
6bf19e7c 1110 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
500ea70d 1111 else if (aux_channel == DP_AUX_B && port != PORT_B)
6bf19e7c 1112 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
500ea70d 1113 else if (aux_channel == DP_AUX_C && port != PORT_C)
6bf19e7c 1114 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
500ea70d 1115 else if (aux_channel == DP_AUX_D && port != PORT_D)
6bf19e7c
PZ
1116 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1117 }
1118
6acab15a
PZ
1119 if (bdb->version >= 158) {
1120 /* The VBT HDMI level shift values match the table we have. */
1121 hdmi_level_shift = child->raw[7] & 0xF;
ce4dd49e
DL
1122 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1123 port_name(port),
1124 hdmi_level_shift);
1125 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1126 }
75067dde
AK
1127
1128 /* Parse the I_boost config for SKL and above */
1129 if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
1130 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1131 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1132 port_name(port), info->dp_boost_level);
1133 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1134 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1135 port_name(port), info->hdmi_boost_level);
1136 }
6acab15a
PZ
1137}
1138
1139static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1140 const struct bdb_header *bdb)
6acab15a 1141{
6acab15a
PZ
1142 enum port port;
1143
98f3a1dc 1144 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1145 return;
1146
1147 if (!dev_priv->vbt.child_dev_num)
1148 return;
1149
1150 if (bdb->version < 155)
1151 return;
1152
1153 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1154 parse_ddi_port(dev_priv, port, bdb);
1155}
1156
6363ee6f
ZY
1157static void
1158parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1159 const struct bdb_header *bdb)
6363ee6f 1160{
e8ef3b4c
JN
1161 const struct bdb_general_definitions *p_defs;
1162 const union child_device_config *p_child;
1163 union child_device_config *child_dev_ptr;
6363ee6f 1164 int i, child_device_num, count;
e2d6cf7f
DW
1165 u8 expected_size;
1166 u16 block_size;
6363ee6f
ZY
1167
1168 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1169 if (!p_defs) {
44834a67 1170 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1171 return;
1172 }
7244f309
VS
1173 if (bdb->version < 106) {
1174 expected_size = 22;
1175 } else if (bdb->version < 109) {
52b69c84
VS
1176 expected_size = 27;
1177 } else if (bdb->version < 195) {
1178 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1179 expected_size = sizeof(struct old_child_dev_config);
1180 } else if (bdb->version == 195) {
1181 expected_size = 37;
1182 } else if (bdb->version <= 197) {
1183 expected_size = 38;
1184 } else {
1185 expected_size = 38;
1186 BUILD_BUG_ON(sizeof(*p_child) < 38);
1187 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1188 bdb->version, expected_size);
1189 }
1190
e2d6cf7f
DW
1191 /* Flag an error for unexpected size, but continue anyway. */
1192 if (p_defs->child_dev_size != expected_size)
1193 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1194 p_defs->child_dev_size, expected_size, bdb->version);
1195
52b69c84
VS
1196 /* The legacy sized child device config is the minimum we need. */
1197 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1198 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1199 p_defs->child_dev_size);
1200 return;
1201 }
1202
6363ee6f
ZY
1203 /* get the block size of general definitions */
1204 block_size = get_blocksize(p_defs);
1205 /* get the number of child device */
1206 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1207 p_defs->child_dev_size;
6363ee6f
ZY
1208 count = 0;
1209 /* get the number of child device that is present */
1210 for (i = 0; i < child_device_num; i++) {
90e4f159 1211 p_child = child_device_ptr(p_defs, i);
768f69c9 1212 if (!p_child->common.device_type) {
6363ee6f
ZY
1213 /* skip the device block if device type is invalid */
1214 continue;
1215 }
1216 count++;
1217 }
1218 if (!count) {
0206e353 1219 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1220 return;
1221 }
41aa3448
RV
1222 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1223 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1224 DRM_DEBUG_KMS("No memory space for child device\n");
1225 return;
1226 }
1227
41aa3448 1228 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1229 count = 0;
1230 for (i = 0; i < child_device_num; i++) {
90e4f159 1231 p_child = child_device_ptr(p_defs, i);
768f69c9 1232 if (!p_child->common.device_type) {
6363ee6f
ZY
1233 /* skip the device block if device type is invalid */
1234 continue;
1235 }
3e6bd011 1236
41aa3448 1237 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1238 count++;
e2d6cf7f
DW
1239
1240 /*
1241 * Copy as much as we know (sizeof) and is available
1242 * (child_dev_size) of the child device. Accessing the data must
1243 * depend on VBT version.
1244 */
1245 memcpy(child_dev_ptr, p_child,
1246 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
6363ee6f
ZY
1247 }
1248 return;
1249}
44834a67 1250
6a04002b
SQ
1251static void
1252init_vbt_defaults(struct drm_i915_private *dev_priv)
1253{
6acab15a 1254 enum port port;
9a4114ff 1255
988c7015 1256 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1257
56c4b63a
JN
1258 /* Default to having backlight */
1259 dev_priv->vbt.backlight.present = true;
1260
6a04002b 1261 /* LFP panel data */
41aa3448
RV
1262 dev_priv->vbt.lvds_dither = 1;
1263 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1264
1265 /* SDVO panel data */
41aa3448 1266 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1267
1268 /* general features */
41aa3448
RV
1269 dev_priv->vbt.int_tv_support = 1;
1270 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1271
1272 /* Default to using SSC */
41aa3448 1273 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1274 /*
1275 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1276 * clock for LVDS.
1277 */
98f3a1dc
JN
1278 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1279 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1280 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1281
1282 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1283 struct ddi_vbt_port_info *info =
1284 &dev_priv->vbt.ddi_port_info[port];
1285
ce4dd49e 1286 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
311a2094
PZ
1287
1288 info->supports_dvi = (port != PORT_A && port != PORT_E);
1289 info->supports_hdmi = info->supports_dvi;
1290 info->supports_dp = (port != PORT_E);
6acab15a 1291 }
6a04002b
SQ
1292}
1293
caf37fa4
JN
1294static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1295{
1296 const void *_vbt = vbt;
1297
1298 return _vbt + vbt->bdb_offset;
1299}
1300
f0067a31
JN
1301/**
1302 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1303 * @buf: pointer to a buffer to validate
1304 * @size: size of the buffer
1305 *
1306 * Returns true on valid VBT.
1307 */
1308bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1309{
f0067a31 1310 const struct vbt_header *vbt = buf;
dcb58a40 1311 const struct bdb_header *bdb;
3dd4e846 1312
caf37fa4 1313 if (!vbt)
f0067a31 1314 return false;
caf37fa4 1315
f0067a31 1316 if (sizeof(struct vbt_header) > size) {
3dd4e846 1317 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1318 return false;
3dd4e846
CW
1319 }
1320
1321 if (memcmp(vbt->signature, "$VBT", 4)) {
1322 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1323 return false;
3dd4e846
CW
1324 }
1325
f0067a31 1326 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
3dd4e846 1327 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1328 return false;
3dd4e846
CW
1329 }
1330
caf37fa4 1331 bdb = get_bdb_header(vbt);
f0067a31 1332 if (vbt->bdb_offset + bdb->bdb_size > size) {
3dd4e846 1333 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1334 return false;
3dd4e846
CW
1335 }
1336
caf37fa4 1337 return vbt;
3dd4e846
CW
1338}
1339
caf37fa4 1340static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1341{
b34a991a
JN
1342 size_t i;
1343
1344 /* Scour memory looking for the VBT signature. */
1345 for (i = 0; i + 4 < size; i++) {
f0067a31 1346 void *vbt;
115719fc 1347
f0067a31
JN
1348 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1349 continue;
1350
1351 /*
1352 * This is the one place where we explicitly discard the address
1353 * space (__iomem) of the BIOS/VBT.
1354 */
1355 vbt = (void __force *) bios + i;
1356 if (intel_bios_is_valid_vbt(vbt, size - i))
1357 return vbt;
1358
1359 break;
b34a991a
JN
1360 }
1361
f0067a31 1362 return NULL;
b34a991a
JN
1363}
1364
79e53945 1365/**
8b8e1a89 1366 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1367 * @dev_priv: i915 device instance
79e53945
JB
1368 *
1369 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1370 * to appropriate values.
1371 *
79e53945
JB
1372 * Returns 0 on success, nonzero on failure.
1373 */
0317c6ce 1374int
98f3a1dc 1375intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1376{
98f3a1dc 1377 struct pci_dev *pdev = dev_priv->dev->pdev;
f0067a31 1378 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1379 const struct bdb_header *bdb;
44834a67
CW
1380 u8 __iomem *bios = NULL;
1381
98f3a1dc 1382 if (HAS_PCH_NOP(dev_priv))
ab5c608b
BW
1383 return -ENODEV;
1384
6a04002b 1385 init_vbt_defaults(dev_priv);
f899fc64 1386
f0067a31 1387 if (!vbt) {
b34a991a 1388 size_t size;
79e53945 1389
44834a67
CW
1390 bios = pci_map_rom(pdev, &size);
1391 if (!bios)
1392 return -1;
1393
caf37fa4
JN
1394 vbt = find_vbt(bios, size);
1395 if (!vbt) {
44834a67
CW
1396 pci_unmap_rom(pdev, bios);
1397 return -1;
1398 }
e2051c44
JN
1399
1400 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1401 }
79e53945 1402
caf37fa4
JN
1403 bdb = get_bdb_header(vbt);
1404
3556dd40
JN
1405 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1406 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1407
79e53945
JB
1408 /* Grab useful general definitions */
1409 parse_general_features(dev_priv, bdb);
db545019 1410 parse_general_definitions(dev_priv, bdb);
88631706 1411 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1412 parse_lfp_backlight(dev_priv, bdb);
88631706 1413 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1414 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1415 parse_device_mapping(dev_priv, bdb);
32f9d658 1416 parse_driver_features(dev_priv, bdb);
500a8cc4 1417 parse_edp(dev_priv, bdb);
bfd7ebda 1418 parse_psr(dev_priv, bdb);
0f8689f5
JN
1419 parse_mipi_config(dev_priv, bdb);
1420 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1421 parse_ddi_ports(dev_priv, bdb);
32f9d658 1422
44834a67
CW
1423 if (bios)
1424 pci_unmap_rom(pdev, bios);
79e53945
JB
1425
1426 return 0;
1427}
3bdd14d5
JN
1428
1429/**
1430 * intel_bios_is_tv_present - is integrated TV present in VBT
1431 * @dev_priv: i915 device instance
1432 *
1433 * Return true if TV is present. If no child devices were parsed from VBT,
1434 * assume TV is present.
1435 */
1436bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1437{
1438 union child_device_config *p_child;
1439 int i;
1440
1441 if (!dev_priv->vbt.int_tv_support)
1442 return false;
1443
1444 if (!dev_priv->vbt.child_dev_num)
1445 return true;
1446
1447 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1448 p_child = dev_priv->vbt.child_dev + i;
1449 /*
1450 * If the device type is not TV, continue.
1451 */
1452 switch (p_child->old.device_type) {
1453 case DEVICE_TYPE_INT_TV:
1454 case DEVICE_TYPE_TV:
1455 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1456 break;
1457 default:
1458 continue;
1459 }
1460 /* Only when the addin_offset is non-zero, it is regarded
1461 * as present.
1462 */
1463 if (p_child->old.addin_offset)
1464 return true;
1465 }
1466
1467 return false;
1468}
5a69d13d
JN
1469
1470/**
1471 * intel_bios_is_lvds_present - is LVDS present in VBT
1472 * @dev_priv: i915 device instance
1473 * @i2c_pin: i2c pin for LVDS if present
1474 *
1475 * Return true if LVDS is present. If no child devices were parsed from VBT,
1476 * assume LVDS is present.
1477 */
1478bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1479{
1480 int i;
1481
1482 if (!dev_priv->vbt.child_dev_num)
1483 return true;
1484
1485 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1486 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1487 struct old_child_dev_config *child = &uchild->old;
1488
1489 /* If the device type is not LFP, continue.
1490 * We have to check both the new identifiers as well as the
1491 * old for compatibility with some BIOSes.
1492 */
1493 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1494 child->device_type != DEVICE_TYPE_LFP)
1495 continue;
1496
1497 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1498 *i2c_pin = child->i2c_pin;
1499
1500 /* However, we cannot trust the BIOS writers to populate
1501 * the VBT correctly. Since LVDS requires additional
1502 * information from AIM blocks, a non-zero addin offset is
1503 * a good indicator that the LVDS is actually present.
1504 */
1505 if (child->addin_offset)
1506 return true;
1507
1508 /* But even then some BIOS writers perform some black magic
1509 * and instantiate the device without reference to any
1510 * additional data. Trust that if the VBT was written into
1511 * the OpRegion then they have validated the LVDS's existence.
1512 */
1513 if (dev_priv->opregion.vbt)
1514 return true;
1515 }
1516
1517 return false;
1518}
951d9efe
JN
1519
1520/**
1521 * intel_bios_is_port_edp - is the device in given port eDP
1522 * @dev_priv: i915 device instance
1523 * @port: port to check
1524 *
1525 * Return true if the device in %port is eDP.
1526 */
1527bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1528{
1529 union child_device_config *p_child;
1530 static const short port_mapping[] = {
1531 [PORT_B] = DVO_PORT_DPB,
1532 [PORT_C] = DVO_PORT_DPC,
1533 [PORT_D] = DVO_PORT_DPD,
1534 [PORT_E] = DVO_PORT_DPE,
1535 };
1536 int i;
1537
1538 if (!dev_priv->vbt.child_dev_num)
1539 return false;
1540
1541 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1542 p_child = dev_priv->vbt.child_dev + i;
1543
1544 if (p_child->common.dvo_port == port_mapping[port] &&
1545 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1546 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1547 return true;
1548 }
1549
1550 return false;
1551}
7137aec1
JN
1552
1553/**
1554 * intel_bios_is_dsi_present - is DSI present in VBT
1555 * @dev_priv: i915 device instance
1556 * @port: port for DSI if present
1557 *
1558 * Return true if DSI is present, and return the port in %port.
1559 */
1560bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1561 enum port *port)
1562{
1563 union child_device_config *p_child;
1564 u8 dvo_port;
1565 int i;
1566
1567 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1568 p_child = dev_priv->vbt.child_dev + i;
1569
1570 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1571 continue;
1572
1573 dvo_port = p_child->common.dvo_port;
1574
1575 switch (dvo_port) {
1576 case DVO_PORT_MIPIA:
1577 case DVO_PORT_MIPIC:
7caaef33
JN
1578 if (port)
1579 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1580 return true;
1581 case DVO_PORT_MIPIB:
1582 case DVO_PORT_MIPID:
1583 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1584 port_name(dvo_port - DVO_PORT_MIPIA));
1585 break;
1586 }
1587 }
1588
1589 return false;
1590}
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