Commit | Line | Data |
---|---|---|
79e53945 | 1 | /* |
39507259 | 2 | * Copyright © 2006 Intel Corporation |
79e53945 JB |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
21 | * SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * | |
26 | */ | |
25e341cf | 27 | #include <linux/dmi.h> |
9f0e7ff4 | 28 | #include <drm/drm_dp_helper.h> |
760285e7 DH |
29 | #include <drm/drmP.h> |
30 | #include <drm/i915_drm.h> | |
79e53945 JB |
31 | #include "i915_drv.h" |
32 | #include "intel_bios.h" | |
33 | ||
9b9d172d | 34 | #define SLAVE_ADDR1 0x70 |
35 | #define SLAVE_ADDR2 0x72 | |
79e53945 | 36 | |
500a8cc4 ZW |
37 | static int panel_type; |
38 | ||
79e53945 JB |
39 | static void * |
40 | find_section(struct bdb_header *bdb, int section_id) | |
41 | { | |
42 | u8 *base = (u8 *)bdb; | |
43 | int index = 0; | |
44 | u16 total, current_size; | |
45 | u8 current_id; | |
46 | ||
47 | /* skip to first section */ | |
48 | index += bdb->header_size; | |
49 | total = bdb->bdb_size; | |
50 | ||
51 | /* walk the sections looking for section_id */ | |
52 | while (index < total) { | |
53 | current_id = *(base + index); | |
54 | index++; | |
55 | current_size = *((u16 *)(base + index)); | |
56 | index += 2; | |
57 | if (current_id == section_id) | |
58 | return base + index; | |
59 | index += current_size; | |
60 | } | |
61 | ||
62 | return NULL; | |
63 | } | |
64 | ||
db545019 DMEA |
65 | static u16 |
66 | get_blocksize(void *p) | |
67 | { | |
68 | u16 *block_ptr, block_size; | |
69 | ||
70 | block_ptr = (u16 *)((char *)p - 2); | |
71 | block_size = *block_ptr; | |
72 | return block_size; | |
73 | } | |
74 | ||
79e53945 | 75 | static void |
88631706 | 76 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
99834ea4 | 77 | const struct lvds_dvo_timing *dvo_timing) |
88631706 ML |
78 | { |
79 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | | |
80 | dvo_timing->hactive_lo; | |
81 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + | |
82 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); | |
83 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + | |
84 | dvo_timing->hsync_pulse_width; | |
85 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + | |
86 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); | |
87 | ||
88 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | | |
89 | dvo_timing->vactive_lo; | |
90 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + | |
91 | dvo_timing->vsync_off; | |
92 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + | |
93 | dvo_timing->vsync_pulse_width; | |
94 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + | |
95 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); | |
96 | panel_fixed_mode->clock = dvo_timing->clock * 10; | |
97 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; | |
98 | ||
9bc35499 AJ |
99 | if (dvo_timing->hsync_positive) |
100 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
101 | else | |
102 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; | |
103 | ||
104 | if (dvo_timing->vsync_positive) | |
105 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
106 | else | |
107 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; | |
108 | ||
88631706 ML |
109 | /* Some VBTs have bogus h/vtotal values */ |
110 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) | |
111 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; | |
112 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) | |
113 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; | |
114 | ||
115 | drm_mode_set_name(panel_fixed_mode); | |
116 | } | |
117 | ||
99834ea4 CW |
118 | static bool |
119 | lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a, | |
120 | const struct lvds_dvo_timing *b) | |
121 | { | |
122 | if (a->hactive_hi != b->hactive_hi || | |
123 | a->hactive_lo != b->hactive_lo) | |
124 | return false; | |
125 | ||
126 | if (a->hsync_off_hi != b->hsync_off_hi || | |
127 | a->hsync_off_lo != b->hsync_off_lo) | |
128 | return false; | |
129 | ||
130 | if (a->hsync_pulse_width != b->hsync_pulse_width) | |
131 | return false; | |
132 | ||
133 | if (a->hblank_hi != b->hblank_hi || | |
134 | a->hblank_lo != b->hblank_lo) | |
135 | return false; | |
136 | ||
137 | if (a->vactive_hi != b->vactive_hi || | |
138 | a->vactive_lo != b->vactive_lo) | |
139 | return false; | |
140 | ||
141 | if (a->vsync_off != b->vsync_off) | |
142 | return false; | |
143 | ||
144 | if (a->vsync_pulse_width != b->vsync_pulse_width) | |
145 | return false; | |
146 | ||
147 | if (a->vblank_hi != b->vblank_hi || | |
148 | a->vblank_lo != b->vblank_lo) | |
149 | return false; | |
150 | ||
151 | return true; | |
152 | } | |
153 | ||
154 | static const struct lvds_dvo_timing * | |
155 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, | |
156 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, | |
157 | int index) | |
158 | { | |
159 | /* | |
160 | * the size of fp_timing varies on the different platform. | |
161 | * So calculate the DVO timing relative offset in LVDS data | |
162 | * entry to get the DVO timing entry | |
163 | */ | |
164 | ||
165 | int lfp_data_size = | |
166 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - | |
167 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; | |
168 | int dvo_timing_offset = | |
169 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - | |
170 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; | |
171 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; | |
172 | ||
173 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); | |
174 | } | |
175 | ||
b0354385 TI |
176 | /* get lvds_fp_timing entry |
177 | * this function may return NULL if the corresponding entry is invalid | |
178 | */ | |
179 | static const struct lvds_fp_timing * | |
180 | get_lvds_fp_timing(const struct bdb_header *bdb, | |
181 | const struct bdb_lvds_lfp_data *data, | |
182 | const struct bdb_lvds_lfp_data_ptrs *ptrs, | |
183 | int index) | |
184 | { | |
185 | size_t data_ofs = (const u8 *)data - (const u8 *)bdb; | |
186 | u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ | |
187 | size_t ofs; | |
188 | ||
189 | if (index >= ARRAY_SIZE(ptrs->ptr)) | |
190 | return NULL; | |
191 | ofs = ptrs->ptr[index].fp_timing_offset; | |
192 | if (ofs < data_ofs || | |
193 | ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) | |
194 | return NULL; | |
195 | return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); | |
196 | } | |
197 | ||
88631706 ML |
198 | /* Try to find integrated panel data */ |
199 | static void | |
200 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, | |
201 | struct bdb_header *bdb) | |
79e53945 | 202 | { |
99834ea4 CW |
203 | const struct bdb_lvds_options *lvds_options; |
204 | const struct bdb_lvds_lfp_data *lvds_lfp_data; | |
205 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; | |
206 | const struct lvds_dvo_timing *panel_dvo_timing; | |
b0354385 | 207 | const struct lvds_fp_timing *fp_timing; |
79e53945 | 208 | struct drm_display_mode *panel_fixed_mode; |
99834ea4 | 209 | int i, downclock; |
79e53945 | 210 | |
79e53945 JB |
211 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
212 | if (!lvds_options) | |
213 | return; | |
214 | ||
41aa3448 | 215 | dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; |
79e53945 JB |
216 | if (lvds_options->panel_type == 0xff) |
217 | return; | |
6a04002b | 218 | |
500a8cc4 | 219 | panel_type = lvds_options->panel_type; |
79e53945 JB |
220 | |
221 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); | |
222 | if (!lvds_lfp_data) | |
223 | return; | |
224 | ||
1b16de0b JB |
225 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
226 | if (!lvds_lfp_data_ptrs) | |
227 | return; | |
228 | ||
41aa3448 | 229 | dev_priv->vbt.lvds_vbt = 1; |
79e53945 | 230 | |
99834ea4 CW |
231 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
232 | lvds_lfp_data_ptrs, | |
233 | lvds_options->panel_type); | |
79e53945 | 234 | |
9a298b2a | 235 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
6edc3242 CW |
236 | if (!panel_fixed_mode) |
237 | return; | |
79e53945 | 238 | |
99834ea4 | 239 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
79e53945 | 240 | |
41aa3448 | 241 | dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 242 | |
28c97730 | 243 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
88631706 | 244 | drm_mode_debug_printmodeline(panel_fixed_mode); |
37df9673 | 245 | |
d1fcea6a | 246 | /* |
99834ea4 CW |
247 | * Iterate over the LVDS panel timing info to find the lowest clock |
248 | * for the native resolution. | |
d1fcea6a | 249 | */ |
99834ea4 | 250 | downclock = panel_dvo_timing->clock; |
d1fcea6a | 251 | for (i = 0; i < 16; i++) { |
99834ea4 CW |
252 | const struct lvds_dvo_timing *dvo_timing; |
253 | ||
254 | dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, | |
255 | lvds_lfp_data_ptrs, | |
256 | i); | |
257 | if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) && | |
258 | dvo_timing->clock < downclock) | |
259 | downclock = dvo_timing->clock; | |
d1fcea6a | 260 | } |
99834ea4 | 261 | |
d330a953 | 262 | if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) { |
d1fcea6a | 263 | dev_priv->lvds_downclock_avail = 1; |
99834ea4 | 264 | dev_priv->lvds_downclock = downclock * 10; |
bbb0aef5 JP |
265 | DRM_DEBUG_KMS("LVDS downclock is found in VBT. " |
266 | "Normal Clock %dKHz, downclock %dKHz\n", | |
99834ea4 | 267 | panel_fixed_mode->clock, 10*downclock); |
d1fcea6a | 268 | } |
b0354385 TI |
269 | |
270 | fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, | |
271 | lvds_lfp_data_ptrs, | |
272 | lvds_options->panel_type); | |
273 | if (fp_timing) { | |
274 | /* check the resolution, just to be sure */ | |
275 | if (fp_timing->x_res == panel_fixed_mode->hdisplay && | |
276 | fp_timing->y_res == panel_fixed_mode->vdisplay) { | |
41aa3448 | 277 | dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; |
b0354385 | 278 | DRM_DEBUG_KMS("VBT initial LVDS value %x\n", |
41aa3448 | 279 | dev_priv->vbt.bios_lvds_val); |
b0354385 TI |
280 | } |
281 | } | |
88631706 ML |
282 | } |
283 | ||
f00076d2 JN |
284 | static void |
285 | parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
286 | { | |
287 | const struct bdb_lfp_backlight_data *backlight_data; | |
288 | const struct bdb_lfp_backlight_data_entry *entry; | |
289 | ||
39fbc9c8 JN |
290 | /* Err to enabling backlight if no backlight block. */ |
291 | dev_priv->vbt.backlight.present = true; | |
292 | ||
f00076d2 JN |
293 | backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); |
294 | if (!backlight_data) | |
295 | return; | |
296 | ||
297 | if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { | |
298 | DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", | |
299 | backlight_data->entry_size); | |
300 | return; | |
301 | } | |
302 | ||
303 | entry = &backlight_data->data[panel_type]; | |
304 | ||
39fbc9c8 JN |
305 | dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; |
306 | if (!dev_priv->vbt.backlight.present) { | |
307 | DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", | |
308 | entry->type); | |
309 | return; | |
310 | } | |
311 | ||
f00076d2 JN |
312 | dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; |
313 | dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; | |
314 | DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " | |
315 | "active %s, min brightness %u, level %u\n", | |
316 | dev_priv->vbt.backlight.pwm_freq_hz, | |
317 | dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", | |
318 | entry->min_brightness, | |
319 | backlight_data->level[panel_type]); | |
320 | } | |
321 | ||
88631706 ML |
322 | /* Try to find sdvo panel data */ |
323 | static void | |
324 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, | |
325 | struct bdb_header *bdb) | |
326 | { | |
88631706 ML |
327 | struct lvds_dvo_timing *dvo_timing; |
328 | struct drm_display_mode *panel_fixed_mode; | |
5a1e5b6c | 329 | int index; |
79e53945 | 330 | |
d330a953 | 331 | index = i915.vbt_sdvo_panel_type; |
c10e408a MF |
332 | if (index == -2) { |
333 | DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); | |
334 | return; | |
335 | } | |
336 | ||
5a1e5b6c CW |
337 | if (index == -1) { |
338 | struct bdb_sdvo_lvds_options *sdvo_lvds_options; | |
339 | ||
340 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); | |
341 | if (!sdvo_lvds_options) | |
342 | return; | |
343 | ||
344 | index = sdvo_lvds_options->panel_type; | |
345 | } | |
88631706 ML |
346 | |
347 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); | |
348 | if (!dvo_timing) | |
349 | return; | |
350 | ||
9a298b2a | 351 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
88631706 ML |
352 | if (!panel_fixed_mode) |
353 | return; | |
354 | ||
5a1e5b6c | 355 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
88631706 | 356 | |
41aa3448 | 357 | dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 358 | |
5a1e5b6c CW |
359 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
360 | drm_mode_debug_printmodeline(panel_fixed_mode); | |
79e53945 JB |
361 | } |
362 | ||
9a4114ff BF |
363 | static int intel_bios_ssc_frequency(struct drm_device *dev, |
364 | bool alternate) | |
365 | { | |
366 | switch (INTEL_INFO(dev)->gen) { | |
367 | case 2: | |
e91e941b | 368 | return alternate ? 66667 : 48000; |
9a4114ff BF |
369 | case 3: |
370 | case 4: | |
e91e941b | 371 | return alternate ? 100000 : 96000; |
9a4114ff | 372 | default: |
e91e941b | 373 | return alternate ? 100000 : 120000; |
9a4114ff BF |
374 | } |
375 | } | |
376 | ||
79e53945 JB |
377 | static void |
378 | parse_general_features(struct drm_i915_private *dev_priv, | |
379 | struct bdb_header *bdb) | |
380 | { | |
bad720ff | 381 | struct drm_device *dev = dev_priv->dev; |
79e53945 JB |
382 | struct bdb_general_features *general; |
383 | ||
79e53945 JB |
384 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
385 | if (general) { | |
41aa3448 RV |
386 | dev_priv->vbt.int_tv_support = general->int_tv_support; |
387 | dev_priv->vbt.int_crt_support = general->int_crt_support; | |
388 | dev_priv->vbt.lvds_use_ssc = general->enable_ssc; | |
389 | dev_priv->vbt.lvds_ssc_freq = | |
9a4114ff | 390 | intel_bios_ssc_frequency(dev, general->ssc_freq); |
41aa3448 RV |
391 | dev_priv->vbt.display_clock_mode = general->display_clock_mode; |
392 | dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; | |
3f704fa2 | 393 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", |
41aa3448 RV |
394 | dev_priv->vbt.int_tv_support, |
395 | dev_priv->vbt.int_crt_support, | |
396 | dev_priv->vbt.lvds_use_ssc, | |
397 | dev_priv->vbt.lvds_ssc_freq, | |
398 | dev_priv->vbt.display_clock_mode, | |
399 | dev_priv->vbt.fdi_rx_polarity_inverted); | |
79e53945 JB |
400 | } |
401 | } | |
402 | ||
db545019 DMEA |
403 | static void |
404 | parse_general_definitions(struct drm_i915_private *dev_priv, | |
405 | struct bdb_header *bdb) | |
406 | { | |
407 | struct bdb_general_definitions *general; | |
db545019 | 408 | |
db545019 DMEA |
409 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
410 | if (general) { | |
411 | u16 block_size = get_blocksize(general); | |
412 | if (block_size >= sizeof(*general)) { | |
413 | int bus_pin = general->crt_ddc_gmbus_pin; | |
28c97730 | 414 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
3bd7d909 | 415 | if (intel_gmbus_is_port_valid(bus_pin)) |
41aa3448 | 416 | dev_priv->vbt.crt_ddc_pin = bus_pin; |
db545019 | 417 | } else { |
28c97730 | 418 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
3bd7d909 | 419 | block_size); |
db545019 DMEA |
420 | } |
421 | } | |
422 | } | |
423 | ||
9b9d172d | 424 | static void |
425 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |
44834a67 | 426 | struct bdb_header *bdb) |
9b9d172d | 427 | { |
428 | struct sdvo_device_mapping *p_mapping; | |
429 | struct bdb_general_definitions *p_defs; | |
768f69c9 | 430 | union child_device_config *p_child; |
9b9d172d | 431 | int i, child_device_num, count; |
db545019 | 432 | u16 block_size; |
9b9d172d | 433 | |
434 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); | |
435 | if (!p_defs) { | |
44834a67 | 436 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
9b9d172d | 437 | return; |
438 | } | |
439 | /* judge whether the size of child device meets the requirements. | |
440 | * If the child device size obtained from general definition block | |
441 | * is different with sizeof(struct child_device_config), skip the | |
442 | * parsing of sdvo device info | |
443 | */ | |
444 | if (p_defs->child_dev_size != sizeof(*p_child)) { | |
445 | /* different child dev size . Ignore it */ | |
28c97730 | 446 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
9b9d172d | 447 | return; |
448 | } | |
449 | /* get the block size of general definitions */ | |
db545019 | 450 | block_size = get_blocksize(p_defs); |
9b9d172d | 451 | /* get the number of child device */ |
452 | child_device_num = (block_size - sizeof(*p_defs)) / | |
453 | sizeof(*p_child); | |
454 | count = 0; | |
455 | for (i = 0; i < child_device_num; i++) { | |
456 | p_child = &(p_defs->devices[i]); | |
768f69c9 | 457 | if (!p_child->old.device_type) { |
9b9d172d | 458 | /* skip the device block if device type is invalid */ |
459 | continue; | |
460 | } | |
768f69c9 PZ |
461 | if (p_child->old.slave_addr != SLAVE_ADDR1 && |
462 | p_child->old.slave_addr != SLAVE_ADDR2) { | |
9b9d172d | 463 | /* |
464 | * If the slave address is neither 0x70 nor 0x72, | |
465 | * it is not a SDVO device. Skip it. | |
466 | */ | |
467 | continue; | |
468 | } | |
768f69c9 PZ |
469 | if (p_child->old.dvo_port != DEVICE_PORT_DVOB && |
470 | p_child->old.dvo_port != DEVICE_PORT_DVOC) { | |
9b9d172d | 471 | /* skip the incorrect SDVO port */ |
0206e353 | 472 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
9b9d172d | 473 | continue; |
474 | } | |
28c97730 ZY |
475 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
476 | " %s port\n", | |
768f69c9 PZ |
477 | p_child->old.slave_addr, |
478 | (p_child->old.dvo_port == DEVICE_PORT_DVOB) ? | |
9b9d172d | 479 | "SDVOB" : "SDVOC"); |
768f69c9 | 480 | p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]); |
9b9d172d | 481 | if (!p_mapping->initialized) { |
768f69c9 PZ |
482 | p_mapping->dvo_port = p_child->old.dvo_port; |
483 | p_mapping->slave_addr = p_child->old.slave_addr; | |
484 | p_mapping->dvo_wiring = p_child->old.dvo_wiring; | |
485 | p_mapping->ddc_pin = p_child->old.ddc_pin; | |
486 | p_mapping->i2c_pin = p_child->old.i2c_pin; | |
9b9d172d | 487 | p_mapping->initialized = 1; |
46eb3036 | 488 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
e957d772 CW |
489 | p_mapping->dvo_port, |
490 | p_mapping->slave_addr, | |
491 | p_mapping->dvo_wiring, | |
492 | p_mapping->ddc_pin, | |
46eb3036 | 493 | p_mapping->i2c_pin); |
9b9d172d | 494 | } else { |
28c97730 | 495 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
9b9d172d | 496 | "two SDVO device.\n"); |
497 | } | |
768f69c9 | 498 | if (p_child->old.slave2_addr) { |
9b9d172d | 499 | /* Maybe this is a SDVO device with multiple inputs */ |
500 | /* And the mapping info is not added */ | |
28c97730 ZY |
501 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
502 | " is a SDVO device with multiple inputs.\n"); | |
9b9d172d | 503 | } |
504 | count++; | |
505 | } | |
506 | ||
507 | if (!count) { | |
508 | /* No SDVO device info is found */ | |
28c97730 | 509 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
9b9d172d | 510 | } |
511 | return; | |
512 | } | |
32f9d658 ZW |
513 | |
514 | static void | |
515 | parse_driver_features(struct drm_i915_private *dev_priv, | |
516 | struct bdb_header *bdb) | |
517 | { | |
32f9d658 ZW |
518 | struct bdb_driver_features *driver; |
519 | ||
32f9d658 | 520 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
652c393a JB |
521 | if (!driver) |
522 | return; | |
523 | ||
6fca55b1 | 524 | if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) |
41aa3448 | 525 | dev_priv->vbt.edp_support = 1; |
652c393a | 526 | |
5ceb0f9b | 527 | if (driver->dual_frequency) |
652c393a | 528 | dev_priv->render_reclock_avail = true; |
32f9d658 ZW |
529 | } |
530 | ||
500a8cc4 ZW |
531 | static void |
532 | parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
533 | { | |
534 | struct bdb_edp *edp; | |
9f0e7ff4 JB |
535 | struct edp_power_seq *edp_pps; |
536 | struct edp_link_params *edp_link_params; | |
500a8cc4 ZW |
537 | |
538 | edp = find_section(bdb, BDB_EDP); | |
539 | if (!edp) { | |
6fca55b1 | 540 | if (dev_priv->vbt.edp_support) |
9a30a61f | 541 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); |
500a8cc4 ZW |
542 | return; |
543 | } | |
544 | ||
545 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { | |
546 | case EDP_18BPP: | |
41aa3448 | 547 | dev_priv->vbt.edp_bpp = 18; |
500a8cc4 ZW |
548 | break; |
549 | case EDP_24BPP: | |
41aa3448 | 550 | dev_priv->vbt.edp_bpp = 24; |
500a8cc4 ZW |
551 | break; |
552 | case EDP_30BPP: | |
41aa3448 | 553 | dev_priv->vbt.edp_bpp = 30; |
500a8cc4 ZW |
554 | break; |
555 | } | |
5ceb0f9b | 556 | |
9f0e7ff4 JB |
557 | /* Get the eDP sequencing and link info */ |
558 | edp_pps = &edp->power_seqs[panel_type]; | |
559 | edp_link_params = &edp->link_params[panel_type]; | |
5ceb0f9b | 560 | |
41aa3448 | 561 | dev_priv->vbt.edp_pps = *edp_pps; |
5ceb0f9b | 562 | |
41aa3448 | 563 | dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 : |
9f0e7ff4 JB |
564 | DP_LINK_BW_1_62; |
565 | switch (edp_link_params->lanes) { | |
566 | case 0: | |
41aa3448 | 567 | dev_priv->vbt.edp_lanes = 1; |
9f0e7ff4 JB |
568 | break; |
569 | case 1: | |
41aa3448 | 570 | dev_priv->vbt.edp_lanes = 2; |
9f0e7ff4 JB |
571 | break; |
572 | case 3: | |
573 | default: | |
41aa3448 | 574 | dev_priv->vbt.edp_lanes = 4; |
9f0e7ff4 JB |
575 | break; |
576 | } | |
577 | switch (edp_link_params->preemphasis) { | |
578 | case 0: | |
41aa3448 | 579 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0; |
9f0e7ff4 JB |
580 | break; |
581 | case 1: | |
41aa3448 | 582 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; |
9f0e7ff4 JB |
583 | break; |
584 | case 2: | |
41aa3448 | 585 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6; |
9f0e7ff4 JB |
586 | break; |
587 | case 3: | |
41aa3448 | 588 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; |
9f0e7ff4 JB |
589 | break; |
590 | } | |
591 | switch (edp_link_params->vswing) { | |
592 | case 0: | |
41aa3448 | 593 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400; |
9f0e7ff4 JB |
594 | break; |
595 | case 1: | |
41aa3448 | 596 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600; |
9f0e7ff4 JB |
597 | break; |
598 | case 2: | |
41aa3448 | 599 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800; |
9f0e7ff4 JB |
600 | break; |
601 | case 3: | |
41aa3448 | 602 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200; |
9f0e7ff4 JB |
603 | break; |
604 | } | |
500a8cc4 ZW |
605 | } |
606 | ||
d17c5443 SK |
607 | static void |
608 | parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |
609 | { | |
610 | struct bdb_mipi *mipi; | |
611 | ||
ea9a6baf | 612 | mipi = find_section(bdb, BDB_MIPI_CONFIG); |
d17c5443 SK |
613 | if (!mipi) { |
614 | DRM_DEBUG_KMS("No MIPI BDB found"); | |
615 | return; | |
616 | } | |
617 | ||
618 | /* XXX: add more info */ | |
ea9a6baf | 619 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; |
d17c5443 SK |
620 | } |
621 | ||
6acab15a PZ |
622 | static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, |
623 | struct bdb_header *bdb) | |
624 | { | |
625 | union child_device_config *it, *child = NULL; | |
626 | struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; | |
627 | uint8_t hdmi_level_shift; | |
628 | int i, j; | |
554d6af5 | 629 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; |
6bf19e7c | 630 | uint8_t aux_channel; |
6acab15a PZ |
631 | /* Each DDI port can have more than one value on the "DVO Port" field, |
632 | * so look for all the possible values for each port and abort if more | |
633 | * than one is found. */ | |
634 | int dvo_ports[][2] = { | |
635 | {DVO_PORT_HDMIA, DVO_PORT_DPA}, | |
636 | {DVO_PORT_HDMIB, DVO_PORT_DPB}, | |
637 | {DVO_PORT_HDMIC, DVO_PORT_DPC}, | |
638 | {DVO_PORT_HDMID, DVO_PORT_DPD}, | |
639 | {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ }, | |
640 | }; | |
641 | ||
642 | /* Find the child device to use, abort if more than one found. */ | |
643 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
644 | it = dev_priv->vbt.child_dev + i; | |
645 | ||
646 | for (j = 0; j < 2; j++) { | |
647 | if (dvo_ports[port][j] == -1) | |
648 | break; | |
649 | ||
650 | if (it->common.dvo_port == dvo_ports[port][j]) { | |
651 | if (child) { | |
652 | DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n", | |
653 | port_name(port)); | |
654 | return; | |
655 | } | |
656 | child = it; | |
657 | } | |
658 | } | |
659 | } | |
660 | if (!child) | |
661 | return; | |
662 | ||
6bf19e7c PZ |
663 | aux_channel = child->raw[25]; |
664 | ||
78eb06c3 VS |
665 | is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
666 | is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; | |
667 | is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT; | |
668 | is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; | |
669 | is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); | |
554d6af5 | 670 | |
311a2094 PZ |
671 | info->supports_dvi = is_dvi; |
672 | info->supports_hdmi = is_hdmi; | |
673 | info->supports_dp = is_dp; | |
674 | ||
554d6af5 PZ |
675 | DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", |
676 | port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); | |
677 | ||
678 | if (is_edp && is_dvi) | |
679 | DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", | |
680 | port_name(port)); | |
681 | if (is_crt && port != PORT_E) | |
682 | DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); | |
683 | if (is_crt && (is_dvi || is_dp)) | |
684 | DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", | |
685 | port_name(port)); | |
686 | if (is_dvi && (port == PORT_A || port == PORT_E)) | |
687 | DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port)); | |
688 | if (!is_dvi && !is_dp && !is_crt) | |
689 | DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", | |
690 | port_name(port)); | |
691 | if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) | |
692 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); | |
6bf19e7c PZ |
693 | |
694 | if (is_dvi) { | |
695 | if (child->common.ddc_pin == 0x05 && port != PORT_B) | |
696 | DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); | |
697 | if (child->common.ddc_pin == 0x04 && port != PORT_C) | |
698 | DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); | |
699 | if (child->common.ddc_pin == 0x06 && port != PORT_D) | |
700 | DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); | |
701 | } | |
702 | ||
703 | if (is_dp) { | |
704 | if (aux_channel == 0x40 && port != PORT_A) | |
705 | DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); | |
706 | if (aux_channel == 0x10 && port != PORT_B) | |
707 | DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); | |
708 | if (aux_channel == 0x20 && port != PORT_C) | |
709 | DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); | |
710 | if (aux_channel == 0x30 && port != PORT_D) | |
711 | DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); | |
712 | } | |
713 | ||
6acab15a PZ |
714 | if (bdb->version >= 158) { |
715 | /* The VBT HDMI level shift values match the table we have. */ | |
716 | hdmi_level_shift = child->raw[7] & 0xF; | |
717 | if (hdmi_level_shift < 0xC) { | |
718 | DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", | |
719 | port_name(port), | |
720 | hdmi_level_shift); | |
721 | info->hdmi_level_shift = hdmi_level_shift; | |
722 | } | |
723 | } | |
724 | } | |
725 | ||
726 | static void parse_ddi_ports(struct drm_i915_private *dev_priv, | |
727 | struct bdb_header *bdb) | |
728 | { | |
729 | struct drm_device *dev = dev_priv->dev; | |
730 | enum port port; | |
731 | ||
732 | if (!HAS_DDI(dev)) | |
733 | return; | |
734 | ||
735 | if (!dev_priv->vbt.child_dev_num) | |
736 | return; | |
737 | ||
738 | if (bdb->version < 155) | |
739 | return; | |
740 | ||
741 | for (port = PORT_A; port < I915_MAX_PORTS; port++) | |
742 | parse_ddi_port(dev_priv, port, bdb); | |
743 | } | |
744 | ||
6363ee6f ZY |
745 | static void |
746 | parse_device_mapping(struct drm_i915_private *dev_priv, | |
747 | struct bdb_header *bdb) | |
748 | { | |
749 | struct bdb_general_definitions *p_defs; | |
768f69c9 | 750 | union child_device_config *p_child, *child_dev_ptr; |
6363ee6f ZY |
751 | int i, child_device_num, count; |
752 | u16 block_size; | |
753 | ||
754 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); | |
755 | if (!p_defs) { | |
44834a67 | 756 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
6363ee6f ZY |
757 | return; |
758 | } | |
759 | /* judge whether the size of child device meets the requirements. | |
760 | * If the child device size obtained from general definition block | |
761 | * is different with sizeof(struct child_device_config), skip the | |
762 | * parsing of sdvo device info | |
763 | */ | |
764 | if (p_defs->child_dev_size != sizeof(*p_child)) { | |
765 | /* different child dev size . Ignore it */ | |
766 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); | |
767 | return; | |
768 | } | |
769 | /* get the block size of general definitions */ | |
770 | block_size = get_blocksize(p_defs); | |
771 | /* get the number of child device */ | |
772 | child_device_num = (block_size - sizeof(*p_defs)) / | |
773 | sizeof(*p_child); | |
774 | count = 0; | |
775 | /* get the number of child device that is present */ | |
776 | for (i = 0; i < child_device_num; i++) { | |
777 | p_child = &(p_defs->devices[i]); | |
768f69c9 | 778 | if (!p_child->common.device_type) { |
6363ee6f ZY |
779 | /* skip the device block if device type is invalid */ |
780 | continue; | |
781 | } | |
782 | count++; | |
783 | } | |
784 | if (!count) { | |
0206e353 | 785 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
6363ee6f ZY |
786 | return; |
787 | } | |
41aa3448 RV |
788 | dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); |
789 | if (!dev_priv->vbt.child_dev) { | |
6363ee6f ZY |
790 | DRM_DEBUG_KMS("No memory space for child device\n"); |
791 | return; | |
792 | } | |
793 | ||
41aa3448 | 794 | dev_priv->vbt.child_dev_num = count; |
6363ee6f ZY |
795 | count = 0; |
796 | for (i = 0; i < child_device_num; i++) { | |
797 | p_child = &(p_defs->devices[i]); | |
768f69c9 | 798 | if (!p_child->common.device_type) { |
6363ee6f ZY |
799 | /* skip the device block if device type is invalid */ |
800 | continue; | |
801 | } | |
41aa3448 | 802 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
6363ee6f ZY |
803 | count++; |
804 | memcpy((void *)child_dev_ptr, (void *)p_child, | |
805 | sizeof(*p_child)); | |
806 | } | |
807 | return; | |
808 | } | |
44834a67 | 809 | |
6a04002b SQ |
810 | static void |
811 | init_vbt_defaults(struct drm_i915_private *dev_priv) | |
812 | { | |
9a4114ff | 813 | struct drm_device *dev = dev_priv->dev; |
6acab15a | 814 | enum port port; |
9a4114ff | 815 | |
41aa3448 | 816 | dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC; |
6a04002b SQ |
817 | |
818 | /* LFP panel data */ | |
41aa3448 RV |
819 | dev_priv->vbt.lvds_dither = 1; |
820 | dev_priv->vbt.lvds_vbt = 0; | |
6a04002b SQ |
821 | |
822 | /* SDVO panel data */ | |
41aa3448 | 823 | dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; |
6a04002b SQ |
824 | |
825 | /* general features */ | |
41aa3448 RV |
826 | dev_priv->vbt.int_tv_support = 1; |
827 | dev_priv->vbt.int_crt_support = 1; | |
9a4114ff BF |
828 | |
829 | /* Default to using SSC */ | |
41aa3448 | 830 | dev_priv->vbt.lvds_use_ssc = 1; |
f69e5156 DL |
831 | /* |
832 | * Core/SandyBridge/IvyBridge use alternative (120MHz) reference | |
833 | * clock for LVDS. | |
834 | */ | |
835 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, | |
836 | !HAS_PCH_SPLIT(dev)); | |
e91e941b | 837 | DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); |
6acab15a PZ |
838 | |
839 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { | |
311a2094 PZ |
840 | struct ddi_vbt_port_info *info = |
841 | &dev_priv->vbt.ddi_port_info[port]; | |
842 | ||
6acab15a | 843 | /* Recommended BSpec default: 800mV 0dB. */ |
311a2094 PZ |
844 | info->hdmi_level_shift = 6; |
845 | ||
846 | info->supports_dvi = (port != PORT_A && port != PORT_E); | |
847 | info->supports_hdmi = info->supports_dvi; | |
848 | info->supports_dp = (port != PORT_E); | |
6acab15a | 849 | } |
6a04002b SQ |
850 | } |
851 | ||
25e341cf DV |
852 | static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id) |
853 | { | |
854 | DRM_DEBUG_KMS("Falling back to manually reading VBT from " | |
855 | "VBIOS ROM for %s\n", | |
856 | id->ident); | |
857 | return 1; | |
858 | } | |
859 | ||
860 | static const struct dmi_system_id intel_no_opregion_vbt[] = { | |
861 | { | |
862 | .callback = intel_no_opregion_vbt_callback, | |
863 | .ident = "ThinkCentre A57", | |
864 | .matches = { | |
865 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
866 | DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), | |
867 | }, | |
868 | }, | |
869 | { } | |
870 | }; | |
871 | ||
79e53945 | 872 | /** |
6d139a87 | 873 | * intel_parse_bios - find VBT and initialize settings from the BIOS |
79e53945 JB |
874 | * @dev: DRM device |
875 | * | |
876 | * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers | |
877 | * to appropriate values. | |
878 | * | |
79e53945 JB |
879 | * Returns 0 on success, nonzero on failure. |
880 | */ | |
0317c6ce | 881 | int |
6d139a87 | 882 | intel_parse_bios(struct drm_device *dev) |
79e53945 JB |
883 | { |
884 | struct drm_i915_private *dev_priv = dev->dev_private; | |
885 | struct pci_dev *pdev = dev->pdev; | |
44834a67 CW |
886 | struct bdb_header *bdb = NULL; |
887 | u8 __iomem *bios = NULL; | |
888 | ||
ab5c608b BW |
889 | if (HAS_PCH_NOP(dev)) |
890 | return -ENODEV; | |
891 | ||
6a04002b | 892 | init_vbt_defaults(dev_priv); |
f899fc64 | 893 | |
44834a67 | 894 | /* XXX Should this validation be moved to intel_opregion.c? */ |
25e341cf | 895 | if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) { |
44834a67 CW |
896 | struct vbt_header *vbt = dev_priv->opregion.vbt; |
897 | if (memcmp(vbt->signature, "$VBT", 4) == 0) { | |
562396b9 | 898 | DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n", |
44834a67 CW |
899 | vbt->signature); |
900 | bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset); | |
901 | } else | |
902 | dev_priv->opregion.vbt = NULL; | |
79e53945 JB |
903 | } |
904 | ||
44834a67 CW |
905 | if (bdb == NULL) { |
906 | struct vbt_header *vbt = NULL; | |
907 | size_t size; | |
908 | int i; | |
79e53945 | 909 | |
44834a67 CW |
910 | bios = pci_map_rom(pdev, &size); |
911 | if (!bios) | |
912 | return -1; | |
913 | ||
914 | /* Scour memory looking for the VBT signature */ | |
915 | for (i = 0; i + 4 < size; i++) { | |
916 | if (!memcmp(bios + i, "$VBT", 4)) { | |
917 | vbt = (struct vbt_header *)(bios + i); | |
918 | break; | |
919 | } | |
920 | } | |
921 | ||
922 | if (!vbt) { | |
bd45545f | 923 | DRM_DEBUG_DRIVER("VBT signature missing\n"); |
44834a67 CW |
924 | pci_unmap_rom(pdev, bios); |
925 | return -1; | |
926 | } | |
927 | ||
928 | bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset); | |
929 | } | |
79e53945 JB |
930 | |
931 | /* Grab useful general definitions */ | |
932 | parse_general_features(dev_priv, bdb); | |
db545019 | 933 | parse_general_definitions(dev_priv, bdb); |
88631706 | 934 | parse_lfp_panel_data(dev_priv, bdb); |
f00076d2 | 935 | parse_lfp_backlight(dev_priv, bdb); |
88631706 | 936 | parse_sdvo_panel_data(dev_priv, bdb); |
9b9d172d | 937 | parse_sdvo_device_mapping(dev_priv, bdb); |
6363ee6f | 938 | parse_device_mapping(dev_priv, bdb); |
32f9d658 | 939 | parse_driver_features(dev_priv, bdb); |
500a8cc4 | 940 | parse_edp(dev_priv, bdb); |
d17c5443 | 941 | parse_mipi(dev_priv, bdb); |
6acab15a | 942 | parse_ddi_ports(dev_priv, bdb); |
32f9d658 | 943 | |
44834a67 CW |
944 | if (bios) |
945 | pci_unmap_rom(pdev, bios); | |
79e53945 JB |
946 | |
947 | return 0; | |
948 | } | |
6d139a87 BF |
949 | |
950 | /* Ensure that vital registers have been initialised, even if the BIOS | |
951 | * is absent or just failing to do its job. | |
952 | */ | |
953 | void intel_setup_bios(struct drm_device *dev) | |
954 | { | |
955 | struct drm_i915_private *dev_priv = dev->dev_private; | |
956 | ||
957 | /* Set the Panel Power On/Off timings if uninitialized. */ | |
42d42e7e DL |
958 | if (!HAS_PCH_SPLIT(dev) && |
959 | I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) { | |
6d139a87 BF |
960 | /* Set T2 to 40ms and T5 to 200ms */ |
961 | I915_WRITE(PP_ON_DELAYS, 0x019007d0); | |
962 | ||
963 | /* Set T3 to 35ms and Tx to 200ms */ | |
964 | I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); | |
965 | } | |
966 | } |