Merge branch 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
9bc35499
AJ
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
88631706
ML
142 /* Some VBTs have bogus h/vtotal values */
143 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
144 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
145 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
146 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
147
148 drm_mode_set_name(panel_fixed_mode);
149}
150
99834ea4
CW
151static const struct lvds_dvo_timing *
152get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
153 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
154 int index)
155{
156 /*
157 * the size of fp_timing varies on the different platform.
158 * So calculate the DVO timing relative offset in LVDS data
159 * entry to get the DVO timing entry
160 */
161
162 int lfp_data_size =
163 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
164 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
165 int dvo_timing_offset =
166 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
168 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
169
170 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
171}
172
b0354385
TI
173/* get lvds_fp_timing entry
174 * this function may return NULL if the corresponding entry is invalid
175 */
176static const struct lvds_fp_timing *
177get_lvds_fp_timing(const struct bdb_header *bdb,
178 const struct bdb_lvds_lfp_data *data,
179 const struct bdb_lvds_lfp_data_ptrs *ptrs,
180 int index)
181{
182 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
183 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
184 size_t ofs;
185
186 if (index >= ARRAY_SIZE(ptrs->ptr))
187 return NULL;
188 ofs = ptrs->ptr[index].fp_timing_offset;
189 if (ofs < data_ofs ||
190 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
191 return NULL;
192 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
193}
194
88631706
ML
195/* Try to find integrated panel data */
196static void
197parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 198 const struct bdb_header *bdb)
79e53945 199{
99834ea4
CW
200 const struct bdb_lvds_options *lvds_options;
201 const struct bdb_lvds_lfp_data *lvds_lfp_data;
202 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
203 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 204 const struct lvds_fp_timing *fp_timing;
79e53945 205 struct drm_display_mode *panel_fixed_mode;
3e845c7a 206 int panel_type;
c329a4ec 207 int drrs_mode;
a0562819 208 int ret;
79e53945 209
79e53945
JB
210 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
211 if (!lvds_options)
212 return;
213
41aa3448 214 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819
VS
215
216 ret = intel_opregion_get_panel_type(dev_priv->dev);
217 if (ret >= 0) {
218 WARN_ON(ret > 0xf);
219 panel_type = ret;
220 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
221 } else {
222 if (lvds_options->panel_type > 0xf) {
223 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
224 lvds_options->panel_type);
225 return;
226 }
227 panel_type = lvds_options->panel_type;
228 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 229 }
6a04002b 230
3e845c7a 231 dev_priv->vbt.panel_type = panel_type;
79e53945 232
83a7280e
PB
233 drrs_mode = (lvds_options->dps_panel_type_bits
234 >> (panel_type * 2)) & MODE_MASK;
235 /*
236 * VBT has static DRRS = 0 and seamless DRRS = 2.
237 * The below piece of code is required to adjust vbt.drrs_type
238 * to match the enum drrs_support_type.
239 */
240 switch (drrs_mode) {
241 case 0:
242 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
243 DRM_DEBUG_KMS("DRRS supported mode is static\n");
244 break;
245 case 2:
246 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
247 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
248 break;
249 default:
250 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
251 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
252 break;
253 }
254
79e53945
JB
255 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
256 if (!lvds_lfp_data)
257 return;
258
1b16de0b
JB
259 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
260 if (!lvds_lfp_data_ptrs)
261 return;
262
41aa3448 263 dev_priv->vbt.lvds_vbt = 1;
79e53945 264
99834ea4
CW
265 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
266 lvds_lfp_data_ptrs,
3e845c7a 267 panel_type);
79e53945 268
9a298b2a 269 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
270 if (!panel_fixed_mode)
271 return;
79e53945 272
99834ea4 273 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 274
41aa3448 275 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 276
28c97730 277 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 278 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 279
b0354385
TI
280 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
281 lvds_lfp_data_ptrs,
3e845c7a 282 panel_type);
b0354385
TI
283 if (fp_timing) {
284 /* check the resolution, just to be sure */
285 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
286 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 287 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 288 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 289 dev_priv->vbt.bios_lvds_val);
b0354385
TI
290 }
291 }
88631706
ML
292}
293
f00076d2 294static void
dcb58a40
JN
295parse_lfp_backlight(struct drm_i915_private *dev_priv,
296 const struct bdb_header *bdb)
f00076d2
JN
297{
298 const struct bdb_lfp_backlight_data *backlight_data;
299 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 300 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
301
302 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
303 if (!backlight_data)
304 return;
305
306 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
307 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
308 backlight_data->entry_size);
309 return;
310 }
311
312 entry = &backlight_data->data[panel_type];
313
39fbc9c8
JN
314 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
315 if (!dev_priv->vbt.backlight.present) {
316 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
317 entry->type);
318 return;
319 }
320
f00076d2
JN
321 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
322 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 323 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2
JN
324 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
325 "active %s, min brightness %u, level %u\n",
326 dev_priv->vbt.backlight.pwm_freq_hz,
327 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 328 dev_priv->vbt.backlight.min_brightness,
f00076d2
JN
329 backlight_data->level[panel_type]);
330}
331
88631706
ML
332/* Try to find sdvo panel data */
333static void
334parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 335 const struct bdb_header *bdb)
88631706 336{
e8ef3b4c 337 const struct lvds_dvo_timing *dvo_timing;
88631706 338 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 339 int index;
79e53945 340
d330a953 341 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
342 if (index == -2) {
343 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
344 return;
345 }
346
5a1e5b6c 347 if (index == -1) {
e8ef3b4c 348 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
349
350 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
351 if (!sdvo_lvds_options)
352 return;
353
354 index = sdvo_lvds_options->panel_type;
355 }
88631706
ML
356
357 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
358 if (!dvo_timing)
359 return;
360
9a298b2a 361 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
362 if (!panel_fixed_mode)
363 return;
364
5a1e5b6c 365 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 366
41aa3448 367 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 368
5a1e5b6c
CW
369 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
370 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
371}
372
98f3a1dc 373static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
374 bool alternate)
375{
98f3a1dc 376 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 377 case 2:
e91e941b 378 return alternate ? 66667 : 48000;
9a4114ff
BF
379 case 3:
380 case 4:
e91e941b 381 return alternate ? 100000 : 96000;
9a4114ff 382 default:
e91e941b 383 return alternate ? 100000 : 120000;
9a4114ff
BF
384 }
385}
386
79e53945
JB
387static void
388parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 389 const struct bdb_header *bdb)
79e53945 390{
e8ef3b4c 391 const struct bdb_general_features *general;
79e53945 392
79e53945 393 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
394 if (!general)
395 return;
396
397 dev_priv->vbt.int_tv_support = general->int_tv_support;
398 /* int_crt_support can't be trusted on earlier platforms */
399 if (bdb->version >= 155 &&
400 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
401 dev_priv->vbt.int_crt_support = general->int_crt_support;
402 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
403 dev_priv->vbt.lvds_ssc_freq =
404 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
405 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
406 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
407 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
408 dev_priv->vbt.int_tv_support,
409 dev_priv->vbt.int_crt_support,
410 dev_priv->vbt.lvds_use_ssc,
411 dev_priv->vbt.lvds_ssc_freq,
412 dev_priv->vbt.display_clock_mode,
413 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
414}
415
db545019
DMEA
416static void
417parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 418 const struct bdb_header *bdb)
db545019 419{
e8ef3b4c 420 const struct bdb_general_definitions *general;
db545019 421
db545019
DMEA
422 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
423 if (general) {
424 u16 block_size = get_blocksize(general);
425 if (block_size >= sizeof(*general)) {
426 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 427 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 428 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 429 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 430 } else {
28c97730 431 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 432 block_size);
db545019
DMEA
433 }
434 }
435}
436
e8ef3b4c
JN
437static const union child_device_config *
438child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 439{
e8ef3b4c 440 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
441}
442
9b9d172d 443static void
444parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 445 const struct bdb_header *bdb)
9b9d172d 446{
447 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 448 const struct bdb_general_definitions *p_defs;
6cc38aca 449 const struct old_child_dev_config *child; /* legacy */
9b9d172d 450 int i, child_device_num, count;
db545019 451 u16 block_size;
9b9d172d 452
453 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
454 if (!p_defs) {
44834a67 455 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 456 return;
457 }
6cc38aca
JN
458
459 /*
460 * Only parse SDVO mappings when the general definitions block child
461 * device size matches that of the *legacy* child device config
462 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 463 */
6cc38aca
JN
464 if (p_defs->child_dev_size != sizeof(*child)) {
465 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 466 return;
467 }
468 /* get the block size of general definitions */
db545019 469 block_size = get_blocksize(p_defs);
9b9d172d 470 /* get the number of child device */
471 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 472 p_defs->child_dev_size;
9b9d172d 473 count = 0;
474 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
475 child = &child_device_ptr(p_defs, i)->old;
476 if (!child->device_type) {
9b9d172d 477 /* skip the device block if device type is invalid */
478 continue;
479 }
6cc38aca
JN
480 if (child->slave_addr != SLAVE_ADDR1 &&
481 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 482 /*
483 * If the slave address is neither 0x70 nor 0x72,
484 * it is not a SDVO device. Skip it.
485 */
486 continue;
487 }
6cc38aca
JN
488 if (child->dvo_port != DEVICE_PORT_DVOB &&
489 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 490 /* skip the incorrect SDVO port */
0206e353 491 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 492 continue;
493 }
28c97730 494 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
495 " %s port\n",
496 child->slave_addr,
497 (child->dvo_port == DEVICE_PORT_DVOB) ?
498 "SDVOB" : "SDVOC");
9d6c875d 499 p_mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
9b9d172d 500 if (!p_mapping->initialized) {
6cc38aca
JN
501 p_mapping->dvo_port = child->dvo_port;
502 p_mapping->slave_addr = child->slave_addr;
503 p_mapping->dvo_wiring = child->dvo_wiring;
504 p_mapping->ddc_pin = child->ddc_pin;
505 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 506 p_mapping->initialized = 1;
46eb3036 507 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
508 p_mapping->dvo_port,
509 p_mapping->slave_addr,
510 p_mapping->dvo_wiring,
511 p_mapping->ddc_pin,
46eb3036 512 p_mapping->i2c_pin);
9b9d172d 513 } else {
28c97730 514 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 515 "two SDVO device.\n");
516 }
6cc38aca 517 if (child->slave2_addr) {
9b9d172d 518 /* Maybe this is a SDVO device with multiple inputs */
519 /* And the mapping info is not added */
28c97730
ZY
520 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
521 " is a SDVO device with multiple inputs.\n");
9b9d172d 522 }
523 count++;
524 }
525
526 if (!count) {
527 /* No SDVO device info is found */
28c97730 528 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 529 }
530 return;
531}
32f9d658
ZW
532
533static void
534parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 535 const struct bdb_header *bdb)
32f9d658 536{
e8ef3b4c 537 const struct bdb_driver_features *driver;
32f9d658 538
32f9d658 539 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
540 if (!driver)
541 return;
542
6fca55b1 543 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 544 dev_priv->vbt.edp.support = 1;
652c393a 545
83a7280e
PB
546 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
547 /*
548 * If DRRS is not supported, drrs_type has to be set to 0.
549 * This is because, VBT is configured in such a way that
550 * static DRRS is 0 and DRRS not supported is represented by
551 * driver->drrs_enabled=false
552 */
553 if (!driver->drrs_enabled)
554 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
555}
556
500a8cc4 557static void
dcb58a40 558parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 559{
e8ef3b4c
JN
560 const struct bdb_edp *edp;
561 const struct edp_power_seq *edp_pps;
562 const struct edp_link_params *edp_link_params;
3e845c7a 563 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
564
565 edp = find_section(bdb, BDB_EDP);
566 if (!edp) {
6aa23e65 567 if (dev_priv->vbt.edp.support)
9a30a61f 568 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
569 return;
570 }
571
572 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
573 case EDP_18BPP:
6aa23e65 574 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
575 break;
576 case EDP_24BPP:
6aa23e65 577 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
578 break;
579 case EDP_30BPP:
6aa23e65 580 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
581 break;
582 }
5ceb0f9b 583
9f0e7ff4
JB
584 /* Get the eDP sequencing and link info */
585 edp_pps = &edp->power_seqs[panel_type];
586 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 587
6aa23e65 588 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 589
e13e2b2c
JN
590 switch (edp_link_params->rate) {
591 case EDP_RATE_1_62:
6aa23e65 592 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
593 break;
594 case EDP_RATE_2_7:
6aa23e65 595 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
596 break;
597 default:
598 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
599 edp_link_params->rate);
600 break;
601 }
602
9f0e7ff4 603 switch (edp_link_params->lanes) {
e13e2b2c 604 case EDP_LANE_1:
6aa23e65 605 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 606 break;
e13e2b2c 607 case EDP_LANE_2:
6aa23e65 608 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 609 break;
e13e2b2c 610 case EDP_LANE_4:
6aa23e65 611 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 612 break;
e13e2b2c
JN
613 default:
614 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
615 edp_link_params->lanes);
616 break;
9f0e7ff4 617 }
e13e2b2c 618
9f0e7ff4 619 switch (edp_link_params->preemphasis) {
e13e2b2c 620 case EDP_PREEMPHASIS_NONE:
6aa23e65 621 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 622 break;
e13e2b2c 623 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 624 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 625 break;
e13e2b2c 626 case EDP_PREEMPHASIS_6dB:
6aa23e65 627 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 628 break;
e13e2b2c 629 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 630 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 631 break;
e13e2b2c
JN
632 default:
633 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
634 edp_link_params->preemphasis);
635 break;
9f0e7ff4 636 }
e13e2b2c 637
9f0e7ff4 638 switch (edp_link_params->vswing) {
e13e2b2c 639 case EDP_VSWING_0_4V:
6aa23e65 640 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 641 break;
e13e2b2c 642 case EDP_VSWING_0_6V:
6aa23e65 643 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 644 break;
e13e2b2c 645 case EDP_VSWING_0_8V:
6aa23e65 646 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 647 break;
e13e2b2c 648 case EDP_VSWING_1_2V:
6aa23e65 649 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 650 break;
e13e2b2c
JN
651 default:
652 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
653 edp_link_params->vswing);
654 break;
9f0e7ff4 655 }
9a57f5bb
SJ
656
657 if (bdb->version >= 173) {
658 uint8_t vswing;
659
9e458034
SJ
660 /* Don't read from VBT if module parameter has valid value*/
661 if (i915.edp_vswing) {
06411f08 662 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
9e458034
SJ
663 } else {
664 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 665 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 666 }
9a57f5bb 667 }
500a8cc4
ZW
668}
669
bfd7ebda 670static void
dcb58a40 671parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 672{
e8ef3b4c
JN
673 const struct bdb_psr *psr;
674 const struct psr_table *psr_table;
3e845c7a 675 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
676
677 psr = find_section(bdb, BDB_PSR);
678 if (!psr) {
679 DRM_DEBUG_KMS("No PSR BDB found.\n");
680 return;
681 }
682
683 psr_table = &psr->psr_table[panel_type];
684
685 dev_priv->vbt.psr.full_link = psr_table->full_link;
686 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
687
688 /* Allowed VBT values goes from 0 to 15 */
689 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
690 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
691
692 switch (psr_table->lines_to_wait) {
693 case 0:
694 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
695 break;
696 case 1:
697 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
698 break;
699 case 2:
700 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
701 break;
702 case 3:
703 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
704 break;
705 default:
706 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
707 psr_table->lines_to_wait);
708 break;
709 }
710
711 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
712 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
713}
714
d17c5443 715static void
0f8689f5
JN
716parse_mipi_config(struct drm_i915_private *dev_priv,
717 const struct bdb_header *bdb)
d17c5443 718{
e8ef3b4c 719 const struct bdb_mipi_config *start;
e8ef3b4c
JN
720 const struct mipi_config *config;
721 const struct mipi_pps_data *pps;
3e845c7a 722 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 723
3e6bd011 724 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 725 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
726 return;
727
d3b542fc
SK
728 /* Initialize this to undefined indicating no generic MIPI support */
729 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
730
731 /* Block #40 is already parsed and panel_fixed_mode is
732 * stored in dev_priv->lfp_lvds_vbt_mode
733 * resuse this when needed
734 */
d17c5443 735
d3b542fc
SK
736 /* Parse #52 for panel index used from panel_type already
737 * parsed
738 */
739 start = find_section(bdb, BDB_MIPI_CONFIG);
740 if (!start) {
741 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
742 return;
743 }
744
d3b542fc
SK
745 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
746 panel_type);
747
748 /*
749 * get hold of the correct configuration block and pps data as per
750 * the panel_type as index
751 */
752 config = &start->config[panel_type];
753 pps = &start->pps[panel_type];
754
755 /* store as of now full data. Trim when we realise all is not needed */
756 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
757 if (!dev_priv->vbt.dsi.config)
758 return;
759
760 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
761 if (!dev_priv->vbt.dsi.pps) {
762 kfree(dev_priv->vbt.dsi.config);
763 return;
764 }
765
766 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 767 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
768}
769
5db72099
JN
770/* Find the sequence block and size for the given panel. */
771static const u8 *
772find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 773 u16 panel_id, u32 *seq_size)
5db72099
JN
774{
775 u32 total = get_blocksize(sequence);
776 const u8 *data = &sequence->data[0];
777 u8 current_id;
2a33d934
JN
778 u32 current_size;
779 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
780 int index = 0;
781 int i;
782
2a33d934
JN
783 /* skip new block size */
784 if (sequence->version >= 3)
785 data += 4;
786
787 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
788 if (index + header_size > total) {
789 DRM_ERROR("Invalid sequence block (header)\n");
790 return NULL;
791 }
792
5db72099 793 current_id = *(data + index);
2a33d934
JN
794 if (sequence->version >= 3)
795 current_size = *((const u32 *)(data + index + 1));
796 else
797 current_size = *((const u16 *)(data + index + 1));
5db72099 798
2a33d934 799 index += header_size;
5db72099
JN
800
801 if (index + current_size > total) {
802 DRM_ERROR("Invalid sequence block\n");
803 return NULL;
804 }
805
806 if (current_id == panel_id) {
807 *seq_size = current_size;
808 return data + index;
809 }
810
811 index += current_size;
812 }
813
814 DRM_ERROR("Sequence block detected but no valid configuration\n");
815
816 return NULL;
817}
818
8d3ed2f3
JN
819static int goto_next_sequence(const u8 *data, int index, int total)
820{
821 u16 len;
822
823 /* Skip Sequence Byte. */
824 for (index = index + 1; index < total; index += len) {
825 u8 operation_byte = *(data + index);
826 index++;
827
828 switch (operation_byte) {
829 case MIPI_SEQ_ELEM_END:
830 return index;
831 case MIPI_SEQ_ELEM_SEND_PKT:
832 if (index + 4 > total)
833 return 0;
834
835 len = *((const u16 *)(data + index + 2)) + 4;
836 break;
837 case MIPI_SEQ_ELEM_DELAY:
838 len = 4;
839 break;
840 case MIPI_SEQ_ELEM_GPIO:
841 len = 2;
842 break;
f4d64936
JN
843 case MIPI_SEQ_ELEM_I2C:
844 if (index + 7 > total)
845 return 0;
846 len = *(data + index + 6) + 7;
847 break;
8d3ed2f3
JN
848 default:
849 DRM_ERROR("Unknown operation byte\n");
850 return 0;
851 }
852 }
853
854 return 0;
855}
856
2a33d934
JN
857static int goto_next_sequence_v3(const u8 *data, int index, int total)
858{
859 int seq_end;
860 u16 len;
6765bd6d 861 u32 size_of_sequence;
2a33d934
JN
862
863 /*
864 * Could skip sequence based on Size of Sequence alone, but also do some
865 * checking on the structure.
866 */
867 if (total < 5) {
868 DRM_ERROR("Too small sequence size\n");
869 return 0;
870 }
871
6765bd6d
JN
872 /* Skip Sequence Byte. */
873 index++;
874
875 /*
876 * Size of Sequence. Excludes the Sequence Byte and the size itself,
877 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
878 * byte.
879 */
880 size_of_sequence = *((const uint32_t *)(data + index));
881 index += 4;
882
883 seq_end = index + size_of_sequence;
2a33d934
JN
884 if (seq_end > total) {
885 DRM_ERROR("Invalid sequence size\n");
886 return 0;
887 }
888
6765bd6d 889 for (; index < total; index += len) {
2a33d934
JN
890 u8 operation_byte = *(data + index);
891 index++;
892
893 if (operation_byte == MIPI_SEQ_ELEM_END) {
894 if (index != seq_end) {
895 DRM_ERROR("Invalid element structure\n");
896 return 0;
897 }
898 return index;
899 }
900
901 len = *(data + index);
902 index++;
903
904 /*
905 * FIXME: Would be nice to check elements like for v1/v2 in
906 * goto_next_sequence() above.
907 */
908 switch (operation_byte) {
909 case MIPI_SEQ_ELEM_SEND_PKT:
910 case MIPI_SEQ_ELEM_DELAY:
911 case MIPI_SEQ_ELEM_GPIO:
912 case MIPI_SEQ_ELEM_I2C:
913 case MIPI_SEQ_ELEM_SPI:
914 case MIPI_SEQ_ELEM_PMIC:
915 break;
916 default:
917 DRM_ERROR("Unknown operation byte %u\n",
918 operation_byte);
919 break;
920 }
921 }
922
923 return 0;
924}
925
0f8689f5
JN
926static void
927parse_mipi_sequence(struct drm_i915_private *dev_priv,
928 const struct bdb_header *bdb)
929{
3e845c7a 930 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
931 const struct bdb_mipi_sequence *sequence;
932 const u8 *seq_data;
2a33d934 933 u32 seq_size;
0f8689f5 934 u8 *data;
8d3ed2f3 935 int index = 0;
0f8689f5
JN
936
937 /* Only our generic panel driver uses the sequence block. */
938 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
939 return;
d3b542fc 940
d3b542fc
SK
941 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
942 if (!sequence) {
943 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
944 return;
945 }
946
cd67d226 947 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
948 if (sequence->version >= 4) {
949 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
950 sequence->version);
cd67d226
JN
951 return;
952 }
953
2a33d934 954 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 955
5db72099
JN
956 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
957 if (!seq_data)
d3b542fc 958 return;
d3b542fc 959
8d3ed2f3
JN
960 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
961 if (!data)
d3b542fc
SK
962 return;
963
8d3ed2f3
JN
964 /* Parse the sequences, store pointers to each sequence. */
965 for (;;) {
966 u8 seq_id = *(data + index);
967 if (seq_id == MIPI_SEQ_END)
968 break;
d3b542fc 969
8d3ed2f3
JN
970 if (seq_id >= MIPI_SEQ_MAX) {
971 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
972 goto err;
973 }
974
8d3ed2f3 975 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 976
2a33d934
JN
977 if (sequence->version >= 3)
978 index = goto_next_sequence_v3(data, index, seq_size);
979 else
980 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
981 if (!index) {
982 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
983 goto err;
984 }
d3b542fc
SK
985 }
986
8d3ed2f3
JN
987 dev_priv->vbt.dsi.data = data;
988 dev_priv->vbt.dsi.size = seq_size;
989 dev_priv->vbt.dsi.seq_version = sequence->version;
990
991 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 992 return;
d3b542fc 993
8d3ed2f3
JN
994err:
995 kfree(data);
ed3b6679 996 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
997}
998
75067dde
AK
999static u8 translate_iboost(u8 val)
1000{
1001 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1002
1003 if (val >= ARRAY_SIZE(mapping)) {
1004 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1005 return 0;
1006 }
1007 return mapping[val];
1008}
1009
6acab15a 1010static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1011 const struct bdb_header *bdb)
6acab15a
PZ
1012{
1013 union child_device_config *it, *child = NULL;
1014 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1015 uint8_t hdmi_level_shift;
1016 int i, j;
554d6af5 1017 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1018 uint8_t aux_channel, ddc_pin;
6acab15a
PZ
1019 /* Each DDI port can have more than one value on the "DVO Port" field,
1020 * so look for all the possible values for each port and abort if more
1021 * than one is found. */
2800e4c2
RV
1022 int dvo_ports[][3] = {
1023 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1024 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1025 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1026 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1027 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1028 };
1029
1030 /* Find the child device to use, abort if more than one found. */
1031 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1032 it = dev_priv->vbt.child_dev + i;
1033
2800e4c2 1034 for (j = 0; j < 3; j++) {
6acab15a
PZ
1035 if (dvo_ports[port][j] == -1)
1036 break;
1037
1038 if (it->common.dvo_port == dvo_ports[port][j]) {
1039 if (child) {
1040 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1041 port_name(port));
1042 return;
1043 }
1044 child = it;
1045 }
1046 }
1047 }
1048 if (!child)
1049 return;
1050
6bf19e7c 1051 aux_channel = child->raw[25];
11c1b657 1052 ddc_pin = child->common.ddc_pin;
6bf19e7c 1053
78eb06c3
VS
1054 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1055 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1056 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1057 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1058 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1059
311a2094
PZ
1060 info->supports_dvi = is_dvi;
1061 info->supports_hdmi = is_hdmi;
1062 info->supports_dp = is_dp;
1063
554d6af5
PZ
1064 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1065 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1066
1067 if (is_edp && is_dvi)
1068 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1069 port_name(port));
1070 if (is_crt && port != PORT_E)
1071 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1072 if (is_crt && (is_dvi || is_dp))
1073 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1074 port_name(port));
1075 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1076 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1077 if (!is_dvi && !is_dp && !is_crt)
1078 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1079 port_name(port));
1080 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1081 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1082
1083 if (is_dvi) {
11c1b657
XZ
1084 if (port == PORT_E) {
1085 info->alternate_ddc_pin = ddc_pin;
1086 /* if DDIE share ddc pin with other port, then
1087 * dvi/hdmi couldn't exist on the shared port.
1088 * Otherwise they share the same ddc bin and system
1089 * couldn't communicate with them seperately. */
1090 if (ddc_pin == DDC_PIN_B) {
1091 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1092 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1093 } else if (ddc_pin == DDC_PIN_C) {
1094 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1095 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1096 } else if (ddc_pin == DDC_PIN_D) {
1097 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1098 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1099 }
1100 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
6bf19e7c 1101 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
11c1b657 1102 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
6bf19e7c 1103 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
11c1b657 1104 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
6bf19e7c
PZ
1105 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1106 }
1107
1108 if (is_dp) {
500ea70d
RV
1109 if (port == PORT_E) {
1110 info->alternate_aux_channel = aux_channel;
1111 /* if DDIE share aux channel with other port, then
1112 * DP couldn't exist on the shared port. Otherwise
1113 * they share the same aux channel and system
1114 * couldn't communicate with them seperately. */
1115 if (aux_channel == DP_AUX_A)
1116 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1117 else if (aux_channel == DP_AUX_B)
1118 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1119 else if (aux_channel == DP_AUX_C)
1120 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1121 else if (aux_channel == DP_AUX_D)
1122 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1123 }
1124 else if (aux_channel == DP_AUX_A && port != PORT_A)
6bf19e7c 1125 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
500ea70d 1126 else if (aux_channel == DP_AUX_B && port != PORT_B)
6bf19e7c 1127 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
500ea70d 1128 else if (aux_channel == DP_AUX_C && port != PORT_C)
6bf19e7c 1129 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
500ea70d 1130 else if (aux_channel == DP_AUX_D && port != PORT_D)
6bf19e7c
PZ
1131 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1132 }
1133
6acab15a
PZ
1134 if (bdb->version >= 158) {
1135 /* The VBT HDMI level shift values match the table we have. */
1136 hdmi_level_shift = child->raw[7] & 0xF;
ce4dd49e
DL
1137 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1138 port_name(port),
1139 hdmi_level_shift);
1140 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1141 }
75067dde
AK
1142
1143 /* Parse the I_boost config for SKL and above */
4e27bd50 1144 if (bdb->version >= 196 && child->common.iboost) {
75067dde
AK
1145 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1146 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1147 port_name(port), info->dp_boost_level);
1148 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1149 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1150 port_name(port), info->hdmi_boost_level);
1151 }
6acab15a
PZ
1152}
1153
1154static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1155 const struct bdb_header *bdb)
6acab15a 1156{
6acab15a
PZ
1157 enum port port;
1158
98f3a1dc 1159 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1160 return;
1161
1162 if (!dev_priv->vbt.child_dev_num)
1163 return;
1164
1165 if (bdb->version < 155)
1166 return;
1167
1168 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1169 parse_ddi_port(dev_priv, port, bdb);
1170}
1171
6363ee6f
ZY
1172static void
1173parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1174 const struct bdb_header *bdb)
6363ee6f 1175{
e8ef3b4c
JN
1176 const struct bdb_general_definitions *p_defs;
1177 const union child_device_config *p_child;
1178 union child_device_config *child_dev_ptr;
6363ee6f 1179 int i, child_device_num, count;
e2d6cf7f
DW
1180 u8 expected_size;
1181 u16 block_size;
6363ee6f
ZY
1182
1183 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1184 if (!p_defs) {
44834a67 1185 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1186 return;
1187 }
7244f309
VS
1188 if (bdb->version < 106) {
1189 expected_size = 22;
1190 } else if (bdb->version < 109) {
52b69c84
VS
1191 expected_size = 27;
1192 } else if (bdb->version < 195) {
1193 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1194 expected_size = sizeof(struct old_child_dev_config);
1195 } else if (bdb->version == 195) {
1196 expected_size = 37;
1197 } else if (bdb->version <= 197) {
1198 expected_size = 38;
1199 } else {
1200 expected_size = 38;
1201 BUILD_BUG_ON(sizeof(*p_child) < 38);
1202 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1203 bdb->version, expected_size);
1204 }
1205
e2d6cf7f
DW
1206 /* Flag an error for unexpected size, but continue anyway. */
1207 if (p_defs->child_dev_size != expected_size)
1208 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1209 p_defs->child_dev_size, expected_size, bdb->version);
1210
52b69c84
VS
1211 /* The legacy sized child device config is the minimum we need. */
1212 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1213 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1214 p_defs->child_dev_size);
1215 return;
1216 }
1217
6363ee6f
ZY
1218 /* get the block size of general definitions */
1219 block_size = get_blocksize(p_defs);
1220 /* get the number of child device */
1221 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1222 p_defs->child_dev_size;
6363ee6f
ZY
1223 count = 0;
1224 /* get the number of child device that is present */
1225 for (i = 0; i < child_device_num; i++) {
90e4f159 1226 p_child = child_device_ptr(p_defs, i);
768f69c9 1227 if (!p_child->common.device_type) {
6363ee6f
ZY
1228 /* skip the device block if device type is invalid */
1229 continue;
1230 }
1231 count++;
1232 }
1233 if (!count) {
0206e353 1234 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1235 return;
1236 }
41aa3448
RV
1237 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1238 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1239 DRM_DEBUG_KMS("No memory space for child device\n");
1240 return;
1241 }
1242
41aa3448 1243 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1244 count = 0;
1245 for (i = 0; i < child_device_num; i++) {
90e4f159 1246 p_child = child_device_ptr(p_defs, i);
768f69c9 1247 if (!p_child->common.device_type) {
6363ee6f
ZY
1248 /* skip the device block if device type is invalid */
1249 continue;
1250 }
3e6bd011 1251
41aa3448 1252 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1253 count++;
e2d6cf7f
DW
1254
1255 /*
1256 * Copy as much as we know (sizeof) and is available
1257 * (child_dev_size) of the child device. Accessing the data must
1258 * depend on VBT version.
1259 */
1260 memcpy(child_dev_ptr, p_child,
1261 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
4e27bd50
SS
1262
1263 /*
1264 * copied full block, now init values when they are not
1265 * available in current version
1266 */
1267 if (bdb->version < 196) {
1268 /* Set default values for bits added from v196 */
1269 child_dev_ptr->common.iboost = 0;
1270 child_dev_ptr->common.hpd_invert = 0;
1271 }
1272
1273 if (bdb->version < 192)
1274 child_dev_ptr->common.lspcon = 0;
6363ee6f
ZY
1275 }
1276 return;
1277}
44834a67 1278
6a04002b
SQ
1279static void
1280init_vbt_defaults(struct drm_i915_private *dev_priv)
1281{
6acab15a 1282 enum port port;
9a4114ff 1283
988c7015 1284 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1285
56c4b63a
JN
1286 /* Default to having backlight */
1287 dev_priv->vbt.backlight.present = true;
1288
6a04002b 1289 /* LFP panel data */
41aa3448
RV
1290 dev_priv->vbt.lvds_dither = 1;
1291 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1292
1293 /* SDVO panel data */
41aa3448 1294 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1295
1296 /* general features */
41aa3448
RV
1297 dev_priv->vbt.int_tv_support = 1;
1298 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1299
1300 /* Default to using SSC */
41aa3448 1301 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1302 /*
1303 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1304 * clock for LVDS.
1305 */
98f3a1dc
JN
1306 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1307 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1308 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1309
1310 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1311 struct ddi_vbt_port_info *info =
1312 &dev_priv->vbt.ddi_port_info[port];
1313
ce4dd49e 1314 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
311a2094
PZ
1315
1316 info->supports_dvi = (port != PORT_A && port != PORT_E);
1317 info->supports_hdmi = info->supports_dvi;
1318 info->supports_dp = (port != PORT_E);
6acab15a 1319 }
6a04002b
SQ
1320}
1321
caf37fa4
JN
1322static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1323{
1324 const void *_vbt = vbt;
1325
1326 return _vbt + vbt->bdb_offset;
1327}
1328
f0067a31
JN
1329/**
1330 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1331 * @buf: pointer to a buffer to validate
1332 * @size: size of the buffer
1333 *
1334 * Returns true on valid VBT.
1335 */
1336bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1337{
f0067a31 1338 const struct vbt_header *vbt = buf;
dcb58a40 1339 const struct bdb_header *bdb;
3dd4e846 1340
caf37fa4 1341 if (!vbt)
f0067a31 1342 return false;
caf37fa4 1343
f0067a31 1344 if (sizeof(struct vbt_header) > size) {
3dd4e846 1345 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1346 return false;
3dd4e846
CW
1347 }
1348
1349 if (memcmp(vbt->signature, "$VBT", 4)) {
1350 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1351 return false;
3dd4e846
CW
1352 }
1353
f0067a31 1354 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
3dd4e846 1355 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1356 return false;
3dd4e846
CW
1357 }
1358
caf37fa4 1359 bdb = get_bdb_header(vbt);
f0067a31 1360 if (vbt->bdb_offset + bdb->bdb_size > size) {
3dd4e846 1361 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1362 return false;
3dd4e846
CW
1363 }
1364
caf37fa4 1365 return vbt;
3dd4e846
CW
1366}
1367
caf37fa4 1368static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1369{
b34a991a
JN
1370 size_t i;
1371
1372 /* Scour memory looking for the VBT signature. */
1373 for (i = 0; i + 4 < size; i++) {
f0067a31 1374 void *vbt;
115719fc 1375
f0067a31
JN
1376 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1377 continue;
1378
1379 /*
1380 * This is the one place where we explicitly discard the address
1381 * space (__iomem) of the BIOS/VBT.
1382 */
1383 vbt = (void __force *) bios + i;
1384 if (intel_bios_is_valid_vbt(vbt, size - i))
1385 return vbt;
1386
1387 break;
b34a991a
JN
1388 }
1389
f0067a31 1390 return NULL;
b34a991a
JN
1391}
1392
79e53945 1393/**
8b8e1a89 1394 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1395 * @dev_priv: i915 device instance
79e53945
JB
1396 *
1397 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1398 * to appropriate values.
1399 *
79e53945
JB
1400 * Returns 0 on success, nonzero on failure.
1401 */
0317c6ce 1402int
98f3a1dc 1403intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1404{
98f3a1dc 1405 struct pci_dev *pdev = dev_priv->dev->pdev;
f0067a31 1406 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1407 const struct bdb_header *bdb;
44834a67
CW
1408 u8 __iomem *bios = NULL;
1409
98f3a1dc 1410 if (HAS_PCH_NOP(dev_priv))
ab5c608b
BW
1411 return -ENODEV;
1412
6a04002b 1413 init_vbt_defaults(dev_priv);
f899fc64 1414
f0067a31 1415 if (!vbt) {
b34a991a 1416 size_t size;
79e53945 1417
44834a67
CW
1418 bios = pci_map_rom(pdev, &size);
1419 if (!bios)
1420 return -1;
1421
caf37fa4
JN
1422 vbt = find_vbt(bios, size);
1423 if (!vbt) {
44834a67
CW
1424 pci_unmap_rom(pdev, bios);
1425 return -1;
1426 }
e2051c44
JN
1427
1428 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1429 }
79e53945 1430
caf37fa4
JN
1431 bdb = get_bdb_header(vbt);
1432
3556dd40
JN
1433 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1434 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1435
79e53945
JB
1436 /* Grab useful general definitions */
1437 parse_general_features(dev_priv, bdb);
db545019 1438 parse_general_definitions(dev_priv, bdb);
88631706 1439 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1440 parse_lfp_backlight(dev_priv, bdb);
88631706 1441 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1442 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1443 parse_device_mapping(dev_priv, bdb);
32f9d658 1444 parse_driver_features(dev_priv, bdb);
500a8cc4 1445 parse_edp(dev_priv, bdb);
bfd7ebda 1446 parse_psr(dev_priv, bdb);
0f8689f5
JN
1447 parse_mipi_config(dev_priv, bdb);
1448 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1449 parse_ddi_ports(dev_priv, bdb);
32f9d658 1450
44834a67
CW
1451 if (bios)
1452 pci_unmap_rom(pdev, bios);
79e53945
JB
1453
1454 return 0;
1455}
3bdd14d5
JN
1456
1457/**
1458 * intel_bios_is_tv_present - is integrated TV present in VBT
1459 * @dev_priv: i915 device instance
1460 *
1461 * Return true if TV is present. If no child devices were parsed from VBT,
1462 * assume TV is present.
1463 */
1464bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1465{
1466 union child_device_config *p_child;
1467 int i;
1468
1469 if (!dev_priv->vbt.int_tv_support)
1470 return false;
1471
1472 if (!dev_priv->vbt.child_dev_num)
1473 return true;
1474
1475 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1476 p_child = dev_priv->vbt.child_dev + i;
1477 /*
1478 * If the device type is not TV, continue.
1479 */
1480 switch (p_child->old.device_type) {
1481 case DEVICE_TYPE_INT_TV:
1482 case DEVICE_TYPE_TV:
1483 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1484 break;
1485 default:
1486 continue;
1487 }
1488 /* Only when the addin_offset is non-zero, it is regarded
1489 * as present.
1490 */
1491 if (p_child->old.addin_offset)
1492 return true;
1493 }
1494
1495 return false;
1496}
5a69d13d
JN
1497
1498/**
1499 * intel_bios_is_lvds_present - is LVDS present in VBT
1500 * @dev_priv: i915 device instance
1501 * @i2c_pin: i2c pin for LVDS if present
1502 *
1503 * Return true if LVDS is present. If no child devices were parsed from VBT,
1504 * assume LVDS is present.
1505 */
1506bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1507{
1508 int i;
1509
1510 if (!dev_priv->vbt.child_dev_num)
1511 return true;
1512
1513 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1514 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1515 struct old_child_dev_config *child = &uchild->old;
1516
1517 /* If the device type is not LFP, continue.
1518 * We have to check both the new identifiers as well as the
1519 * old for compatibility with some BIOSes.
1520 */
1521 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1522 child->device_type != DEVICE_TYPE_LFP)
1523 continue;
1524
1525 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1526 *i2c_pin = child->i2c_pin;
1527
1528 /* However, we cannot trust the BIOS writers to populate
1529 * the VBT correctly. Since LVDS requires additional
1530 * information from AIM blocks, a non-zero addin offset is
1531 * a good indicator that the LVDS is actually present.
1532 */
1533 if (child->addin_offset)
1534 return true;
1535
1536 /* But even then some BIOS writers perform some black magic
1537 * and instantiate the device without reference to any
1538 * additional data. Trust that if the VBT was written into
1539 * the OpRegion then they have validated the LVDS's existence.
1540 */
1541 if (dev_priv->opregion.vbt)
1542 return true;
1543 }
1544
1545 return false;
1546}
951d9efe
JN
1547
1548/**
1549 * intel_bios_is_port_edp - is the device in given port eDP
1550 * @dev_priv: i915 device instance
1551 * @port: port to check
1552 *
1553 * Return true if the device in %port is eDP.
1554 */
1555bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1556{
1557 union child_device_config *p_child;
1558 static const short port_mapping[] = {
1559 [PORT_B] = DVO_PORT_DPB,
1560 [PORT_C] = DVO_PORT_DPC,
1561 [PORT_D] = DVO_PORT_DPD,
1562 [PORT_E] = DVO_PORT_DPE,
1563 };
1564 int i;
1565
1566 if (!dev_priv->vbt.child_dev_num)
1567 return false;
1568
1569 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1570 p_child = dev_priv->vbt.child_dev + i;
1571
1572 if (p_child->common.dvo_port == port_mapping[port] &&
1573 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1574 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1575 return true;
1576 }
1577
1578 return false;
1579}
7137aec1
JN
1580
1581/**
1582 * intel_bios_is_dsi_present - is DSI present in VBT
1583 * @dev_priv: i915 device instance
1584 * @port: port for DSI if present
1585 *
1586 * Return true if DSI is present, and return the port in %port.
1587 */
1588bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1589 enum port *port)
1590{
1591 union child_device_config *p_child;
1592 u8 dvo_port;
1593 int i;
1594
1595 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1596 p_child = dev_priv->vbt.child_dev + i;
1597
1598 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1599 continue;
1600
1601 dvo_port = p_child->common.dvo_port;
1602
1603 switch (dvo_port) {
1604 case DVO_PORT_MIPIA:
1605 case DVO_PORT_MIPIC:
7caaef33
JN
1606 if (port)
1607 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1608 return true;
1609 case DVO_PORT_MIPIB:
1610 case DVO_PORT_MIPID:
1611 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1612 port_name(dvo_port - DVO_PORT_MIPIA));
1613 break;
1614 }
1615 }
1616
1617 return false;
1618}
d252bf68
SS
1619
1620/**
1621 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1622 * @dev_priv: i915 device instance
1623 * @port: port to check
1624 *
1625 * Return true if HPD should be inverted for %port.
1626 */
1627bool
1628intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1629 enum port port)
1630{
1631 int i;
1632
1633 if (WARN_ON_ONCE(!IS_BROXTON(dev_priv)))
1634 return false;
1635
1636 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1637 if (!dev_priv->vbt.child_dev[i].common.hpd_invert)
1638 continue;
1639
1640 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1641 case DVO_PORT_DPA:
1642 case DVO_PORT_HDMIA:
1643 if (port == PORT_A)
1644 return true;
1645 break;
1646 case DVO_PORT_DPB:
1647 case DVO_PORT_HDMIB:
1648 if (port == PORT_B)
1649 return true;
1650 break;
1651 case DVO_PORT_DPC:
1652 case DVO_PORT_HDMIC:
1653 if (port == PORT_C)
1654 return true;
1655 break;
1656 default:
1657 break;
1658 }
1659 }
1660
1661 return false;
1662}
This page took 0.523186 seconds and 5 git commands to generate.