drm/i915: fix up a raw 64bit divide
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_dp_i2c.c
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1/*
2 * Copyright © 2009 Keith Packard
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
13 *
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20 * OF THIS SOFTWARE.
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/init.h>
28#include <linux/errno.h>
29#include <linux/sched.h>
30#include <linux/i2c.h>
31#include "intel_dp.h"
32
33/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
34
35#define MODE_I2C_START 1
36#define MODE_I2C_WRITE 2
37#define MODE_I2C_READ 4
38#define MODE_I2C_STOP 8
39
40static int
41i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
42 uint8_t write_byte, uint8_t *read_byte)
43{
44 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
45 uint16_t address = algo_data->address;
46 uint8_t msg[5];
47 uint8_t reply[2];
48 int msg_bytes;
49 int reply_bytes;
50 int ret;
51
52 /* Set up the command byte */
53 if (mode & MODE_I2C_READ)
54 msg[0] = AUX_I2C_READ << 4;
55 else
56 msg[0] = AUX_I2C_WRITE << 4;
57
58 if (!(mode & MODE_I2C_STOP))
59 msg[0] |= AUX_I2C_MOT << 4;
60
61 msg[1] = address >> 8;
62 msg[2] = address;
63
64 switch (mode) {
65 case MODE_I2C_WRITE:
66 msg[3] = 0;
67 msg[4] = write_byte;
68 msg_bytes = 5;
69 reply_bytes = 1;
70 break;
71 case MODE_I2C_READ:
72 msg[3] = 0;
73 msg_bytes = 4;
74 reply_bytes = 2;
75 break;
76 default:
77 msg_bytes = 3;
78 reply_bytes = 1;
79 break;
80 }
81
82 for (;;) {
83 ret = (*algo_data->aux_ch)(adapter,
84 msg, msg_bytes,
85 reply, reply_bytes);
86 if (ret < 0) {
87 printk(KERN_ERR "aux_ch failed %d\n", ret);
88 return ret;
89 }
90 switch (reply[0] & AUX_I2C_REPLY_MASK) {
91 case AUX_I2C_REPLY_ACK:
92 if (mode == MODE_I2C_READ) {
93 *read_byte = reply[1];
94 }
95 return reply_bytes - 1;
96 case AUX_I2C_REPLY_NACK:
97 printk(KERN_ERR "aux_ch nack\n");
98 return -EREMOTEIO;
99 case AUX_I2C_REPLY_DEFER:
100 printk(KERN_ERR "aux_ch defer\n");
101 udelay(100);
102 break;
103 default:
104 printk(KERN_ERR "aux_ch invalid reply 0x%02x\n", reply[0]);
105 return -EREMOTEIO;
106 }
107 }
108}
109
110/*
111 * I2C over AUX CH
112 */
113
114/*
115 * Send the address. If the I2C link is running, this 'restarts'
116 * the connection with the new address, this is used for doing
117 * a write followed by a read (as needed for DDC)
118 */
119static int
120i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
121{
122 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
123 int mode = MODE_I2C_START;
124 int ret;
125
126 if (reading)
127 mode |= MODE_I2C_READ;
128 else
129 mode |= MODE_I2C_WRITE;
130 algo_data->address = address;
131 algo_data->running = true;
132 ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
133 return ret;
134}
135
136/*
137 * Stop the I2C transaction. This closes out the link, sending
138 * a bare address packet with the MOT bit turned off
139 */
140static void
141i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
142{
143 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
144 int mode = MODE_I2C_STOP;
145
146 if (reading)
147 mode |= MODE_I2C_READ;
148 else
149 mode |= MODE_I2C_WRITE;
150 if (algo_data->running) {
151 (void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
152 algo_data->running = false;
153 }
154}
155
156/*
157 * Write a single byte to the current I2C address, the
158 * the I2C link must be running or this returns -EIO
159 */
160static int
161i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
162{
163 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
164 int ret;
165
166 if (!algo_data->running)
167 return -EIO;
168
169 ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
170 return ret;
171}
172
173/*
174 * Read a single byte from the current I2C address, the
175 * I2C link must be running or this returns -EIO
176 */
177static int
178i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
179{
180 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
181 int ret;
182
183 if (!algo_data->running)
184 return -EIO;
185
186 ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
187 return ret;
188}
189
190static int
191i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
192 struct i2c_msg *msgs,
193 int num)
194{
195 int ret = 0;
196 bool reading = false;
197 int m;
198 int b;
199
200 for (m = 0; m < num; m++) {
201 u16 len = msgs[m].len;
202 u8 *buf = msgs[m].buf;
203 reading = (msgs[m].flags & I2C_M_RD) != 0;
204 ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
205 if (ret < 0)
206 break;
207 if (reading) {
208 for (b = 0; b < len; b++) {
209 ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
210 if (ret < 0)
211 break;
212 }
213 } else {
214 for (b = 0; b < len; b++) {
215 ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
216 if (ret < 0)
217 break;
218 }
219 }
220 if (ret < 0)
221 break;
222 }
223 if (ret >= 0)
224 ret = num;
225 i2c_algo_dp_aux_stop(adapter, reading);
226 printk(KERN_ERR "dp_aux_xfer return %d\n", ret);
227 return ret;
228}
229
230static u32
231i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
232{
233 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
234 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
235 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
236 I2C_FUNC_10BIT_ADDR;
237}
238
239static const struct i2c_algorithm i2c_dp_aux_algo = {
240 .master_xfer = i2c_algo_dp_aux_xfer,
241 .functionality = i2c_algo_dp_aux_functionality,
242};
243
244static void
245i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
246{
247 (void) i2c_algo_dp_aux_address(adapter, 0, false);
248 (void) i2c_algo_dp_aux_stop(adapter, false);
249
250}
251
252static int
253i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
254{
255 adapter->algo = &i2c_dp_aux_algo;
256 adapter->retries = 3;
257 i2c_dp_aux_reset_bus(adapter);
258 return 0;
259}
260
261int
262i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
263{
264 int error;
265
266 error = i2c_dp_aux_prepare_bus(adapter);
267 if (error)
268 return error;
269 error = i2c_add_adapter(adapter);
270 return error;
271}
272EXPORT_SYMBOL(i2c_dp_aux_add_bus);
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