Commit | Line | Data |
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0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
c6f95f27 | 29 | #include <drm/drm_atomic_helper.h> |
0e32b39c DA |
30 | #include <drm/drm_crtc_helper.h> |
31 | #include <drm/drm_edid.h> | |
32 | ||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 34 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
35 | { |
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
e75f4771 ACO |
39 | struct drm_atomic_state *state; |
40 | int bpp, i; | |
04a60f9f | 41 | int lane_count, slots; |
7c5f93b0 | 42 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
da3ced29 ACO |
43 | struct drm_connector *drm_connector; |
44 | struct intel_connector *connector, *found = NULL; | |
45 | struct drm_connector_state *connector_state; | |
0e32b39c DA |
46 | int mst_pbn; |
47 | ||
48 | pipe_config->dp_encoder_is_mst = true; | |
49 | pipe_config->has_pch_encoder = false; | |
0e32b39c DA |
50 | bpp = 24; |
51 | /* | |
52 | * for MST we always configure max link bw - the spec doesn't | |
53 | * seem to suggest we should do otherwise. | |
54 | */ | |
55 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
ed4e9c1d | 56 | |
ed4e9c1d | 57 | |
90a6b7b0 | 58 | pipe_config->lane_count = lane_count; |
0e32b39c DA |
59 | |
60 | pipe_config->pipe_bpp = 24; | |
04a60f9f | 61 | pipe_config->port_clock = intel_dp_max_link_rate(intel_dp); |
0e32b39c | 62 | |
e75f4771 ACO |
63 | state = pipe_config->base.state; |
64 | ||
da3ced29 ACO |
65 | for_each_connector_in_state(state, drm_connector, connector_state, i) { |
66 | connector = to_intel_connector(drm_connector); | |
e75f4771 | 67 | |
da3ced29 ACO |
68 | if (connector_state->best_encoder == &encoder->base) { |
69 | found = connector; | |
0e32b39c DA |
70 | break; |
71 | } | |
72 | } | |
73 | ||
74 | if (!found) { | |
75 | DRM_ERROR("can't find connector\n"); | |
76 | return false; | |
77 | } | |
78 | ||
aad941d5 | 79 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); |
0e32b39c DA |
80 | |
81 | pipe_config->pbn = mst_pbn; | |
82 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
83 | ||
84 | intel_link_compute_m_n(bpp, lane_count, | |
85 | adjusted_mode->crtc_clock, | |
86 | pipe_config->port_clock, | |
87 | &pipe_config->dp_m_n); | |
88 | ||
89 | pipe_config->dp_m_n.tu = slots; | |
6fa2d197 | 90 | |
0e32b39c DA |
91 | return true; |
92 | ||
93 | } | |
94 | ||
95 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
96 | { | |
97 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
98 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
99 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
100 | int ret; | |
101 | ||
102 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
103 | ||
0552f765 | 104 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->connector->port); |
0e32b39c DA |
105 | |
106 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
107 | if (ret) { | |
108 | DRM_ERROR("failed to update payload %d\n", ret); | |
109 | } | |
110 | } | |
111 | ||
112 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
113 | { | |
114 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
115 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
116 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
117 | ||
118 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
119 | ||
120 | /* this can fail */ | |
121 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
122 | /* and this can also fail */ | |
123 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
124 | ||
0552f765 | 125 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->connector->port); |
0e32b39c DA |
126 | |
127 | intel_dp->active_mst_links--; | |
0552f765 DA |
128 | |
129 | intel_mst->connector = NULL; | |
0e32b39c DA |
130 | if (intel_dp->active_mst_links == 0) { |
131 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
132 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
133 | } | |
134 | } | |
135 | ||
136 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
137 | { | |
138 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
139 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
140 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
141 | struct drm_device *dev = encoder->base.dev; | |
fac5e23e | 142 | struct drm_i915_private *dev_priv = to_i915(dev); |
0e32b39c DA |
143 | enum port port = intel_dig_port->port; |
144 | int ret; | |
145 | uint32_t temp; | |
9b4fd8f2 | 146 | struct intel_connector *found = NULL, *connector; |
0e32b39c DA |
147 | int slots; |
148 | struct drm_crtc *crtc = encoder->base.crtc; | |
149 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
150 | ||
9b4fd8f2 ACO |
151 | for_each_intel_connector(dev, connector) { |
152 | if (connector->base.state->best_encoder == &encoder->base) { | |
153 | found = connector; | |
0e32b39c DA |
154 | break; |
155 | } | |
156 | } | |
157 | ||
158 | if (!found) { | |
159 | DRM_ERROR("can't find connector\n"); | |
160 | return; | |
161 | } | |
162 | ||
e85376cb ML |
163 | /* MST encoders are bound to a crtc, not to a connector, |
164 | * force the mapping here for get_hw_state. | |
165 | */ | |
166 | found->encoder = encoder; | |
167 | ||
0e32b39c | 168 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
0552f765 DA |
169 | |
170 | intel_mst->connector = found; | |
0e32b39c DA |
171 | |
172 | if (intel_dp->active_mst_links == 0) { | |
d919161b | 173 | intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config); |
0e32b39c | 174 | |
32bdc400 VS |
175 | intel_prepare_dp_ddi_buffers(&intel_dig_port->base); |
176 | ||
901c2daf VS |
177 | intel_dp_set_link_params(intel_dp, intel_crtc->config); |
178 | ||
0e32b39c DA |
179 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |
180 | ||
181 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
182 | ||
0e32b39c | 183 | intel_dp_start_link_train(intel_dp); |
0e32b39c DA |
184 | intel_dp_stop_link_train(intel_dp); |
185 | } | |
186 | ||
187 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
0552f765 | 188 | intel_mst->connector->port, |
6e3c9717 | 189 | intel_crtc->config->pbn, &slots); |
0e32b39c DA |
190 | if (ret == false) { |
191 | DRM_ERROR("failed to allocate vcpi\n"); | |
192 | return; | |
193 | } | |
194 | ||
195 | ||
196 | intel_dp->active_mst_links++; | |
197 | temp = I915_READ(DP_TP_STATUS(port)); | |
198 | I915_WRITE(DP_TP_STATUS(port), temp); | |
199 | ||
200 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
201 | } | |
202 | ||
203 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
204 | { | |
205 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
206 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
207 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
208 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
fac5e23e | 209 | struct drm_i915_private *dev_priv = to_i915(dev); |
0e32b39c DA |
210 | enum port port = intel_dig_port->port; |
211 | int ret; | |
212 | ||
213 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
214 | ||
3016a31f CW |
215 | if (intel_wait_for_register(dev_priv, |
216 | DP_TP_STATUS(port), | |
217 | DP_TP_STATUS_ACT_SENT, | |
218 | DP_TP_STATUS_ACT_SENT, | |
219 | 1)) | |
0e32b39c DA |
220 | DRM_ERROR("Timed out waiting for ACT sent\n"); |
221 | ||
222 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
223 | ||
224 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
225 | } | |
226 | ||
227 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
228 | enum pipe *pipe) | |
229 | { | |
230 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
231 | *pipe = intel_mst->pipe; | |
0552f765 | 232 | if (intel_mst->connector) |
0e32b39c DA |
233 | return true; |
234 | return false; | |
235 | } | |
236 | ||
237 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 238 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
239 | { |
240 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
241 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
242 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
243 | struct drm_device *dev = encoder->base.dev; | |
fac5e23e | 244 | struct drm_i915_private *dev_priv = to_i915(dev); |
0cb09a97 | 245 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
0e32b39c DA |
246 | u32 temp, flags = 0; |
247 | ||
0e32b39c DA |
248 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); |
249 | if (temp & TRANS_DDI_PHSYNC) | |
250 | flags |= DRM_MODE_FLAG_PHSYNC; | |
251 | else | |
252 | flags |= DRM_MODE_FLAG_NHSYNC; | |
253 | if (temp & TRANS_DDI_PVSYNC) | |
254 | flags |= DRM_MODE_FLAG_PVSYNC; | |
255 | else | |
256 | flags |= DRM_MODE_FLAG_NVSYNC; | |
257 | ||
258 | switch (temp & TRANS_DDI_BPC_MASK) { | |
259 | case TRANS_DDI_BPC_6: | |
260 | pipe_config->pipe_bpp = 18; | |
261 | break; | |
262 | case TRANS_DDI_BPC_8: | |
263 | pipe_config->pipe_bpp = 24; | |
264 | break; | |
265 | case TRANS_DDI_BPC_10: | |
266 | pipe_config->pipe_bpp = 30; | |
267 | break; | |
268 | case TRANS_DDI_BPC_12: | |
269 | pipe_config->pipe_bpp = 36; | |
270 | break; | |
271 | default: | |
272 | break; | |
273 | } | |
2d112de7 | 274 | pipe_config->base.adjusted_mode.flags |= flags; |
90a6b7b0 VS |
275 | |
276 | pipe_config->lane_count = | |
277 | ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1; | |
278 | ||
0e32b39c DA |
279 | intel_dp_get_m_n(crtc, pipe_config); |
280 | ||
281 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
282 | } | |
283 | ||
284 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
285 | { | |
286 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
287 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
288 | struct edid *edid; | |
289 | int ret; | |
290 | ||
0552f765 DA |
291 | if (!intel_dp) { |
292 | return intel_connector_update_modes(connector, NULL); | |
293 | } | |
0e32b39c | 294 | |
0552f765 | 295 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
296 | ret = intel_connector_update_modes(connector, edid); |
297 | kfree(edid); | |
298 | ||
299 | return ret; | |
300 | } | |
301 | ||
302 | static enum drm_connector_status | |
f7f3d48a | 303 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
304 | { |
305 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
306 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
307 | ||
0552f765 DA |
308 | if (!intel_dp) |
309 | return connector_status_disconnected; | |
c6a0aed4 | 310 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
311 | } |
312 | ||
0e32b39c DA |
313 | static int |
314 | intel_dp_mst_set_property(struct drm_connector *connector, | |
315 | struct drm_property *property, | |
316 | uint64_t val) | |
317 | { | |
318 | return 0; | |
319 | } | |
320 | ||
321 | static void | |
322 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
323 | { | |
324 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
325 | ||
326 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
327 | kfree(intel_connector->edid); | |
328 | ||
329 | drm_connector_cleanup(connector); | |
330 | kfree(connector); | |
331 | } | |
332 | ||
333 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
4d688a2a | 334 | .dpms = drm_atomic_helper_connector_dpms, |
0e32b39c DA |
335 | .detect = intel_dp_mst_detect, |
336 | .fill_modes = drm_helper_probe_single_connector_modes, | |
337 | .set_property = intel_dp_mst_set_property, | |
2545e4a6 | 338 | .atomic_get_property = intel_connector_atomic_get_property, |
1ebaa0b9 | 339 | .late_register = intel_connector_register, |
c191eca1 | 340 | .early_unregister = intel_connector_unregister, |
0e32b39c | 341 | .destroy = intel_dp_mst_connector_destroy, |
c6f95f27 | 342 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
98969725 | 343 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
0e32b39c DA |
344 | }; |
345 | ||
346 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
347 | { | |
348 | return intel_dp_mst_get_ddc_modes(connector); | |
349 | } | |
350 | ||
351 | static enum drm_mode_status | |
352 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
353 | struct drm_display_mode *mode) | |
354 | { | |
832d5bfd MK |
355 | int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; |
356 | ||
0e32b39c DA |
357 | /* TODO - validate mode against available PBN for link */ |
358 | if (mode->clock < 10000) | |
359 | return MODE_CLOCK_LOW; | |
360 | ||
361 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
362 | return MODE_H_ILLEGAL; | |
363 | ||
832d5bfd MK |
364 | if (mode->clock > max_dotclk) |
365 | return MODE_CLOCK_HIGH; | |
366 | ||
0e32b39c DA |
367 | return MODE_OK; |
368 | } | |
369 | ||
459485ad DV |
370 | static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, |
371 | struct drm_connector_state *state) | |
372 | { | |
373 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
374 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
375 | struct intel_crtc *crtc = to_intel_crtc(state->crtc); | |
376 | ||
0552f765 DA |
377 | if (!intel_dp) |
378 | return NULL; | |
459485ad DV |
379 | return &intel_dp->mst_encoders[crtc->pipe]->base.base; |
380 | } | |
381 | ||
0e32b39c DA |
382 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
383 | { | |
384 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
385 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
0552f765 DA |
386 | if (!intel_dp) |
387 | return NULL; | |
0e32b39c DA |
388 | return &intel_dp->mst_encoders[0]->base.base; |
389 | } | |
390 | ||
391 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
392 | .get_modes = intel_dp_mst_get_modes, | |
393 | .mode_valid = intel_dp_mst_mode_valid, | |
459485ad | 394 | .atomic_best_encoder = intel_mst_atomic_best_encoder, |
0e32b39c DA |
395 | .best_encoder = intel_mst_best_encoder, |
396 | }; | |
397 | ||
398 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
399 | { | |
400 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
401 | ||
402 | drm_encoder_cleanup(encoder); | |
403 | kfree(intel_mst); | |
404 | } | |
405 | ||
406 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
407 | .destroy = intel_dp_mst_encoder_destroy, | |
408 | }; | |
409 | ||
410 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
411 | { | |
e85376cb | 412 | if (connector->encoder && connector->base.state->crtc) { |
0e32b39c DA |
413 | enum pipe pipe; |
414 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
415 | return false; | |
416 | return true; | |
417 | } | |
418 | return false; | |
419 | } | |
420 | ||
7296c849 CW |
421 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
422 | { | |
0695726e | 423 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
7296c849 | 424 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
54632abe LW |
425 | |
426 | if (dev_priv->fbdev) | |
427 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, | |
428 | &connector->base); | |
7296c849 CW |
429 | #endif |
430 | } | |
431 | ||
432 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
433 | { | |
0695726e | 434 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
7296c849 | 435 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
54632abe LW |
436 | |
437 | if (dev_priv->fbdev) | |
438 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, | |
439 | &connector->base); | |
7296c849 CW |
440 | #endif |
441 | } | |
442 | ||
12e6cecd | 443 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
444 | { |
445 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
446 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
447 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
448 | struct intel_connector *intel_connector; |
449 | struct drm_connector *connector; | |
450 | int i; | |
451 | ||
9bdbd0b9 | 452 | intel_connector = intel_connector_alloc(); |
0e32b39c DA |
453 | if (!intel_connector) |
454 | return NULL; | |
455 | ||
456 | connector = &intel_connector->base; | |
457 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
458 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
459 | ||
0e32b39c DA |
460 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; |
461 | intel_connector->mst_port = intel_dp; | |
462 | intel_connector->port = port; | |
463 | ||
464 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
465 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
466 | &intel_dp->mst_encoders[i]->base.base); | |
467 | } | |
468 | intel_dp_add_properties(intel_dp, connector); | |
469 | ||
470 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
471 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
472 | ||
0e32b39c | 473 | drm_mode_connector_set_path_property(connector, pathprop); |
d9515c5e DA |
474 | return connector; |
475 | } | |
476 | ||
477 | static void intel_dp_register_mst_connector(struct drm_connector *connector) | |
478 | { | |
479 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
480 | struct drm_device *dev = connector->dev; | |
7a418e34 | 481 | |
8bb4da1d | 482 | drm_modeset_lock_all(dev); |
7296c849 | 483 | intel_connector_add_to_fbdev(intel_connector); |
8bb4da1d | 484 | drm_modeset_unlock_all(dev); |
7a418e34 | 485 | |
0e32b39c | 486 | drm_connector_register(&intel_connector->base); |
0e32b39c DA |
487 | } |
488 | ||
489 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
490 | struct drm_connector *connector) | |
491 | { | |
492 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
493 | struct drm_device *dev = connector->dev; | |
20fae983 | 494 | |
c191eca1 | 495 | drm_connector_unregister(connector); |
1f771755 | 496 | |
0e32b39c | 497 | /* need to nuke the connector */ |
8bb4da1d | 498 | drm_modeset_lock_all(dev); |
7296c849 | 499 | intel_connector_remove_from_fbdev(intel_connector); |
0552f765 | 500 | intel_connector->mst_port = NULL; |
8bb4da1d | 501 | drm_modeset_unlock_all(dev); |
0e32b39c | 502 | |
0552f765 | 503 | drm_connector_unreference(&intel_connector->base); |
0e32b39c DA |
504 | DRM_DEBUG_KMS("\n"); |
505 | } | |
506 | ||
507 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
508 | { | |
509 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
510 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
511 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
512 | ||
513 | drm_kms_helper_hotplug_event(dev); | |
514 | } | |
515 | ||
69a0f89c | 516 | static const struct drm_dp_mst_topology_cbs mst_cbs = { |
0e32b39c | 517 | .add_connector = intel_dp_add_mst_connector, |
d9515c5e | 518 | .register_connector = intel_dp_register_mst_connector, |
0e32b39c DA |
519 | .destroy_connector = intel_dp_destroy_mst_connector, |
520 | .hotplug = intel_dp_mst_hotplug, | |
521 | }; | |
522 | ||
523 | static struct intel_dp_mst_encoder * | |
524 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
525 | { | |
526 | struct intel_dp_mst_encoder *intel_mst; | |
527 | struct intel_encoder *intel_encoder; | |
528 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
529 | ||
530 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
531 | ||
532 | if (!intel_mst) | |
533 | return NULL; | |
534 | ||
535 | intel_mst->pipe = pipe; | |
536 | intel_encoder = &intel_mst->base; | |
537 | intel_mst->primary = intel_dig_port; | |
538 | ||
539 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
580d8ed5 | 540 | DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); |
0e32b39c DA |
541 | |
542 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
543 | intel_encoder->crtc_mask = 0x7; | |
544 | intel_encoder->cloneable = 0; | |
545 | ||
546 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
547 | intel_encoder->disable = intel_mst_disable_dp; | |
548 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
549 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
550 | intel_encoder->enable = intel_mst_enable_dp; | |
551 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
552 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
553 | ||
554 | return intel_mst; | |
555 | ||
556 | } | |
557 | ||
558 | static bool | |
559 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
560 | { | |
561 | int i; | |
562 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
563 | ||
564 | for (i = PIPE_A; i <= PIPE_C; i++) | |
565 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
566 | return true; | |
567 | } | |
568 | ||
569 | int | |
570 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
571 | { | |
572 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
573 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
574 | int ret; | |
575 | ||
576 | intel_dp->can_mst = true; | |
577 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
578 | ||
579 | /* create encoders */ | |
580 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
581 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
582 | if (ret) { | |
583 | intel_dp->can_mst = false; | |
584 | return ret; | |
585 | } | |
586 | return 0; | |
587 | } | |
588 | ||
589 | void | |
590 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
591 | { | |
592 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
593 | ||
594 | if (!intel_dp->can_mst) | |
595 | return; | |
596 | ||
597 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
598 | /* encoders will get killed by normal cleanup */ | |
599 | } |