[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_dp_mst.c

/*
 * Copyright © 2008 Intel Corporation
 *             2014 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 */

#include <drm/drmP.h>
#include "i915_drv.h"
#include "intel_drv.h"
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_edid.h>

static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
					struct intel_crtc_state *pipe_config)
{
	struct drm_device *dev = encoder->base.dev;
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_atomic_state *state;
	int bpp, i;
	int lane_count, slots;
	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
	struct drm_connector *drm_connector;
	struct intel_connector *connector, *found = NULL;
	struct drm_connector_state *connector_state;
	int mst_pbn;

	pipe_config->dp_encoder_is_mst = true;
	pipe_config->has_pch_encoder = false;
	pipe_config->has_dp_encoder = true;
	bpp = 24;
	/*
	 * for MST we always configure max link bw - the spec doesn't
	 * seem to suggest we should do otherwise.
	 */
	lane_count = drm_dp_max_lane_count(intel_dp->dpcd);


	pipe_config->lane_count = lane_count;

	pipe_config->pipe_bpp = 24;
	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);

	state = pipe_config->base.state;

	for_each_connector_in_state(state, drm_connector, connector_state, i) {
		connector = to_intel_connector(drm_connector);

		if (connector_state->best_encoder == &encoder->base) {
			found = connector;
			break;
		}
	}

	if (!found) {
		DRM_ERROR("can't find connector\n");
		return false;
	}

	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);

	pipe_config->pbn = mst_pbn;
	slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);

	intel_link_compute_m_n(bpp, lane_count,
			       adjusted_mode->crtc_clock,
			       pipe_config->port_clock,
			       &pipe_config->dp_m_n);

	pipe_config->dp_m_n.tu = slots;

	if (IS_HASWELL(dev) || IS_BROADWELL(dev))
		hsw_dp_set_ddi_pll_sel(pipe_config);

	return true;

}

static void intel_mst_disable_dp(struct intel_encoder *encoder)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	int ret;

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);

	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
	if (ret) {
		DRM_ERROR("failed to update payload %d\n", ret);
	}
}

static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	/* this can fail */
	drm_dp_check_act_status(&intel_dp->mst_mgr);
	/* and this can also fail */
	drm_dp_update_payload_part2(&intel_dp->mst_mgr);

	drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);

	intel_dp->active_mst_links--;
	intel_mst->port = NULL;
	if (intel_dp->active_mst_links == 0) {
		intel_dig_port->base.post_disable(&intel_dig_port->base);
		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
	}
}

static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_device *dev = encoder->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	enum port port = intel_dig_port->port;
	int ret;
	uint32_t temp;
	struct intel_connector *found = NULL, *connector;
	int slots;
	struct drm_crtc *crtc = encoder->base.crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	for_each_intel_connector(dev, connector) {
		if (connector->base.state->best_encoder == &encoder->base) {
			found = connector;
			break;
		}
	}

	if (!found) {
		DRM_ERROR("can't find connector\n");
		return;
	}

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
	intel_mst->port = found->port;

	if (intel_dp->active_mst_links == 0) {
		enum port port = intel_ddi_get_encoder_port(encoder);

		intel_dp_set_link_params(intel_dp, intel_crtc->config);

		/* FIXME: add support for SKL */
		if (INTEL_INFO(dev)->gen < 9)
			I915_WRITE(PORT_CLK_SEL(port),
				   intel_crtc->config->ddi_pll_sel);

		intel_ddi_init_dp_buf_reg(&intel_dig_port->base);

		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);


		intel_dp_start_link_train(intel_dp);
		intel_dp_complete_link_train(intel_dp);
		intel_dp_stop_link_train(intel_dp);
	}

	ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
				       intel_mst->port,
				       intel_crtc->config->pbn, &slots);
	if (ret == false) {
		DRM_ERROR("failed to allocate vcpi\n");
		return;
	}


	intel_dp->active_mst_links++;
	temp = I915_READ(DP_TP_STATUS(port));
	I915_WRITE(DP_TP_STATUS(port), temp);

	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
}

static void intel_mst_enable_dp(struct intel_encoder *encoder)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_device *dev = intel_dig_port->base.base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	enum port port = intel_dig_port->port;
	int ret;

	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);

	if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
		     1))
		DRM_ERROR("Timed out waiting for ACT sent\n");

	ret = drm_dp_check_act_status(&intel_dp->mst_mgr);

	ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
}

static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
				      enum pipe *pipe)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	*pipe = intel_mst->pipe;
	if (intel_mst->port)
		return true;
	return false;
}

static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
					struct intel_crtc_state *pipe_config)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
	struct drm_device *dev = encoder->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
	u32 temp, flags = 0;

	pipe_config->has_dp_encoder = true;

	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
	if (temp & TRANS_DDI_PHSYNC)
		flags |= DRM_MODE_FLAG_PHSYNC;
	else
		flags |= DRM_MODE_FLAG_NHSYNC;
	if (temp & TRANS_DDI_PVSYNC)
		flags |= DRM_MODE_FLAG_PVSYNC;
	else
		flags |= DRM_MODE_FLAG_NVSYNC;

	switch (temp & TRANS_DDI_BPC_MASK) {
	case TRANS_DDI_BPC_6:
		pipe_config->pipe_bpp = 18;
		break;
	case TRANS_DDI_BPC_8:
		pipe_config->pipe_bpp = 24;
		break;
	case TRANS_DDI_BPC_10:
		pipe_config->pipe_bpp = 30;
		break;
	case TRANS_DDI_BPC_12:
		pipe_config->pipe_bpp = 36;
		break;
	default:
		break;
	}
	pipe_config->base.adjusted_mode.flags |= flags;

	pipe_config->lane_count =
		((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;

	intel_dp_get_m_n(crtc, pipe_config);

	intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
}

static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;
	struct edid *edid;
	int ret;

	edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
	if (!edid)
		return 0;

	ret = intel_connector_update_modes(connector, edid);
	kfree(edid);

	return ret;
}

static enum drm_connector_status
intel_dp_mst_detect(struct drm_connector *connector, bool force)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;

	return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
}

static int
intel_dp_mst_set_property(struct drm_connector *connector,
			  struct drm_property *property,
			  uint64_t val)
{
	return 0;
}

static void
intel_dp_mst_connector_destroy(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);

	if (!IS_ERR_OR_NULL(intel_connector->edid))
		kfree(intel_connector->edid);

	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
	.dpms = drm_atomic_helper_connector_dpms,
	.detect = intel_dp_mst_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.set_property = intel_dp_mst_set_property,
	.atomic_get_property = intel_connector_atomic_get_property,
	.destroy = intel_dp_mst_connector_destroy,
	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
};

static int intel_dp_mst_get_modes(struct drm_connector *connector)
{
	return intel_dp_mst_get_ddc_modes(connector);
}

static enum drm_mode_status
intel_dp_mst_mode_valid(struct drm_connector *connector,
			struct drm_display_mode *mode)
{
	/* TODO - validate mode against available PBN for link */
	if (mode->clock < 10000)
		return MODE_CLOCK_LOW;

	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		return MODE_H_ILLEGAL;

	return MODE_OK;
}

static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
							 struct drm_connector_state *state)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;
	struct intel_crtc *crtc = to_intel_crtc(state->crtc);

	return &intel_dp->mst_encoders[crtc->pipe]->base.base;
}

static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct intel_dp *intel_dp = intel_connector->mst_port;
	return &intel_dp->mst_encoders[0]->base.base;
}

static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
	.get_modes = intel_dp_mst_get_modes,
	.mode_valid = intel_dp_mst_mode_valid,
	.atomic_best_encoder = intel_mst_atomic_best_encoder,
	.best_encoder = intel_mst_best_encoder,
};

static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
{
	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);

	drm_encoder_cleanup(encoder);
	kfree(intel_mst);
}

static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
	.destroy = intel_dp_mst_encoder_destroy,
};

static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
{
	if (connector->encoder) {
		enum pipe pipe;
		if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
			return false;
		return true;
	}
	return false;
}

static void intel_connector_add_to_fbdev(struct intel_connector *connector)
{
#ifdef CONFIG_DRM_FBDEV_EMULATION
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
#endif
}

static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
{
#ifdef CONFIG_DRM_FBDEV_EMULATION
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
#endif
}

static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
{
	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	struct drm_device *dev = intel_dig_port->base.base.dev;
	struct intel_connector *intel_connector;
	struct drm_connector *connector;
	int i;

	intel_connector = intel_connector_alloc();
	if (!intel_connector)
		return NULL;

	connector = &intel_connector->base;
	drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
	drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);

	intel_connector->unregister = intel_connector_unregister;
	intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
	intel_connector->mst_port = intel_dp;
	intel_connector->port = port;

	for (i = PIPE_A; i <= PIPE_C; i++) {
		drm_mode_connector_attach_encoder(&intel_connector->base,
						  &intel_dp->mst_encoders[i]->base.base);
	}
	intel_dp_add_properties(intel_dp, connector);

	drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
	drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);

	drm_mode_connector_set_path_property(connector, pathprop);
	drm_modeset_lock_all(dev);
	intel_connector_add_to_fbdev(intel_connector);
	drm_modeset_unlock_all(dev);
	drm_connector_register(&intel_connector->base);
	return connector;
}

static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
					   struct drm_connector *connector)
{
	struct intel_connector *intel_connector = to_intel_connector(connector);
	struct drm_device *dev = connector->dev;

	/* need to nuke the connector */
	drm_modeset_lock_all(dev);
	if (connector->state->crtc) {
		struct drm_mode_set set;
		int ret;

		memset(&set, 0, sizeof(set));
		set.crtc = connector->state->crtc,

		ret = drm_atomic_helper_set_config(&set);

		WARN(ret, "Disabling mst crtc failed with %i\n", ret);
	}
	drm_modeset_unlock_all(dev);

	intel_connector->unregister(intel_connector);

	drm_modeset_lock_all(dev);
	intel_connector_remove_from_fbdev(intel_connector);
	drm_connector_cleanup(connector);
	drm_modeset_unlock_all(dev);

	kfree(intel_connector);
	DRM_DEBUG_KMS("\n");
}

static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
{
	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	struct drm_device *dev = intel_dig_port->base.base.dev;

	drm_kms_helper_hotplug_event(dev);
}

static struct drm_dp_mst_topology_cbs mst_cbs = {
	.add_connector = intel_dp_add_mst_connector,
	.destroy_connector = intel_dp_destroy_mst_connector,
	.hotplug = intel_dp_mst_hotplug,
};

static struct intel_dp_mst_encoder *
intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
{
	struct intel_dp_mst_encoder *intel_mst;
	struct intel_encoder *intel_encoder;
	struct drm_device *dev = intel_dig_port->base.base.dev;

	intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);

	if (!intel_mst)
		return NULL;

	intel_mst->pipe = pipe;
	intel_encoder = &intel_mst->base;
	intel_mst->primary = intel_dig_port;

	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
			 DRM_MODE_ENCODER_DPMST);

	intel_encoder->type = INTEL_OUTPUT_DP_MST;
	intel_encoder->crtc_mask = 0x7;
	intel_encoder->cloneable = 0;

	intel_encoder->compute_config = intel_dp_mst_compute_config;
	intel_encoder->disable = intel_mst_disable_dp;
	intel_encoder->post_disable = intel_mst_post_disable_dp;
	intel_encoder->pre_enable = intel_mst_pre_enable_dp;
	intel_encoder->enable = intel_mst_enable_dp;
	intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
	intel_encoder->get_config = intel_dp_mst_enc_get_config;

	return intel_mst;

}

static bool
intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
{
	int i;
	struct intel_dp *intel_dp = &intel_dig_port->dp;

	for (i = PIPE_A; i <= PIPE_C; i++)
		intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
	return true;
}

int
intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
{
	struct intel_dp *intel_dp = &intel_dig_port->dp;
	struct drm_device *dev = intel_dig_port->base.base.dev;
	int ret;

	intel_dp->can_mst = true;
	intel_dp->mst_mgr.cbs = &mst_cbs;

	/* create encoders */
	intel_dp_create_fake_mst_encoders(intel_dig_port);
	ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
	if (ret) {
		intel_dp->can_mst = false;
		return ret;
	}
	return 0;
}

void
intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
{
	struct intel_dp *intel_dp = &intel_dig_port->dp;

	if (!intel_dp->can_mst)
		return;

	drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
	/* encoders will get killed by normal cleanup */
}
Commit	Line	Data
0e32b39c DA	1	/*
	2	* Copyright © 2008 Intel Corporation
	3	* 2014 Red Hat Inc.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	22	* IN THE SOFTWARE.
	23	*
	24	*/
	25
	26	#include <drm/drmP.h>
	27	#include "i915_drv.h"
	28	#include "intel_drv.h"
c6f95f27	29	#include <drm/drm_atomic_helper.h>
0e32b39c DA	30	#include <drm/drm_crtc_helper.h>
	31	#include <drm/drm_edid.h>
	32
	33	static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
5cec258b	34	struct intel_crtc_state *pipe_config)
0e32b39c	35	{
6fa2d197	36	struct drm_device *dev = encoder->base.dev;
0e32b39c DA	37	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	38	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	39	struct intel_dp *intel_dp = &intel_dig_port->dp;
e75f4771 ACO	40	struct drm_atomic_state *state;
e75f4771 ACO	41	int bpp, i;
04a60f9f	42	int lane_count, slots;
2d112de7	43	struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
da3ced29 ACO	44	struct drm_connector *drm_connector;
	45	struct intel_connector connector, found = NULL;
	46	struct drm_connector_state *connector_state;
0e32b39c DA	47	int mst_pbn;
	48
	49	pipe_config->dp_encoder_is_mst = true;
	50	pipe_config->has_pch_encoder = false;
	51	pipe_config->has_dp_encoder = true;
	52	bpp = 24;
	53	/*
	54	* for MST we always configure max link bw - the spec doesn't
	55	* seem to suggest we should do otherwise.
	56	*/
	57	lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
ed4e9c1d	58
ed4e9c1d	59
90a6b7b0	60	pipe_config->lane_count = lane_count;
0e32b39c DA	61
0e32b39c DA	62	pipe_config->pipe_bpp = 24;
04a60f9f	63	pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
0e32b39c	64
e75f4771 ACO	65	state = pipe_config->base.state;
e75f4771 ACO	66
da3ced29 ACO	67	for_each_connector_in_state(state, drm_connector, connector_state, i) {
da3ced29 ACO	68	connector = to_intel_connector(drm_connector);
e75f4771	69
da3ced29 ACO	70	if (connector_state->best_encoder == &encoder->base) {
da3ced29 ACO	71	found = connector;
0e32b39c DA	72	break;
	73	}
	74	}
	75
	76	if (!found) {
	77	DRM_ERROR("can't find connector\n");
	78	return false;
	79	}
	80
	81	mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
	82
	83	pipe_config->pbn = mst_pbn;
	84	slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
	85
	86	intel_link_compute_m_n(bpp, lane_count,
	87	adjusted_mode->crtc_clock,
	88	pipe_config->port_clock,
	89	&pipe_config->dp_m_n);
	90
	91	pipe_config->dp_m_n.tu = slots;
6fa2d197 ACO	92
	93	if (IS_HASWELL(dev) \|\| IS_BROADWELL(dev))
	94	hsw_dp_set_ddi_pll_sel(pipe_config);
	95
0e32b39c DA	96	return true;
	97
	98	}
	99
	100	static void intel_mst_disable_dp(struct intel_encoder *encoder)
	101	{
	102	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	103	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	104	struct intel_dp *intel_dp = &intel_dig_port->dp;
	105	int ret;
	106
	107	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
	108
	109	drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
	110
	111	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
	112	if (ret) {
	113	DRM_ERROR("failed to update payload %d\n", ret);
	114	}
	115	}
	116
	117	static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
	118	{
	119	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	120	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	121	struct intel_dp *intel_dp = &intel_dig_port->dp;
	122
	123	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
	124
	125	/* this can fail */
	126	drm_dp_check_act_status(&intel_dp->mst_mgr);
	127	/* and this can also fail */
	128	drm_dp_update_payload_part2(&intel_dp->mst_mgr);
	129
	130	drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
	131
	132	intel_dp->active_mst_links--;
	133	intel_mst->port = NULL;
	134	if (intel_dp->active_mst_links == 0) {
	135	intel_dig_port->base.post_disable(&intel_dig_port->base);
	136	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
	137	}
	138	}
	139
	140	static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
	141	{
	142	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	143	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	144	struct intel_dp *intel_dp = &intel_dig_port->dp;
	145	struct drm_device *dev = encoder->base.dev;
	146	struct drm_i915_private *dev_priv = dev->dev_private;
	147	enum port port = intel_dig_port->port;
	148	int ret;
	149	uint32_t temp;
9b4fd8f2	150	struct intel_connector found = NULL, connector;
0e32b39c DA	151	int slots;
	152	struct drm_crtc *crtc = encoder->base.crtc;
	153	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	154
9b4fd8f2 ACO	155	for_each_intel_connector(dev, connector) {
	156	if (connector->base.state->best_encoder == &encoder->base) {
	157	found = connector;
0e32b39c DA	158	break;
	159	}
	160	}
	161
	162	if (!found) {
	163	DRM_ERROR("can't find connector\n");
	164	return;
	165	}
	166
	167	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
	168	intel_mst->port = found->port;
	169
	170	if (intel_dp->active_mst_links == 0) {
	171	enum port port = intel_ddi_get_encoder_port(encoder);
	172
901c2daf VS	173	intel_dp_set_link_params(intel_dp, intel_crtc->config);
901c2daf VS	174
1ab23380 S	175	/* FIXME: add support for SKL */
	176	if (INTEL_INFO(dev)->gen < 9)
	177	I915_WRITE(PORT_CLK_SEL(port),
	178	intel_crtc->config->ddi_pll_sel);
0e32b39c DA	179
	180	intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
	181
	182	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
	183
	184
	185	intel_dp_start_link_train(intel_dp);
	186	intel_dp_complete_link_train(intel_dp);
	187	intel_dp_stop_link_train(intel_dp);
	188	}
	189
	190	ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
6e3c9717 ACO	191	intel_mst->port,
6e3c9717 ACO	192	intel_crtc->config->pbn, &slots);
0e32b39c DA	193	if (ret == false) {
	194	DRM_ERROR("failed to allocate vcpi\n");
	195	return;
	196	}
	197
	198
	199	intel_dp->active_mst_links++;
	200	temp = I915_READ(DP_TP_STATUS(port));
	201	I915_WRITE(DP_TP_STATUS(port), temp);
	202
	203	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
	204	}
	205
	206	static void intel_mst_enable_dp(struct intel_encoder *encoder)
	207	{
	208	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	209	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	210	struct intel_dp *intel_dp = &intel_dig_port->dp;
	211	struct drm_device *dev = intel_dig_port->base.base.dev;
	212	struct drm_i915_private *dev_priv = dev->dev_private;
	213	enum port port = intel_dig_port->port;
	214	int ret;
	215
	216	DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
	217
	218	if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
	219	1))
	220	DRM_ERROR("Timed out waiting for ACT sent\n");
	221
	222	ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
	223
	224	ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
	225	}
	226
	227	static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
	228	enum pipe *pipe)
	229	{
	230	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	231	*pipe = intel_mst->pipe;
	232	if (intel_mst->port)
	233	return true;
	234	return false;
	235	}
	236
	237	static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
5cec258b	238	struct intel_crtc_state *pipe_config)
0e32b39c DA	239	{
	240	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
	241	struct intel_digital_port *intel_dig_port = intel_mst->primary;
	242	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
	243	struct drm_device *dev = encoder->base.dev;
	244	struct drm_i915_private *dev_priv = dev->dev_private;
0cb09a97	245	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
0e32b39c DA	246	u32 temp, flags = 0;
	247
	248	pipe_config->has_dp_encoder = true;
	249
	250	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
	251	if (temp & TRANS_DDI_PHSYNC)
	252	flags \|= DRM_MODE_FLAG_PHSYNC;
	253	else
	254	flags \|= DRM_MODE_FLAG_NHSYNC;
	255	if (temp & TRANS_DDI_PVSYNC)
	256	flags \|= DRM_MODE_FLAG_PVSYNC;
	257	else
	258	flags \|= DRM_MODE_FLAG_NVSYNC;
	259
	260	switch (temp & TRANS_DDI_BPC_MASK) {
	261	case TRANS_DDI_BPC_6:
	262	pipe_config->pipe_bpp = 18;
	263	break;
	264	case TRANS_DDI_BPC_8:
	265	pipe_config->pipe_bpp = 24;
	266	break;
	267	case TRANS_DDI_BPC_10:
	268	pipe_config->pipe_bpp = 30;
	269	break;
	270	case TRANS_DDI_BPC_12:
	271	pipe_config->pipe_bpp = 36;
	272	break;
	273	default:
	274	break;
	275	}
2d112de7	276	pipe_config->base.adjusted_mode.flags \|= flags;
90a6b7b0 VS	277
	278	pipe_config->lane_count =
	279	((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
	280
0e32b39c DA	281	intel_dp_get_m_n(crtc, pipe_config);
	282
	283	intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
	284	}
	285
	286	static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
	287	{
	288	struct intel_connector *intel_connector = to_intel_connector(connector);
	289	struct intel_dp *intel_dp = intel_connector->mst_port;
	290	struct edid *edid;
	291	int ret;
	292
	293	edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
	294	if (!edid)
	295	return 0;
	296
	297	ret = intel_connector_update_modes(connector, edid);
	298	kfree(edid);
	299
	300	return ret;
	301	}
	302
	303	static enum drm_connector_status
f7f3d48a	304	intel_dp_mst_detect(struct drm_connector *connector, bool force)
0e32b39c DA	305	{
	306	struct intel_connector *intel_connector = to_intel_connector(connector);
	307	struct intel_dp *intel_dp = intel_connector->mst_port;
	308
c6a0aed4	309	return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
0e32b39c DA	310	}
0e32b39c DA	311
0e32b39c DA	312	static int
	313	intel_dp_mst_set_property(struct drm_connector *connector,
	314	struct drm_property *property,
	315	uint64_t val)
	316	{
	317	return 0;
	318	}
	319
	320	static void
	321	intel_dp_mst_connector_destroy(struct drm_connector *connector)
	322	{
	323	struct intel_connector *intel_connector = to_intel_connector(connector);
	324
	325	if (!IS_ERR_OR_NULL(intel_connector->edid))
	326	kfree(intel_connector->edid);
	327
	328	drm_connector_cleanup(connector);
	329	kfree(connector);
	330	}
	331
	332	static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
4d688a2a	333	.dpms = drm_atomic_helper_connector_dpms,
0e32b39c DA	334	.detect = intel_dp_mst_detect,
	335	.fill_modes = drm_helper_probe_single_connector_modes,
	336	.set_property = intel_dp_mst_set_property,
2545e4a6	337	.atomic_get_property = intel_connector_atomic_get_property,
0e32b39c	338	.destroy = intel_dp_mst_connector_destroy,
c6f95f27	339	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
98969725	340	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
0e32b39c DA	341	};
	342
	343	static int intel_dp_mst_get_modes(struct drm_connector *connector)
	344	{
	345	return intel_dp_mst_get_ddc_modes(connector);
	346	}
	347
	348	static enum drm_mode_status
	349	intel_dp_mst_mode_valid(struct drm_connector *connector,
	350	struct drm_display_mode *mode)
	351	{
	352	/* TODO - validate mode against available PBN for link */
	353	if (mode->clock < 10000)
	354	return MODE_CLOCK_LOW;
	355
	356	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	357	return MODE_H_ILLEGAL;
	358
	359	return MODE_OK;
	360	}
	361
459485ad DV	362	static struct drm_encoder intel_mst_atomic_best_encoder(struct drm_connector connector,
	363	struct drm_connector_state *state)
	364	{
	365	struct intel_connector *intel_connector = to_intel_connector(connector);
	366	struct intel_dp *intel_dp = intel_connector->mst_port;
	367	struct intel_crtc *crtc = to_intel_crtc(state->crtc);
	368
	369	return &intel_dp->mst_encoders[crtc->pipe]->base.base;
	370	}
	371
0e32b39c DA	372	static struct drm_encoder intel_mst_best_encoder(struct drm_connector connector)
	373	{
	374	struct intel_connector *intel_connector = to_intel_connector(connector);
	375	struct intel_dp *intel_dp = intel_connector->mst_port;
	376	return &intel_dp->mst_encoders[0]->base.base;
	377	}
	378
	379	static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
	380	.get_modes = intel_dp_mst_get_modes,
	381	.mode_valid = intel_dp_mst_mode_valid,
459485ad	382	.atomic_best_encoder = intel_mst_atomic_best_encoder,
0e32b39c DA	383	.best_encoder = intel_mst_best_encoder,
	384	};
	385
	386	static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
	387	{
	388	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
	389
	390	drm_encoder_cleanup(encoder);
	391	kfree(intel_mst);
	392	}
	393
	394	static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
	395	.destroy = intel_dp_mst_encoder_destroy,
	396	};
	397
	398	static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
	399	{
	400	if (connector->encoder) {
	401	enum pipe pipe;
	402	if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
	403	return false;
	404	return true;
	405	}
	406	return false;
	407	}
	408
7296c849 CW	409	static void intel_connector_add_to_fbdev(struct intel_connector *connector)
7296c849 CW	410	{
0695726e	411	#ifdef CONFIG_DRM_FBDEV_EMULATION
7296c849 CW	412	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	413	drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
	414	#endif
	415	}
	416
	417	static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
	418	{
0695726e	419	#ifdef CONFIG_DRM_FBDEV_EMULATION
7296c849 CW	420	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	421	drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
	422	#endif
	423	}
	424
12e6cecd	425	static struct drm_connector intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr mgr, struct drm_dp_mst_port port, const char pathprop)
0e32b39c DA	426	{
	427	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	428	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	429	struct drm_device *dev = intel_dig_port->base.base.dev;
0e32b39c DA	430	struct intel_connector *intel_connector;
	431	struct drm_connector *connector;
	432	int i;
	433
9bdbd0b9	434	intel_connector = intel_connector_alloc();
0e32b39c DA	435	if (!intel_connector)
	436	return NULL;
	437
	438	connector = &intel_connector->base;
	439	drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
	440	drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
	441
	442	intel_connector->unregister = intel_connector_unregister;
	443	intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
	444	intel_connector->mst_port = intel_dp;
	445	intel_connector->port = port;
	446
	447	for (i = PIPE_A; i <= PIPE_C; i++) {
	448	drm_mode_connector_attach_encoder(&intel_connector->base,
	449	&intel_dp->mst_encoders[i]->base.base);
	450	}
	451	intel_dp_add_properties(intel_dp, connector);
	452
	453	drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
6f134d7b DA	454	drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
6f134d7b DA	455
0e32b39c	456	drm_mode_connector_set_path_property(connector, pathprop);
8bb4da1d	457	drm_modeset_lock_all(dev);
7296c849	458	intel_connector_add_to_fbdev(intel_connector);
8bb4da1d	459	drm_modeset_unlock_all(dev);
0e32b39c DA	460	drm_connector_register(&intel_connector->base);
	461	return connector;
	462	}
	463
	464	static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
	465	struct drm_connector *connector)
	466	{
	467	struct intel_connector *intel_connector = to_intel_connector(connector);
	468	struct drm_device *dev = connector->dev;
20fae983	469
0e32b39c	470	/* need to nuke the connector */
8bb4da1d	471	drm_modeset_lock_all(dev);
20fae983 ML	472	if (connector->state->crtc) {
	473	struct drm_mode_set set;
	474	int ret;
	475
	476	memset(&set, 0, sizeof(set));
	477	set.crtc = connector->state->crtc,
	478
	479	ret = drm_atomic_helper_set_config(&set);
	480
	481	WARN(ret, "Disabling mst crtc failed with %i\n", ret);
	482	}
8bb4da1d	483	drm_modeset_unlock_all(dev);
0e32b39c DA	484
	485	intel_connector->unregister(intel_connector);
	486
8bb4da1d	487	drm_modeset_lock_all(dev);
7296c849	488	intel_connector_remove_from_fbdev(intel_connector);
0e32b39c	489	drm_connector_cleanup(connector);
8bb4da1d	490	drm_modeset_unlock_all(dev);
0e32b39c	491
0e32b39c DA	492	kfree(intel_connector);
	493	DRM_DEBUG_KMS("\n");
	494	}
	495
	496	static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
	497	{
	498	struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
	499	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
	500	struct drm_device *dev = intel_dig_port->base.base.dev;
	501
	502	drm_kms_helper_hotplug_event(dev);
	503	}
	504
	505	static struct drm_dp_mst_topology_cbs mst_cbs = {
	506	.add_connector = intel_dp_add_mst_connector,
	507	.destroy_connector = intel_dp_destroy_mst_connector,
	508	.hotplug = intel_dp_mst_hotplug,
	509	};
	510
	511	static struct intel_dp_mst_encoder *
	512	intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
	513	{
	514	struct intel_dp_mst_encoder *intel_mst;
	515	struct intel_encoder *intel_encoder;
	516	struct drm_device *dev = intel_dig_port->base.base.dev;
	517
	518	intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
	519
	520	if (!intel_mst)
	521	return NULL;
	522
	523	intel_mst->pipe = pipe;
	524	intel_encoder = &intel_mst->base;
	525	intel_mst->primary = intel_dig_port;
	526
	527	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
	528	DRM_MODE_ENCODER_DPMST);
	529
	530	intel_encoder->type = INTEL_OUTPUT_DP_MST;
	531	intel_encoder->crtc_mask = 0x7;
	532	intel_encoder->cloneable = 0;
	533
	534	intel_encoder->compute_config = intel_dp_mst_compute_config;
	535	intel_encoder->disable = intel_mst_disable_dp;
	536	intel_encoder->post_disable = intel_mst_post_disable_dp;
	537	intel_encoder->pre_enable = intel_mst_pre_enable_dp;
	538	intel_encoder->enable = intel_mst_enable_dp;
	539	intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
	540	intel_encoder->get_config = intel_dp_mst_enc_get_config;
	541
	542	return intel_mst;
	543
	544	}
	545
	546	static bool
	547	intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
	548	{
	549	int i;
	550	struct intel_dp *intel_dp = &intel_dig_port->dp;
	551
	552	for (i = PIPE_A; i <= PIPE_C; i++)
	553	intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
	554	return true;
	555	}
556
557	int
558	intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
559	{
560	struct intel_dp *intel_dp = &intel_dig_port->dp;
561	struct drm_device *dev = intel_dig_port->base.base.dev;
562	int ret;
563
564	intel_dp->can_mst = true;
565	intel_dp->mst_mgr.cbs = &mst_cbs;
566
567	/* create encoders */
568	intel_dp_create_fake_mst_encoders(intel_dig_port);
569	ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
570	if (ret) {
571	intel_dp->can_mst = false;
572	return ret;
573	}
574	return 0;
575	}
576
577	void
578	intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
579	{
580	struct intel_dp *intel_dp = &intel_dig_port->dp;
581
582	if (!intel_dp->can_mst)
583	return;
584
585	drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
586	/* encoders will get killed by normal cleanup */
587	}