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0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
29 | #include <drm/drm_crtc_helper.h> | |
30 | #include <drm/drm_edid.h> | |
31 | ||
32 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 33 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
34 | { |
35 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
36 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
37 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
38 | struct drm_device *dev = encoder->base.dev; | |
39 | int bpp; | |
40 | int lane_count, slots; | |
2d112de7 | 41 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
0e32b39c DA |
42 | struct intel_connector *found = NULL, *intel_connector; |
43 | int mst_pbn; | |
44 | ||
45 | pipe_config->dp_encoder_is_mst = true; | |
46 | pipe_config->has_pch_encoder = false; | |
47 | pipe_config->has_dp_encoder = true; | |
48 | bpp = 24; | |
49 | /* | |
50 | * for MST we always configure max link bw - the spec doesn't | |
51 | * seem to suggest we should do otherwise. | |
52 | */ | |
53 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
54 | intel_dp->link_bw = intel_dp_max_link_bw(intel_dp); | |
55 | intel_dp->lane_count = lane_count; | |
56 | ||
57 | pipe_config->pipe_bpp = 24; | |
58 | pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); | |
59 | ||
60 | list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) { | |
61 | if (intel_connector->new_encoder == encoder) { | |
62 | found = intel_connector; | |
63 | break; | |
64 | } | |
65 | } | |
66 | ||
67 | if (!found) { | |
68 | DRM_ERROR("can't find connector\n"); | |
69 | return false; | |
70 | } | |
71 | ||
72 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); | |
73 | ||
74 | pipe_config->pbn = mst_pbn; | |
75 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
76 | ||
77 | intel_link_compute_m_n(bpp, lane_count, | |
78 | adjusted_mode->crtc_clock, | |
79 | pipe_config->port_clock, | |
80 | &pipe_config->dp_m_n); | |
81 | ||
82 | pipe_config->dp_m_n.tu = slots; | |
83 | return true; | |
84 | ||
85 | } | |
86 | ||
87 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
88 | { | |
89 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
90 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
91 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
92 | int ret; | |
93 | ||
94 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
95 | ||
96 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); | |
97 | ||
98 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
99 | if (ret) { | |
100 | DRM_ERROR("failed to update payload %d\n", ret); | |
101 | } | |
102 | } | |
103 | ||
104 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
105 | { | |
106 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
107 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
108 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
109 | ||
110 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
111 | ||
112 | /* this can fail */ | |
113 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
114 | /* and this can also fail */ | |
115 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
116 | ||
117 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); | |
118 | ||
119 | intel_dp->active_mst_links--; | |
120 | intel_mst->port = NULL; | |
121 | if (intel_dp->active_mst_links == 0) { | |
122 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
123 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
124 | } | |
125 | } | |
126 | ||
127 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
128 | { | |
129 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
130 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
131 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
132 | struct drm_device *dev = encoder->base.dev; | |
133 | struct drm_i915_private *dev_priv = dev->dev_private; | |
134 | enum port port = intel_dig_port->port; | |
135 | int ret; | |
136 | uint32_t temp; | |
137 | struct intel_connector *found = NULL, *intel_connector; | |
138 | int slots; | |
139 | struct drm_crtc *crtc = encoder->base.crtc; | |
140 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
141 | ||
142 | list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) { | |
143 | if (intel_connector->new_encoder == encoder) { | |
144 | found = intel_connector; | |
145 | break; | |
146 | } | |
147 | } | |
148 | ||
149 | if (!found) { | |
150 | DRM_ERROR("can't find connector\n"); | |
151 | return; | |
152 | } | |
153 | ||
154 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
155 | intel_mst->port = found->port; | |
156 | ||
157 | if (intel_dp->active_mst_links == 0) { | |
158 | enum port port = intel_ddi_get_encoder_port(encoder); | |
159 | ||
6e3c9717 ACO |
160 | I915_WRITE(PORT_CLK_SEL(port), |
161 | intel_crtc->config->ddi_pll_sel); | |
0e32b39c DA |
162 | |
163 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); | |
164 | ||
165 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
166 | ||
167 | ||
168 | intel_dp_start_link_train(intel_dp); | |
169 | intel_dp_complete_link_train(intel_dp); | |
170 | intel_dp_stop_link_train(intel_dp); | |
171 | } | |
172 | ||
173 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
6e3c9717 ACO |
174 | intel_mst->port, |
175 | intel_crtc->config->pbn, &slots); | |
0e32b39c DA |
176 | if (ret == false) { |
177 | DRM_ERROR("failed to allocate vcpi\n"); | |
178 | return; | |
179 | } | |
180 | ||
181 | ||
182 | intel_dp->active_mst_links++; | |
183 | temp = I915_READ(DP_TP_STATUS(port)); | |
184 | I915_WRITE(DP_TP_STATUS(port), temp); | |
185 | ||
186 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
187 | } | |
188 | ||
189 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
190 | { | |
191 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
192 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
193 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
194 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
195 | struct drm_i915_private *dev_priv = dev->dev_private; | |
196 | enum port port = intel_dig_port->port; | |
197 | int ret; | |
198 | ||
199 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
200 | ||
201 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), | |
202 | 1)) | |
203 | DRM_ERROR("Timed out waiting for ACT sent\n"); | |
204 | ||
205 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
206 | ||
207 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
208 | } | |
209 | ||
210 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
211 | enum pipe *pipe) | |
212 | { | |
213 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
214 | *pipe = intel_mst->pipe; | |
215 | if (intel_mst->port) | |
216 | return true; | |
217 | return false; | |
218 | } | |
219 | ||
220 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 221 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
222 | { |
223 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
224 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
225 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
226 | struct drm_device *dev = encoder->base.dev; | |
227 | struct drm_i915_private *dev_priv = dev->dev_private; | |
6e3c9717 | 228 | enum transcoder cpu_transcoder = crtc->config->cpu_transcoder; |
0e32b39c DA |
229 | u32 temp, flags = 0; |
230 | ||
231 | pipe_config->has_dp_encoder = true; | |
232 | ||
233 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | |
234 | if (temp & TRANS_DDI_PHSYNC) | |
235 | flags |= DRM_MODE_FLAG_PHSYNC; | |
236 | else | |
237 | flags |= DRM_MODE_FLAG_NHSYNC; | |
238 | if (temp & TRANS_DDI_PVSYNC) | |
239 | flags |= DRM_MODE_FLAG_PVSYNC; | |
240 | else | |
241 | flags |= DRM_MODE_FLAG_NVSYNC; | |
242 | ||
243 | switch (temp & TRANS_DDI_BPC_MASK) { | |
244 | case TRANS_DDI_BPC_6: | |
245 | pipe_config->pipe_bpp = 18; | |
246 | break; | |
247 | case TRANS_DDI_BPC_8: | |
248 | pipe_config->pipe_bpp = 24; | |
249 | break; | |
250 | case TRANS_DDI_BPC_10: | |
251 | pipe_config->pipe_bpp = 30; | |
252 | break; | |
253 | case TRANS_DDI_BPC_12: | |
254 | pipe_config->pipe_bpp = 36; | |
255 | break; | |
256 | default: | |
257 | break; | |
258 | } | |
2d112de7 | 259 | pipe_config->base.adjusted_mode.flags |= flags; |
0e32b39c DA |
260 | intel_dp_get_m_n(crtc, pipe_config); |
261 | ||
262 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
263 | } | |
264 | ||
265 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
266 | { | |
267 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
268 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
269 | struct edid *edid; | |
270 | int ret; | |
271 | ||
272 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); | |
273 | if (!edid) | |
274 | return 0; | |
275 | ||
276 | ret = intel_connector_update_modes(connector, edid); | |
277 | kfree(edid); | |
278 | ||
279 | return ret; | |
280 | } | |
281 | ||
282 | static enum drm_connector_status | |
f7f3d48a | 283 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
284 | { |
285 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
286 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
287 | ||
c6a0aed4 | 288 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
289 | } |
290 | ||
0e32b39c DA |
291 | static int |
292 | intel_dp_mst_set_property(struct drm_connector *connector, | |
293 | struct drm_property *property, | |
294 | uint64_t val) | |
295 | { | |
296 | return 0; | |
297 | } | |
298 | ||
299 | static void | |
300 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
301 | { | |
302 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
303 | ||
304 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
305 | kfree(intel_connector->edid); | |
306 | ||
307 | drm_connector_cleanup(connector); | |
308 | kfree(connector); | |
309 | } | |
310 | ||
311 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
312 | .dpms = intel_connector_dpms, | |
313 | .detect = intel_dp_mst_detect, | |
314 | .fill_modes = drm_helper_probe_single_connector_modes, | |
315 | .set_property = intel_dp_mst_set_property, | |
316 | .destroy = intel_dp_mst_connector_destroy, | |
317 | }; | |
318 | ||
319 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
320 | { | |
321 | return intel_dp_mst_get_ddc_modes(connector); | |
322 | } | |
323 | ||
324 | static enum drm_mode_status | |
325 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
326 | struct drm_display_mode *mode) | |
327 | { | |
328 | /* TODO - validate mode against available PBN for link */ | |
329 | if (mode->clock < 10000) | |
330 | return MODE_CLOCK_LOW; | |
331 | ||
332 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
333 | return MODE_H_ILLEGAL; | |
334 | ||
335 | return MODE_OK; | |
336 | } | |
337 | ||
338 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) | |
339 | { | |
340 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
341 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
342 | return &intel_dp->mst_encoders[0]->base.base; | |
343 | } | |
344 | ||
345 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
346 | .get_modes = intel_dp_mst_get_modes, | |
347 | .mode_valid = intel_dp_mst_mode_valid, | |
348 | .best_encoder = intel_mst_best_encoder, | |
349 | }; | |
350 | ||
351 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
352 | { | |
353 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
354 | ||
355 | drm_encoder_cleanup(encoder); | |
356 | kfree(intel_mst); | |
357 | } | |
358 | ||
359 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
360 | .destroy = intel_dp_mst_encoder_destroy, | |
361 | }; | |
362 | ||
363 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
364 | { | |
365 | if (connector->encoder) { | |
366 | enum pipe pipe; | |
367 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
368 | return false; | |
369 | return true; | |
370 | } | |
371 | return false; | |
372 | } | |
373 | ||
7296c849 CW |
374 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
375 | { | |
376 | #ifdef CONFIG_DRM_I915_FBDEV | |
377 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
378 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
379 | #endif | |
380 | } | |
381 | ||
382 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
383 | { | |
384 | #ifdef CONFIG_DRM_I915_FBDEV | |
385 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
386 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
387 | #endif | |
388 | } | |
389 | ||
12e6cecd | 390 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
391 | { |
392 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
393 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
394 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
395 | struct intel_connector *intel_connector; |
396 | struct drm_connector *connector; | |
397 | int i; | |
398 | ||
399 | intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); | |
400 | if (!intel_connector) | |
401 | return NULL; | |
402 | ||
403 | connector = &intel_connector->base; | |
404 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
405 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
406 | ||
407 | intel_connector->unregister = intel_connector_unregister; | |
408 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; | |
409 | intel_connector->mst_port = intel_dp; | |
410 | intel_connector->port = port; | |
411 | ||
412 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
413 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
414 | &intel_dp->mst_encoders[i]->base.base); | |
415 | } | |
416 | intel_dp_add_properties(intel_dp, connector); | |
417 | ||
418 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
419 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
420 | ||
0e32b39c DA |
421 | drm_mode_connector_set_path_property(connector, pathprop); |
422 | drm_reinit_primary_mode_group(dev); | |
423 | mutex_lock(&dev->mode_config.mutex); | |
7296c849 | 424 | intel_connector_add_to_fbdev(intel_connector); |
0e32b39c DA |
425 | mutex_unlock(&dev->mode_config.mutex); |
426 | drm_connector_register(&intel_connector->base); | |
427 | return connector; | |
428 | } | |
429 | ||
430 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
431 | struct drm_connector *connector) | |
432 | { | |
433 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
434 | struct drm_device *dev = connector->dev; | |
0e32b39c DA |
435 | /* need to nuke the connector */ |
436 | mutex_lock(&dev->mode_config.mutex); | |
437 | intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
438 | mutex_unlock(&dev->mode_config.mutex); | |
439 | ||
440 | intel_connector->unregister(intel_connector); | |
441 | ||
442 | mutex_lock(&dev->mode_config.mutex); | |
7296c849 | 443 | intel_connector_remove_from_fbdev(intel_connector); |
0e32b39c DA |
444 | drm_connector_cleanup(connector); |
445 | mutex_unlock(&dev->mode_config.mutex); | |
446 | ||
447 | drm_reinit_primary_mode_group(dev); | |
448 | ||
449 | kfree(intel_connector); | |
450 | DRM_DEBUG_KMS("\n"); | |
451 | } | |
452 | ||
453 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
454 | { | |
455 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
456 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
457 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
458 | ||
459 | drm_kms_helper_hotplug_event(dev); | |
460 | } | |
461 | ||
462 | static struct drm_dp_mst_topology_cbs mst_cbs = { | |
463 | .add_connector = intel_dp_add_mst_connector, | |
464 | .destroy_connector = intel_dp_destroy_mst_connector, | |
465 | .hotplug = intel_dp_mst_hotplug, | |
466 | }; | |
467 | ||
468 | static struct intel_dp_mst_encoder * | |
469 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
470 | { | |
471 | struct intel_dp_mst_encoder *intel_mst; | |
472 | struct intel_encoder *intel_encoder; | |
473 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
474 | ||
475 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
476 | ||
477 | if (!intel_mst) | |
478 | return NULL; | |
479 | ||
480 | intel_mst->pipe = pipe; | |
481 | intel_encoder = &intel_mst->base; | |
482 | intel_mst->primary = intel_dig_port; | |
483 | ||
484 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
485 | DRM_MODE_ENCODER_DPMST); | |
486 | ||
487 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
488 | intel_encoder->crtc_mask = 0x7; | |
489 | intel_encoder->cloneable = 0; | |
490 | ||
491 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
492 | intel_encoder->disable = intel_mst_disable_dp; | |
493 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
494 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
495 | intel_encoder->enable = intel_mst_enable_dp; | |
496 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
497 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
498 | ||
499 | return intel_mst; | |
500 | ||
501 | } | |
502 | ||
503 | static bool | |
504 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
505 | { | |
506 | int i; | |
507 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
508 | ||
509 | for (i = PIPE_A; i <= PIPE_C; i++) | |
510 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
511 | return true; | |
512 | } | |
513 | ||
514 | int | |
515 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
516 | { | |
517 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
518 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
519 | int ret; | |
520 | ||
521 | intel_dp->can_mst = true; | |
522 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
523 | ||
524 | /* create encoders */ | |
525 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
526 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
527 | if (ret) { | |
528 | intel_dp->can_mst = false; | |
529 | return ret; | |
530 | } | |
531 | return 0; | |
532 | } | |
533 | ||
534 | void | |
535 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
536 | { | |
537 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
538 | ||
539 | if (!intel_dp->can_mst) | |
540 | return; | |
541 | ||
542 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
543 | /* encoders will get killed by normal cleanup */ | |
544 | } |