drm/i915/bxt: don't allow cached GEM mappings on A stepping
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_dp_mst.c
CommitLineData
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1/*
2 * Copyright © 2008 Intel Corporation
3 * 2014 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
26#include <drm/drmP.h>
27#include "i915_drv.h"
28#include "intel_drv.h"
c6f95f27 29#include <drm/drm_atomic_helper.h>
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30#include <drm/drm_crtc_helper.h>
31#include <drm/drm_edid.h>
32
33static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
5cec258b 34 struct intel_crtc_state *pipe_config)
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35{
36 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
37 struct intel_digital_port *intel_dig_port = intel_mst->primary;
38 struct intel_dp *intel_dp = &intel_dig_port->dp;
e75f4771
ACO
39 struct drm_atomic_state *state;
40 int bpp, i;
04a60f9f 41 int lane_count, slots;
2d112de7 42 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
da3ced29
ACO
43 struct drm_connector *drm_connector;
44 struct intel_connector *connector, *found = NULL;
45 struct drm_connector_state *connector_state;
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DA
46 int mst_pbn;
47
48 pipe_config->dp_encoder_is_mst = true;
49 pipe_config->has_pch_encoder = false;
50 pipe_config->has_dp_encoder = true;
51 bpp = 24;
52 /*
53 * for MST we always configure max link bw - the spec doesn't
54 * seem to suggest we should do otherwise.
55 */
56 lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
ed4e9c1d 57
ed4e9c1d 58
90a6b7b0 59 pipe_config->lane_count = lane_count;
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60
61 pipe_config->pipe_bpp = 24;
04a60f9f 62 pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
0e32b39c 63
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ACO
64 state = pipe_config->base.state;
65
da3ced29
ACO
66 for_each_connector_in_state(state, drm_connector, connector_state, i) {
67 connector = to_intel_connector(drm_connector);
e75f4771 68
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ACO
69 if (connector_state->best_encoder == &encoder->base) {
70 found = connector;
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71 break;
72 }
73 }
74
75 if (!found) {
76 DRM_ERROR("can't find connector\n");
77 return false;
78 }
79
80 mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
81
82 pipe_config->pbn = mst_pbn;
83 slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
84
85 intel_link_compute_m_n(bpp, lane_count,
86 adjusted_mode->crtc_clock,
87 pipe_config->port_clock,
88 &pipe_config->dp_m_n);
89
90 pipe_config->dp_m_n.tu = slots;
91 return true;
92
93}
94
95static void intel_mst_disable_dp(struct intel_encoder *encoder)
96{
97 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
98 struct intel_digital_port *intel_dig_port = intel_mst->primary;
99 struct intel_dp *intel_dp = &intel_dig_port->dp;
100 int ret;
101
102 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
103
104 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
105
106 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
107 if (ret) {
108 DRM_ERROR("failed to update payload %d\n", ret);
109 }
110}
111
112static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
113{
114 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
115 struct intel_digital_port *intel_dig_port = intel_mst->primary;
116 struct intel_dp *intel_dp = &intel_dig_port->dp;
117
118 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
119
120 /* this can fail */
121 drm_dp_check_act_status(&intel_dp->mst_mgr);
122 /* and this can also fail */
123 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
124
125 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
126
127 intel_dp->active_mst_links--;
128 intel_mst->port = NULL;
129 if (intel_dp->active_mst_links == 0) {
130 intel_dig_port->base.post_disable(&intel_dig_port->base);
131 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
132 }
133}
134
135static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
136{
137 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
138 struct intel_digital_port *intel_dig_port = intel_mst->primary;
139 struct intel_dp *intel_dp = &intel_dig_port->dp;
140 struct drm_device *dev = encoder->base.dev;
141 struct drm_i915_private *dev_priv = dev->dev_private;
142 enum port port = intel_dig_port->port;
143 int ret;
144 uint32_t temp;
9b4fd8f2 145 struct intel_connector *found = NULL, *connector;
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146 int slots;
147 struct drm_crtc *crtc = encoder->base.crtc;
148 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
149
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150 for_each_intel_connector(dev, connector) {
151 if (connector->base.state->best_encoder == &encoder->base) {
152 found = connector;
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153 break;
154 }
155 }
156
157 if (!found) {
158 DRM_ERROR("can't find connector\n");
159 return;
160 }
161
162 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
163 intel_mst->port = found->port;
164
165 if (intel_dp->active_mst_links == 0) {
166 enum port port = intel_ddi_get_encoder_port(encoder);
167
1ab23380
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168 /* FIXME: add support for SKL */
169 if (INTEL_INFO(dev)->gen < 9)
170 I915_WRITE(PORT_CLK_SEL(port),
171 intel_crtc->config->ddi_pll_sel);
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172
173 intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
174
175 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
176
177
178 intel_dp_start_link_train(intel_dp);
179 intel_dp_complete_link_train(intel_dp);
180 intel_dp_stop_link_train(intel_dp);
181 }
182
183 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
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184 intel_mst->port,
185 intel_crtc->config->pbn, &slots);
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186 if (ret == false) {
187 DRM_ERROR("failed to allocate vcpi\n");
188 return;
189 }
190
191
192 intel_dp->active_mst_links++;
193 temp = I915_READ(DP_TP_STATUS(port));
194 I915_WRITE(DP_TP_STATUS(port), temp);
195
196 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
197}
198
199static void intel_mst_enable_dp(struct intel_encoder *encoder)
200{
201 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
202 struct intel_digital_port *intel_dig_port = intel_mst->primary;
203 struct intel_dp *intel_dp = &intel_dig_port->dp;
204 struct drm_device *dev = intel_dig_port->base.base.dev;
205 struct drm_i915_private *dev_priv = dev->dev_private;
206 enum port port = intel_dig_port->port;
207 int ret;
208
209 DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
210
211 if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
212 1))
213 DRM_ERROR("Timed out waiting for ACT sent\n");
214
215 ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
216
217 ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
218}
219
220static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
221 enum pipe *pipe)
222{
223 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
224 *pipe = intel_mst->pipe;
225 if (intel_mst->port)
226 return true;
227 return false;
228}
229
230static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
5cec258b 231 struct intel_crtc_state *pipe_config)
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232{
233 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
234 struct intel_digital_port *intel_dig_port = intel_mst->primary;
235 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
236 struct drm_device *dev = encoder->base.dev;
237 struct drm_i915_private *dev_priv = dev->dev_private;
0cb09a97 238 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
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239 u32 temp, flags = 0;
240
241 pipe_config->has_dp_encoder = true;
242
243 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
244 if (temp & TRANS_DDI_PHSYNC)
245 flags |= DRM_MODE_FLAG_PHSYNC;
246 else
247 flags |= DRM_MODE_FLAG_NHSYNC;
248 if (temp & TRANS_DDI_PVSYNC)
249 flags |= DRM_MODE_FLAG_PVSYNC;
250 else
251 flags |= DRM_MODE_FLAG_NVSYNC;
252
253 switch (temp & TRANS_DDI_BPC_MASK) {
254 case TRANS_DDI_BPC_6:
255 pipe_config->pipe_bpp = 18;
256 break;
257 case TRANS_DDI_BPC_8:
258 pipe_config->pipe_bpp = 24;
259 break;
260 case TRANS_DDI_BPC_10:
261 pipe_config->pipe_bpp = 30;
262 break;
263 case TRANS_DDI_BPC_12:
264 pipe_config->pipe_bpp = 36;
265 break;
266 default:
267 break;
268 }
2d112de7 269 pipe_config->base.adjusted_mode.flags |= flags;
90a6b7b0
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270
271 pipe_config->lane_count =
272 ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
273
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274 intel_dp_get_m_n(crtc, pipe_config);
275
276 intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
277}
278
279static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
280{
281 struct intel_connector *intel_connector = to_intel_connector(connector);
282 struct intel_dp *intel_dp = intel_connector->mst_port;
283 struct edid *edid;
284 int ret;
285
286 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
287 if (!edid)
288 return 0;
289
290 ret = intel_connector_update_modes(connector, edid);
291 kfree(edid);
292
293 return ret;
294}
295
296static enum drm_connector_status
f7f3d48a 297intel_dp_mst_detect(struct drm_connector *connector, bool force)
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298{
299 struct intel_connector *intel_connector = to_intel_connector(connector);
300 struct intel_dp *intel_dp = intel_connector->mst_port;
301
c6a0aed4 302 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
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303}
304
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305static int
306intel_dp_mst_set_property(struct drm_connector *connector,
307 struct drm_property *property,
308 uint64_t val)
309{
310 return 0;
311}
312
313static void
314intel_dp_mst_connector_destroy(struct drm_connector *connector)
315{
316 struct intel_connector *intel_connector = to_intel_connector(connector);
317
318 if (!IS_ERR_OR_NULL(intel_connector->edid))
319 kfree(intel_connector->edid);
320
321 drm_connector_cleanup(connector);
322 kfree(connector);
323}
324
325static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
4d688a2a 326 .dpms = drm_atomic_helper_connector_dpms,
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327 .detect = intel_dp_mst_detect,
328 .fill_modes = drm_helper_probe_single_connector_modes,
329 .set_property = intel_dp_mst_set_property,
2545e4a6 330 .atomic_get_property = intel_connector_atomic_get_property,
0e32b39c 331 .destroy = intel_dp_mst_connector_destroy,
c6f95f27 332 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
98969725 333 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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334};
335
336static int intel_dp_mst_get_modes(struct drm_connector *connector)
337{
338 return intel_dp_mst_get_ddc_modes(connector);
339}
340
341static enum drm_mode_status
342intel_dp_mst_mode_valid(struct drm_connector *connector,
343 struct drm_display_mode *mode)
344{
345 /* TODO - validate mode against available PBN for link */
346 if (mode->clock < 10000)
347 return MODE_CLOCK_LOW;
348
349 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
350 return MODE_H_ILLEGAL;
351
352 return MODE_OK;
353}
354
459485ad
DV
355static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
356 struct drm_connector_state *state)
357{
358 struct intel_connector *intel_connector = to_intel_connector(connector);
359 struct intel_dp *intel_dp = intel_connector->mst_port;
360 struct intel_crtc *crtc = to_intel_crtc(state->crtc);
361
362 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
363}
364
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365static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
366{
367 struct intel_connector *intel_connector = to_intel_connector(connector);
368 struct intel_dp *intel_dp = intel_connector->mst_port;
369 return &intel_dp->mst_encoders[0]->base.base;
370}
371
372static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
373 .get_modes = intel_dp_mst_get_modes,
374 .mode_valid = intel_dp_mst_mode_valid,
459485ad 375 .atomic_best_encoder = intel_mst_atomic_best_encoder,
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376 .best_encoder = intel_mst_best_encoder,
377};
378
379static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
380{
381 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
382
383 drm_encoder_cleanup(encoder);
384 kfree(intel_mst);
385}
386
387static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
388 .destroy = intel_dp_mst_encoder_destroy,
389};
390
391static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
392{
393 if (connector->encoder) {
394 enum pipe pipe;
395 if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
396 return false;
397 return true;
398 }
399 return false;
400}
401
7296c849
CW
402static void intel_connector_add_to_fbdev(struct intel_connector *connector)
403{
404#ifdef CONFIG_DRM_I915_FBDEV
405 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
406 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
407#endif
408}
409
410static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
411{
412#ifdef CONFIG_DRM_I915_FBDEV
413 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
414 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
415#endif
416}
417
12e6cecd 418static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
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DA
419{
420 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
421 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
422 struct drm_device *dev = intel_dig_port->base.base.dev;
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423 struct intel_connector *intel_connector;
424 struct drm_connector *connector;
425 int i;
426
9bdbd0b9 427 intel_connector = intel_connector_alloc();
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DA
428 if (!intel_connector)
429 return NULL;
430
431 connector = &intel_connector->base;
432 drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
433 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
434
435 intel_connector->unregister = intel_connector_unregister;
436 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
437 intel_connector->mst_port = intel_dp;
438 intel_connector->port = port;
439
440 for (i = PIPE_A; i <= PIPE_C; i++) {
441 drm_mode_connector_attach_encoder(&intel_connector->base,
442 &intel_dp->mst_encoders[i]->base.base);
443 }
444 intel_dp_add_properties(intel_dp, connector);
445
446 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
6f134d7b
DA
447 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
448
0e32b39c 449 drm_mode_connector_set_path_property(connector, pathprop);
8bb4da1d 450 drm_modeset_lock_all(dev);
7296c849 451 intel_connector_add_to_fbdev(intel_connector);
8bb4da1d 452 drm_modeset_unlock_all(dev);
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453 drm_connector_register(&intel_connector->base);
454 return connector;
455}
456
457static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
458 struct drm_connector *connector)
459{
460 struct intel_connector *intel_connector = to_intel_connector(connector);
461 struct drm_device *dev = connector->dev;
20fae983 462
0e32b39c 463 /* need to nuke the connector */
8bb4da1d 464 drm_modeset_lock_all(dev);
20fae983
ML
465 if (connector->state->crtc) {
466 struct drm_mode_set set;
467 int ret;
468
469 memset(&set, 0, sizeof(set));
470 set.crtc = connector->state->crtc,
471
472 ret = drm_atomic_helper_set_config(&set);
473
474 WARN(ret, "Disabling mst crtc failed with %i\n", ret);
475 }
8bb4da1d 476 drm_modeset_unlock_all(dev);
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DA
477
478 intel_connector->unregister(intel_connector);
479
8bb4da1d 480 drm_modeset_lock_all(dev);
7296c849 481 intel_connector_remove_from_fbdev(intel_connector);
0e32b39c 482 drm_connector_cleanup(connector);
8bb4da1d 483 drm_modeset_unlock_all(dev);
0e32b39c 484
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DA
485 kfree(intel_connector);
486 DRM_DEBUG_KMS("\n");
487}
488
489static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
490{
491 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
492 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
493 struct drm_device *dev = intel_dig_port->base.base.dev;
494
495 drm_kms_helper_hotplug_event(dev);
496}
497
498static struct drm_dp_mst_topology_cbs mst_cbs = {
499 .add_connector = intel_dp_add_mst_connector,
500 .destroy_connector = intel_dp_destroy_mst_connector,
501 .hotplug = intel_dp_mst_hotplug,
502};
503
504static struct intel_dp_mst_encoder *
505intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
506{
507 struct intel_dp_mst_encoder *intel_mst;
508 struct intel_encoder *intel_encoder;
509 struct drm_device *dev = intel_dig_port->base.base.dev;
510
511 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
512
513 if (!intel_mst)
514 return NULL;
515
516 intel_mst->pipe = pipe;
517 intel_encoder = &intel_mst->base;
518 intel_mst->primary = intel_dig_port;
519
520 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
521 DRM_MODE_ENCODER_DPMST);
522
523 intel_encoder->type = INTEL_OUTPUT_DP_MST;
524 intel_encoder->crtc_mask = 0x7;
525 intel_encoder->cloneable = 0;
526
527 intel_encoder->compute_config = intel_dp_mst_compute_config;
528 intel_encoder->disable = intel_mst_disable_dp;
529 intel_encoder->post_disable = intel_mst_post_disable_dp;
530 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
531 intel_encoder->enable = intel_mst_enable_dp;
532 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
533 intel_encoder->get_config = intel_dp_mst_enc_get_config;
534
535 return intel_mst;
536
537}
538
539static bool
540intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
541{
542 int i;
543 struct intel_dp *intel_dp = &intel_dig_port->dp;
544
545 for (i = PIPE_A; i <= PIPE_C; i++)
546 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
547 return true;
548}
549
550int
551intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
552{
553 struct intel_dp *intel_dp = &intel_dig_port->dp;
554 struct drm_device *dev = intel_dig_port->base.base.dev;
555 int ret;
556
557 intel_dp->can_mst = true;
558 intel_dp->mst_mgr.cbs = &mst_cbs;
559
560 /* create encoders */
561 intel_dp_create_fake_mst_encoders(intel_dig_port);
562 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
563 if (ret) {
564 intel_dp->can_mst = false;
565 return ret;
566 }
567 return 0;
568}
569
570void
571intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
572{
573 struct intel_dp *intel_dp = &intel_dig_port->dp;
574
575 if (!intel_dp->can_mst)
576 return;
577
578 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
579 /* encoders will get killed by normal cleanup */
580}
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