[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_dvo.c

/*
 * Copyright 2006 Dave Airlie <airlied@linux.ie>
 * Copyright © 2006-2007 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 */
#include <linux/i2c.h>
#include <linux/slab.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"
#include "dvo.h"

#define SIL164_ADDR	0x38
#define CH7xxx_ADDR	0x76
#define TFP410_ADDR	0x38
#define NS2501_ADDR     0x38

static const struct intel_dvo_device intel_dvo_devices[] = {
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "sil164",
		.dvo_reg = DVOC,
		.slave_addr = SIL164_ADDR,
		.dev_ops = &sil164_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "ch7xxx",
		.dvo_reg = DVOC,
		.slave_addr = CH7xxx_ADDR,
		.dev_ops = &ch7xxx_ops,
	},
	{
		.type = INTEL_DVO_CHIP_LVDS,
		.name = "ivch",
		.dvo_reg = DVOA,
		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
		.dev_ops = &ivch_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "tfp410",
		.dvo_reg = DVOC,
		.slave_addr = TFP410_ADDR,
		.dev_ops = &tfp410_ops,
	},
	{
		.type = INTEL_DVO_CHIP_LVDS,
		.name = "ch7017",
		.dvo_reg = DVOC,
		.slave_addr = 0x75,
		.gpio = GMBUS_PORT_DPB,
		.dev_ops = &ch7017_ops,
	},
	{
	        .type = INTEL_DVO_CHIP_TMDS,
		.name = "ns2501",
		.dvo_reg = DVOC,
		.slave_addr = NS2501_ADDR,
		.dev_ops = &ns2501_ops,
       }
};

struct intel_dvo {
	struct intel_encoder base;

	struct intel_dvo_device dev;

	struct drm_display_mode *panel_fixed_mode;
	bool panel_wants_dither;
};

static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
{
	return container_of(encoder, struct intel_dvo, base.base);
}

static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
{
	return container_of(intel_attached_encoder(connector),
			    struct intel_dvo, base);
}

static void intel_disable_dvo(struct intel_encoder *encoder)
{
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
	u32 temp = I915_READ(dvo_reg);

	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
	I915_READ(dvo_reg);
}

static void intel_enable_dvo(struct intel_encoder *encoder)
{
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
	u32 temp = I915_READ(dvo_reg);

	I915_WRITE(dvo_reg, temp | DVO_ENABLE);
	I915_READ(dvo_reg);
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
}

static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_i915_private *dev_priv = encoder->dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
	u32 temp = I915_READ(dvo_reg);

	if (mode == DRM_MODE_DPMS_ON) {
		I915_WRITE(dvo_reg, temp | DVO_ENABLE);
		I915_READ(dvo_reg);
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
	} else {
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
		I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
		I915_READ(dvo_reg);
	}
}

static int intel_dvo_mode_valid(struct drm_connector *connector,
				struct drm_display_mode *mode)
{
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	/* XXX: Validate clock range */

	if (intel_dvo->panel_fixed_mode) {
		if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
			return MODE_PANEL;
		if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
			return MODE_PANEL;
	}

	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
}

static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
				 const struct drm_display_mode *mode,
				 struct drm_display_mode *adjusted_mode)
{
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	/* If we have timings from the BIOS for the panel, put them in
	 * to the adjusted mode.  The CRTC will be set up for this mode,
	 * with the panel scaling set up to source from the H/VDisplay
	 * of the original mode.
	 */
	if (intel_dvo->panel_fixed_mode != NULL) {
#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
		C(hdisplay);
		C(hsync_start);
		C(hsync_end);
		C(htotal);
		C(vdisplay);
		C(vsync_start);
		C(vsync_end);
		C(vtotal);
		C(clock);
#undef C
	}

	if (intel_dvo->dev.dev_ops->mode_fixup)
		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);

	return true;
}

static void intel_dvo_mode_set(struct drm_encoder *encoder,
			       struct drm_display_mode *mode,
			       struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	int pipe = intel_crtc->pipe;
	u32 dvo_val;
	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
	int dpll_reg = DPLL(pipe);

	switch (dvo_reg) {
	case DVOA:
	default:
		dvo_srcdim_reg = DVOA_SRCDIM;
		break;
	case DVOB:
		dvo_srcdim_reg = DVOB_SRCDIM;
		break;
	case DVOC:
		dvo_srcdim_reg = DVOC_SRCDIM;
		break;
	}

	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);

	/* Save the data order, since I don't know what it should be set to. */
	dvo_val = I915_READ(dvo_reg) &
		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
		   DVO_BLANK_ACTIVE_HIGH;

	if (pipe == 1)
		dvo_val |= DVO_PIPE_B_SELECT;
	dvo_val |= DVO_PIPE_STALL;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;

	I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);

	/*I915_WRITE(DVOB_SRCDIM,
	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
	I915_WRITE(dvo_srcdim_reg,
		   (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
		   (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
	/*I915_WRITE(DVOB, dvo_val);*/
	I915_WRITE(dvo_reg, dvo_val);
}

/**
 * Detect the output connection on our DVO device.
 *
 * Unimplemented.
 */
static enum drm_connector_status
intel_dvo_detect(struct drm_connector *connector, bool force)
{
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
}

static int intel_dvo_get_modes(struct drm_connector *connector)
{
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
	struct drm_i915_private *dev_priv = connector->dev->dev_private;

	/* We should probably have an i2c driver get_modes function for those
	 * devices which will have a fixed set of modes determined by the chip
	 * (TV-out, for example), but for now with just TMDS and LVDS,
	 * that's not the case.
	 */
	intel_ddc_get_modes(connector,
			    intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
	if (!list_empty(&connector->probed_modes))
		return 1;

	if (intel_dvo->panel_fixed_mode != NULL) {
		struct drm_display_mode *mode;
		mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
		if (mode) {
			drm_mode_probed_add(connector, mode);
			return 1;
		}
	}

	return 0;
}

static void intel_dvo_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
	.dpms = intel_dvo_dpms,
	.mode_fixup = intel_dvo_mode_fixup,
	.prepare = intel_encoder_noop,
	.mode_set = intel_dvo_mode_set,
	.commit = intel_encoder_noop,
	.disable = intel_encoder_disable,
};

static const struct drm_connector_funcs intel_dvo_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.detect = intel_dvo_detect,
	.destroy = intel_dvo_destroy,
	.fill_modes = drm_helper_probe_single_connector_modes,
};

static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
	.mode_valid = intel_dvo_mode_valid,
	.get_modes = intel_dvo_get_modes,
	.best_encoder = intel_best_encoder,
};

static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
{
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	if (intel_dvo->dev.dev_ops->destroy)
		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);

	kfree(intel_dvo->panel_fixed_mode);

	intel_encoder_destroy(encoder);
}

static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
	.destroy = intel_dvo_enc_destroy,
};

/**
 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 *
 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 * chip being on DVOB/C and having multiple pipes.
 */
static struct drm_display_mode *
intel_dvo_get_current_mode(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
	struct drm_display_mode *mode = NULL;

	/* If the DVO port is active, that'll be the LVDS, so we can pull out
	 * its timings to get how the BIOS set up the panel.
	 */
	if (dvo_val & DVO_ENABLE) {
		struct drm_crtc *crtc;
		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;

		crtc = intel_get_crtc_for_pipe(dev, pipe);
		if (crtc) {
			mode = intel_crtc_mode_get(dev, crtc);
			if (mode) {
				mode->type |= DRM_MODE_TYPE_PREFERRED;
				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
					mode->flags |= DRM_MODE_FLAG_PHSYNC;
				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
					mode->flags |= DRM_MODE_FLAG_PVSYNC;
			}
		}
	}

	return mode;
}

void intel_dvo_init(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_encoder *intel_encoder;
	struct intel_dvo *intel_dvo;
	struct intel_connector *intel_connector;
	int i;
	int encoder_type = DRM_MODE_ENCODER_NONE;

	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
	if (!intel_dvo)
		return;

	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(intel_dvo);
		return;
	}

	intel_encoder = &intel_dvo->base;
	drm_encoder_init(dev, &intel_encoder->base,
			 &intel_dvo_enc_funcs, encoder_type);

	intel_encoder->disable = intel_disable_dvo;
	intel_encoder->enable = intel_enable_dvo;

	/* Now, try to find a controller */
	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
		struct drm_connector *connector = &intel_connector->base;
		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
		struct i2c_adapter *i2c;
		int gpio;

		/* Allow the I2C driver info to specify the GPIO to be used in
		 * special cases, but otherwise default to what's defined
		 * in the spec.
		 */
		if (intel_gmbus_is_port_valid(dvo->gpio))
			gpio = dvo->gpio;
		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
			gpio = GMBUS_PORT_SSC;
		else
			gpio = GMBUS_PORT_DPB;

		/* Set up the I2C bus necessary for the chip we're probing.
		 * It appears that everything is on GPIOE except for panels
		 * on i830 laptops, which are on GPIOB (DVOA).
		 */
		i2c = intel_gmbus_get_adapter(dev_priv, gpio);

		intel_dvo->dev = *dvo;
		if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
			continue;

		intel_encoder->type = INTEL_OUTPUT_DVO;
		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
		switch (dvo->type) {
		case INTEL_DVO_CHIP_TMDS:
			intel_encoder->cloneable = true;
			drm_connector_init(dev, connector,
					   &intel_dvo_connector_funcs,
					   DRM_MODE_CONNECTOR_DVII);
			encoder_type = DRM_MODE_ENCODER_TMDS;
			break;
		case INTEL_DVO_CHIP_LVDS:
			intel_encoder->cloneable = false;
			drm_connector_init(dev, connector,
					   &intel_dvo_connector_funcs,
					   DRM_MODE_CONNECTOR_LVDS);
			encoder_type = DRM_MODE_ENCODER_LVDS;
			break;
		}

		drm_connector_helper_add(connector,
					 &intel_dvo_connector_helper_funcs);
		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
		connector->interlace_allowed = false;
		connector->doublescan_allowed = false;

		drm_encoder_helper_add(&intel_encoder->base,
				       &intel_dvo_helper_funcs);

		intel_connector_attach_encoder(intel_connector, intel_encoder);
		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
			/* For our LVDS chipsets, we should hopefully be able
			 * to dig the fixed panel mode out of the BIOS data.
			 * However, it's in a different format from the BIOS
			 * data on chipsets with integrated LVDS (stored in AIM
			 * headers, likely), so for now, just get the current
			 * mode being output through DVO.
			 */
			intel_dvo->panel_fixed_mode =
				intel_dvo_get_current_mode(connector);
			intel_dvo->panel_wants_dither = true;
		}

		drm_sysfs_connector_add(connector);
		return;
	}

	drm_encoder_cleanup(&intel_encoder->base);
	kfree(intel_dvo);
	kfree(intel_connector);
}
Commit	Line	Data
79e53945 JB	1	/*
	2	* Copyright 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright © 2006-2007 Intel Corporation
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	*/
	27	#include <linux/i2c.h>
5a0e3ad6	28	#include <linux/slab.h>
79e53945 JB	29	#include "drmP.h"
	30	#include "drm.h"
	31	#include "drm_crtc.h"
	32	#include "intel_drv.h"
	33	#include "i915_drm.h"
	34	#include "i915_drv.h"
	35	#include "dvo.h"
	36
	37	#define SIL164_ADDR 0x38
	38	#define CH7xxx_ADDR 0x76
	39	#define TFP410_ADDR 0x38
7434a255	40	#define NS2501_ADDR 0x38
79e53945	41
ea5b213a	42	static const struct intel_dvo_device intel_dvo_devices[] = {
79e53945 JB	43	{
	44	.type = INTEL_DVO_CHIP_TMDS,
	45	.name = "sil164",
	46	.dvo_reg = DVOC,
	47	.slave_addr = SIL164_ADDR,
	48	.dev_ops = &sil164_ops,
	49	},
	50	{
	51	.type = INTEL_DVO_CHIP_TMDS,
	52	.name = "ch7xxx",
	53	.dvo_reg = DVOC,
	54	.slave_addr = CH7xxx_ADDR,
	55	.dev_ops = &ch7xxx_ops,
	56	},
	57	{
	58	.type = INTEL_DVO_CHIP_LVDS,
	59	.name = "ivch",
	60	.dvo_reg = DVOA,
	61	.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
	62	.dev_ops = &ivch_ops,
	63	},
	64	{
	65	.type = INTEL_DVO_CHIP_TMDS,
	66	.name = "tfp410",
	67	.dvo_reg = DVOC,
	68	.slave_addr = TFP410_ADDR,
	69	.dev_ops = &tfp410_ops,
	70	},
	71	{
	72	.type = INTEL_DVO_CHIP_LVDS,
	73	.name = "ch7017",
	74	.dvo_reg = DVOC,
	75	.slave_addr = 0x75,
a6b17b43	76	.gpio = GMBUS_PORT_DPB,
79e53945	77	.dev_ops = &ch7017_ops,
7434a255 TR	78	},
	79	{
	80	.type = INTEL_DVO_CHIP_TMDS,
	81	.name = "ns2501",
	82	.dvo_reg = DVOC,
	83	.slave_addr = NS2501_ADDR,
	84	.dev_ops = &ns2501_ops,
	85	}
79e53945 JB	86	};
79e53945 JB	87
ea5b213a CW	88	struct intel_dvo {
	89	struct intel_encoder base;
	90
	91	struct intel_dvo_device dev;
	92
	93	struct drm_display_mode *panel_fixed_mode;
	94	bool panel_wants_dither;
	95	};
	96
	97	static struct intel_dvo enc_to_intel_dvo(struct drm_encoder encoder)
	98	{
4ef69c7a	99	return container_of(encoder, struct intel_dvo, base.base);
ea5b213a CW	100	}
ea5b213a CW	101
df0e9248 CW	102	static struct intel_dvo intel_attached_dvo(struct drm_connector connector)
	103	{
	104	return container_of(intel_attached_encoder(connector),
	105	struct intel_dvo, base);
	106	}
	107
19c63fa8 DV	108	static void intel_disable_dvo(struct intel_encoder *encoder)
	109	{
	110	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	111	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
	112	u32 dvo_reg = intel_dvo->dev.dvo_reg;
	113	u32 temp = I915_READ(dvo_reg);
	114
	115	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
	116	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
	117	I915_READ(dvo_reg);
	118	}
	119
	120	static void intel_enable_dvo(struct intel_encoder *encoder)
	121	{
	122	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
	123	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
	124	u32 dvo_reg = intel_dvo->dev.dvo_reg;
	125	u32 temp = I915_READ(dvo_reg);
	126
	127	I915_WRITE(dvo_reg, temp \| DVO_ENABLE);
	128	I915_READ(dvo_reg);
	129	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
	130	}
	131
79e53945 JB	132	static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
	133	{
	134	struct drm_i915_private *dev_priv = encoder->dev->dev_private;
ea5b213a CW	135	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
ea5b213a CW	136	u32 dvo_reg = intel_dvo->dev.dvo_reg;
79e53945 JB	137	u32 temp = I915_READ(dvo_reg);
	138
	139	if (mode == DRM_MODE_DPMS_ON) {
	140	I915_WRITE(dvo_reg, temp \| DVO_ENABLE);
	141	I915_READ(dvo_reg);
fac3274c	142	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
79e53945	143	} else {
fac3274c	144	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
79e53945 JB	145	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
	146	I915_READ(dvo_reg);
	147	}
	148	}
	149
79e53945 JB	150	static int intel_dvo_mode_valid(struct drm_connector *connector,
	151	struct drm_display_mode *mode)
	152	{
df0e9248	153	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
79e53945 JB	154
	155	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	156	return MODE_NO_DBLESCAN;
	157
	158	/* XXX: Validate clock range */
	159
ea5b213a CW	160	if (intel_dvo->panel_fixed_mode) {
ea5b213a CW	161	if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
79e53945	162	return MODE_PANEL;
ea5b213a	163	if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
79e53945 JB	164	return MODE_PANEL;
	165	}
	166
ea5b213a	167	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
79e53945 JB	168	}
	169
	170	static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
e811f5ae	171	const struct drm_display_mode *mode,
79e53945 JB	172	struct drm_display_mode *adjusted_mode)
79e53945 JB	173	{
ea5b213a	174	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945 JB	175
	176	/* If we have timings from the BIOS for the panel, put them in
	177	* to the adjusted mode. The CRTC will be set up for this mode,
	178	* with the panel scaling set up to source from the H/VDisplay
	179	* of the original mode.
	180	*/
ea5b213a CW	181	if (intel_dvo->panel_fixed_mode != NULL) {
ea5b213a CW	182	#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
79e53945 JB	183	C(hdisplay);
	184	C(hsync_start);
	185	C(hsync_end);
	186	C(htotal);
	187	C(vdisplay);
	188	C(vsync_start);
	189	C(vsync_end);
	190	C(vtotal);
	191	C(clock);
79e53945 JB	192	#undef C
	193	}
	194
ea5b213a CW	195	if (intel_dvo->dev.dev_ops->mode_fixup)
ea5b213a CW	196	return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
79e53945 JB	197
	198	return true;
	199	}
	200
	201	static void intel_dvo_mode_set(struct drm_encoder *encoder,
	202	struct drm_display_mode *mode,
	203	struct drm_display_mode *adjusted_mode)
	204	{
	205	struct drm_device *dev = encoder->dev;
	206	struct drm_i915_private *dev_priv = dev->dev_private;
	207	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
ea5b213a	208	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945 JB	209	int pipe = intel_crtc->pipe;
79e53945 JB	210	u32 dvo_val;
ea5b213a	211	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
9db4a9c7	212	int dpll_reg = DPLL(pipe);
79e53945 JB	213
	214	switch (dvo_reg) {
	215	case DVOA:
	216	default:
	217	dvo_srcdim_reg = DVOA_SRCDIM;
	218	break;
	219	case DVOB:
	220	dvo_srcdim_reg = DVOB_SRCDIM;
	221	break;
	222	case DVOC:
	223	dvo_srcdim_reg = DVOC_SRCDIM;
	224	break;
	225	}
	226
ea5b213a	227	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
79e53945 JB	228
	229	/* Save the data order, since I don't know what it should be set to. */
	230	dvo_val = I915_READ(dvo_reg) &
	231	(DVO_PRESERVE_MASK \| DVO_DATA_ORDER_GBRG);
	232	dvo_val \|= DVO_DATA_ORDER_FP \| DVO_BORDER_ENABLE \|
	233	DVO_BLANK_ACTIVE_HIGH;
	234
	235	if (pipe == 1)
	236	dvo_val \|= DVO_PIPE_B_SELECT;
	237	dvo_val \|= DVO_PIPE_STALL;
	238	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	239	dvo_val \|= DVO_HSYNC_ACTIVE_HIGH;
	240	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	241	dvo_val \|= DVO_VSYNC_ACTIVE_HIGH;
	242
	243	I915_WRITE(dpll_reg, I915_READ(dpll_reg) \| DPLL_DVO_HIGH_SPEED);
	244
	245	/*I915_WRITE(DVOB_SRCDIM,
	246	(adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|
	247	(adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
	248	I915_WRITE(dvo_srcdim_reg,
	249	(adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|
	250	(adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
	251	/I915_WRITE(DVOB, dvo_val);/
	252	I915_WRITE(dvo_reg, dvo_val);
	253	}
	254
	255	/**
	256	* Detect the output connection on our DVO device.
	257	*
	258	* Unimplemented.
	259	*/
7b334fcb	260	static enum drm_connector_status
930a9e28	261	intel_dvo_detect(struct drm_connector *connector, bool force)
79e53945	262	{
df0e9248	263	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
ea5b213a	264	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
79e53945 JB	265	}
	266
	267	static int intel_dvo_get_modes(struct drm_connector *connector)
	268	{
df0e9248	269	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
f899fc64	270	struct drm_i915_private *dev_priv = connector->dev->dev_private;
79e53945 JB	271
	272	/* We should probably have an i2c driver get_modes function for those
	273	* devices which will have a fixed set of modes determined by the chip
	274	* (TV-out, for example), but for now with just TMDS and LVDS,
	275	* that's not the case.
	276	*/
f899fc64	277	intel_ddc_get_modes(connector,
3bd7d909	278	intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
79e53945 JB	279	if (!list_empty(&connector->probed_modes))
	280	return 1;
	281
ea5b213a	282	if (intel_dvo->panel_fixed_mode != NULL) {
79e53945	283	struct drm_display_mode *mode;
ea5b213a	284	mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
79e53945 JB	285	if (mode) {
	286	drm_mode_probed_add(connector, mode);
	287	return 1;
	288	}
	289	}
ea5b213a	290
79e53945 JB	291	return 0;
	292	}
	293
ea5b213a	294	static void intel_dvo_destroy(struct drm_connector *connector)
79e53945	295	{
79e53945 JB	296	drm_sysfs_connector_remove(connector);
79e53945 JB	297	drm_connector_cleanup(connector);
599be16c	298	kfree(connector);
79e53945	299	}
79e53945 JB	300
	301	static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
	302	.dpms = intel_dvo_dpms,
	303	.mode_fixup = intel_dvo_mode_fixup,
19c63fa8	304	.prepare = intel_encoder_noop,
79e53945	305	.mode_set = intel_dvo_mode_set,
19c63fa8 DV	306	.commit = intel_encoder_noop,
19c63fa8 DV	307	.disable = intel_encoder_disable,
79e53945 JB	308	};
	309
	310	static const struct drm_connector_funcs intel_dvo_connector_funcs = {
c9fb15f6	311	.dpms = drm_helper_connector_dpms,
79e53945 JB	312	.detect = intel_dvo_detect,
	313	.destroy = intel_dvo_destroy,
	314	.fill_modes = drm_helper_probe_single_connector_modes,
	315	};
	316
	317	static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
	318	.mode_valid = intel_dvo_mode_valid,
	319	.get_modes = intel_dvo_get_modes,
df0e9248	320	.best_encoder = intel_best_encoder,
79e53945 JB	321	};
79e53945 JB	322
b358d0a6	323	static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
79e53945	324	{
ea5b213a CW	325	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	326
	327	if (intel_dvo->dev.dev_ops->destroy)
	328	intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
	329
	330	kfree(intel_dvo->panel_fixed_mode);
	331
	332	intel_encoder_destroy(encoder);
79e53945 JB	333	}
	334
	335	static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
	336	.destroy = intel_dvo_enc_destroy,
	337	};
	338
79e53945 JB	339	/**
	340	* Attempts to get a fixed panel timing for LVDS (currently only the i830).
	341	*
	342	* Other chips with DVO LVDS will need to extend this to deal with the LVDS
	343	* chip being on DVOB/C and having multiple pipes.
	344	*/
	345	static struct drm_display_mode *
ea5b213a	346	intel_dvo_get_current_mode(struct drm_connector *connector)
79e53945 JB	347	{
	348	struct drm_device *dev = connector->dev;
	349	struct drm_i915_private *dev_priv = dev->dev_private;
df0e9248	350	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
ea5b213a	351	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
79e53945 JB	352	struct drm_display_mode *mode = NULL;
	353
	354	/* If the DVO port is active, that'll be the LVDS, so we can pull out
	355	* its timings to get how the BIOS set up the panel.
	356	*/
	357	if (dvo_val & DVO_ENABLE) {
	358	struct drm_crtc *crtc;
	359	int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
	360
f875c15a	361	crtc = intel_get_crtc_for_pipe(dev, pipe);
79e53945 JB	362	if (crtc) {
79e53945 JB	363	mode = intel_crtc_mode_get(dev, crtc);
79e53945 JB	364	if (mode) {
	365	mode->type \|= DRM_MODE_TYPE_PREFERRED;
	366	if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
	367	mode->flags \|= DRM_MODE_FLAG_PHSYNC;
	368	if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
	369	mode->flags \|= DRM_MODE_FLAG_PVSYNC;
	370	}
	371	}
	372	}
ea5b213a	373
79e53945 JB	374	return mode;
	375	}
	376
	377	void intel_dvo_init(struct drm_device *dev)
	378	{
f899fc64	379	struct drm_i915_private *dev_priv = dev->dev_private;
21d40d37	380	struct intel_encoder *intel_encoder;
ea5b213a	381	struct intel_dvo *intel_dvo;
599be16c	382	struct intel_connector *intel_connector;
79e53945	383	int i;
79e53945	384	int encoder_type = DRM_MODE_ENCODER_NONE;
ea5b213a CW	385
	386	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
	387	if (!intel_dvo)
79e53945 JB	388	return;
79e53945 JB	389
599be16c ZW	390	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
599be16c ZW	391	if (!intel_connector) {
ea5b213a	392	kfree(intel_dvo);
599be16c ZW	393	return;
	394	}
	395
ea5b213a	396	intel_encoder = &intel_dvo->base;
373a3cf7 CW	397	drm_encoder_init(dev, &intel_encoder->base,
373a3cf7 CW	398	&intel_dvo_enc_funcs, encoder_type);
ea5b213a	399
19c63fa8 DV	400	intel_encoder->disable = intel_disable_dvo;
	401	intel_encoder->enable = intel_enable_dvo;
	402
79e53945 JB	403	/* Now, try to find a controller */
79e53945 JB	404	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
599be16c	405	struct drm_connector *connector = &intel_connector->base;
ea5b213a	406	const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
f899fc64	407	struct i2c_adapter *i2c;
79e53945 JB	408	int gpio;
79e53945 JB	409
79e53945 JB	410	/* Allow the I2C driver info to specify the GPIO to be used in
	411	* special cases, but otherwise default to what's defined
	412	* in the spec.
	413	*/
3bd7d909	414	if (intel_gmbus_is_port_valid(dvo->gpio))
79e53945 JB	415	gpio = dvo->gpio;
79e53945 JB	416	else if (dvo->type == INTEL_DVO_CHIP_LVDS)
f573c660	417	gpio = GMBUS_PORT_SSC;
79e53945	418	else
a6b17b43	419	gpio = GMBUS_PORT_DPB;
79e53945 JB	420
	421	/* Set up the I2C bus necessary for the chip we're probing.
	422	* It appears that everything is on GPIOE except for panels
	423	* on i830 laptops, which are on GPIOB (DVOA).
	424	*/
3bd7d909	425	i2c = intel_gmbus_get_adapter(dev_priv, gpio);
79e53945	426
ea5b213a	427	intel_dvo->dev = *dvo;
f573c660	428	if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
79e53945 JB	429	continue;
79e53945 JB	430
21d40d37 EA	431	intel_encoder->type = INTEL_OUTPUT_DVO;
21d40d37 EA	432	intel_encoder->crtc_mask = (1 << 0) \| (1 << 1);
79e53945 JB	433	switch (dvo->type) {
79e53945 JB	434	case INTEL_DVO_CHIP_TMDS:
66a9278e	435	intel_encoder->cloneable = true;
79e53945 JB	436	drm_connector_init(dev, connector,
	437	&intel_dvo_connector_funcs,
	438	DRM_MODE_CONNECTOR_DVII);
	439	encoder_type = DRM_MODE_ENCODER_TMDS;
	440	break;
	441	case INTEL_DVO_CHIP_LVDS:
66a9278e	442	intel_encoder->cloneable = false;
79e53945 JB	443	drm_connector_init(dev, connector,
	444	&intel_dvo_connector_funcs,
	445	DRM_MODE_CONNECTOR_LVDS);
	446	encoder_type = DRM_MODE_ENCODER_LVDS;
	447	break;
	448	}
	449
	450	drm_connector_helper_add(connector,
	451	&intel_dvo_connector_helper_funcs);
	452	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
	453	connector->interlace_allowed = false;
	454	connector->doublescan_allowed = false;
	455
4ef69c7a	456	drm_encoder_helper_add(&intel_encoder->base,
79e53945 JB	457	&intel_dvo_helper_funcs);
79e53945 JB	458
df0e9248	459	intel_connector_attach_encoder(intel_connector, intel_encoder);
79e53945 JB	460	if (dvo->type == INTEL_DVO_CHIP_LVDS) {
	461	/* For our LVDS chipsets, we should hopefully be able
	462	* to dig the fixed panel mode out of the BIOS data.
	463	* However, it's in a different format from the BIOS
	464	* data on chipsets with integrated LVDS (stored in AIM
	465	* headers, likely), so for now, just get the current
	466	* mode being output through DVO.
	467	*/
ea5b213a	468	intel_dvo->panel_fixed_mode =
79e53945	469	intel_dvo_get_current_mode(connector);
ea5b213a	470	intel_dvo->panel_wants_dither = true;
79e53945 JB	471	}
	472
	473	drm_sysfs_connector_add(connector);
	474	return;
	475	}
	476
373a3cf7	477	drm_encoder_cleanup(&intel_encoder->base);
ea5b213a	478	kfree(intel_dvo);
599be16c	479	kfree(intel_connector);
79e53945	480	}