Commit | Line | Data |
---|---|---|
79e53945 JB |
1 | /* |
2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> | |
3 | * Copyright © 2006-2007 Intel Corporation | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | */ | |
27 | #include <linux/i2c.h> | |
28 | #include "drmP.h" | |
29 | #include "drm.h" | |
30 | #include "drm_crtc.h" | |
31 | #include "intel_drv.h" | |
32 | #include "i915_drm.h" | |
33 | #include "i915_drv.h" | |
34 | #include "dvo.h" | |
35 | ||
36 | #define SIL164_ADDR 0x38 | |
37 | #define CH7xxx_ADDR 0x76 | |
38 | #define TFP410_ADDR 0x38 | |
39 | ||
b358d0a6 | 40 | static struct intel_dvo_device intel_dvo_devices[] = { |
79e53945 JB |
41 | { |
42 | .type = INTEL_DVO_CHIP_TMDS, | |
43 | .name = "sil164", | |
44 | .dvo_reg = DVOC, | |
45 | .slave_addr = SIL164_ADDR, | |
46 | .dev_ops = &sil164_ops, | |
47 | }, | |
48 | { | |
49 | .type = INTEL_DVO_CHIP_TMDS, | |
50 | .name = "ch7xxx", | |
51 | .dvo_reg = DVOC, | |
52 | .slave_addr = CH7xxx_ADDR, | |
53 | .dev_ops = &ch7xxx_ops, | |
54 | }, | |
55 | { | |
56 | .type = INTEL_DVO_CHIP_LVDS, | |
57 | .name = "ivch", | |
58 | .dvo_reg = DVOA, | |
59 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ | |
60 | .dev_ops = &ivch_ops, | |
61 | }, | |
62 | { | |
63 | .type = INTEL_DVO_CHIP_TMDS, | |
64 | .name = "tfp410", | |
65 | .dvo_reg = DVOC, | |
66 | .slave_addr = TFP410_ADDR, | |
67 | .dev_ops = &tfp410_ops, | |
68 | }, | |
69 | { | |
70 | .type = INTEL_DVO_CHIP_LVDS, | |
71 | .name = "ch7017", | |
72 | .dvo_reg = DVOC, | |
73 | .slave_addr = 0x75, | |
74 | .gpio = GPIOE, | |
75 | .dev_ops = &ch7017_ops, | |
76 | } | |
77 | }; | |
78 | ||
79 | static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) | |
80 | { | |
81 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; | |
21d40d37 EA |
82 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
83 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
84 | u32 dvo_reg = dvo->dvo_reg; |
85 | u32 temp = I915_READ(dvo_reg); | |
86 | ||
87 | if (mode == DRM_MODE_DPMS_ON) { | |
88 | I915_WRITE(dvo_reg, temp | DVO_ENABLE); | |
89 | I915_READ(dvo_reg); | |
90 | dvo->dev_ops->dpms(dvo, mode); | |
91 | } else { | |
92 | dvo->dev_ops->dpms(dvo, mode); | |
93 | I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); | |
94 | I915_READ(dvo_reg); | |
95 | } | |
96 | } | |
97 | ||
79e53945 JB |
98 | static int intel_dvo_mode_valid(struct drm_connector *connector, |
99 | struct drm_display_mode *mode) | |
100 | { | |
21d40d37 EA |
101 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
102 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
103 | |
104 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
105 | return MODE_NO_DBLESCAN; | |
106 | ||
107 | /* XXX: Validate clock range */ | |
108 | ||
109 | if (dvo->panel_fixed_mode) { | |
110 | if (mode->hdisplay > dvo->panel_fixed_mode->hdisplay) | |
111 | return MODE_PANEL; | |
112 | if (mode->vdisplay > dvo->panel_fixed_mode->vdisplay) | |
113 | return MODE_PANEL; | |
114 | } | |
115 | ||
116 | return dvo->dev_ops->mode_valid(dvo, mode); | |
117 | } | |
118 | ||
119 | static bool intel_dvo_mode_fixup(struct drm_encoder *encoder, | |
120 | struct drm_display_mode *mode, | |
121 | struct drm_display_mode *adjusted_mode) | |
122 | { | |
21d40d37 EA |
123 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
124 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
125 | |
126 | /* If we have timings from the BIOS for the panel, put them in | |
127 | * to the adjusted mode. The CRTC will be set up for this mode, | |
128 | * with the panel scaling set up to source from the H/VDisplay | |
129 | * of the original mode. | |
130 | */ | |
131 | if (dvo->panel_fixed_mode != NULL) { | |
132 | #define C(x) adjusted_mode->x = dvo->panel_fixed_mode->x | |
133 | C(hdisplay); | |
134 | C(hsync_start); | |
135 | C(hsync_end); | |
136 | C(htotal); | |
137 | C(vdisplay); | |
138 | C(vsync_start); | |
139 | C(vsync_end); | |
140 | C(vtotal); | |
141 | C(clock); | |
142 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); | |
143 | #undef C | |
144 | } | |
145 | ||
146 | if (dvo->dev_ops->mode_fixup) | |
147 | return dvo->dev_ops->mode_fixup(dvo, mode, adjusted_mode); | |
148 | ||
149 | return true; | |
150 | } | |
151 | ||
152 | static void intel_dvo_mode_set(struct drm_encoder *encoder, | |
153 | struct drm_display_mode *mode, | |
154 | struct drm_display_mode *adjusted_mode) | |
155 | { | |
156 | struct drm_device *dev = encoder->dev; | |
157 | struct drm_i915_private *dev_priv = dev->dev_private; | |
158 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | |
21d40d37 EA |
159 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
160 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
161 | int pipe = intel_crtc->pipe; |
162 | u32 dvo_val; | |
163 | u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg; | |
164 | int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B; | |
165 | ||
166 | switch (dvo_reg) { | |
167 | case DVOA: | |
168 | default: | |
169 | dvo_srcdim_reg = DVOA_SRCDIM; | |
170 | break; | |
171 | case DVOB: | |
172 | dvo_srcdim_reg = DVOB_SRCDIM; | |
173 | break; | |
174 | case DVOC: | |
175 | dvo_srcdim_reg = DVOC_SRCDIM; | |
176 | break; | |
177 | } | |
178 | ||
179 | dvo->dev_ops->mode_set(dvo, mode, adjusted_mode); | |
180 | ||
181 | /* Save the data order, since I don't know what it should be set to. */ | |
182 | dvo_val = I915_READ(dvo_reg) & | |
183 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); | |
184 | dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | | |
185 | DVO_BLANK_ACTIVE_HIGH; | |
186 | ||
187 | if (pipe == 1) | |
188 | dvo_val |= DVO_PIPE_B_SELECT; | |
189 | dvo_val |= DVO_PIPE_STALL; | |
190 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | |
191 | dvo_val |= DVO_HSYNC_ACTIVE_HIGH; | |
192 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | |
193 | dvo_val |= DVO_VSYNC_ACTIVE_HIGH; | |
194 | ||
195 | I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED); | |
196 | ||
197 | /*I915_WRITE(DVOB_SRCDIM, | |
198 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | | |
199 | (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ | |
200 | I915_WRITE(dvo_srcdim_reg, | |
201 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | | |
202 | (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); | |
203 | /*I915_WRITE(DVOB, dvo_val);*/ | |
204 | I915_WRITE(dvo_reg, dvo_val); | |
205 | } | |
206 | ||
207 | /** | |
208 | * Detect the output connection on our DVO device. | |
209 | * | |
210 | * Unimplemented. | |
211 | */ | |
212 | static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector) | |
213 | { | |
21d40d37 EA |
214 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
215 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
216 | |
217 | return dvo->dev_ops->detect(dvo); | |
218 | } | |
219 | ||
220 | static int intel_dvo_get_modes(struct drm_connector *connector) | |
221 | { | |
21d40d37 EA |
222 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
223 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
224 | |
225 | /* We should probably have an i2c driver get_modes function for those | |
226 | * devices which will have a fixed set of modes determined by the chip | |
227 | * (TV-out, for example), but for now with just TMDS and LVDS, | |
228 | * that's not the case. | |
229 | */ | |
335af9a2 | 230 | intel_ddc_get_modes(connector, intel_encoder->ddc_bus); |
79e53945 JB |
231 | if (!list_empty(&connector->probed_modes)) |
232 | return 1; | |
233 | ||
234 | ||
235 | if (dvo->panel_fixed_mode != NULL) { | |
236 | struct drm_display_mode *mode; | |
237 | mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode); | |
238 | if (mode) { | |
239 | drm_mode_probed_add(connector, mode); | |
240 | return 1; | |
241 | } | |
242 | } | |
243 | return 0; | |
244 | } | |
245 | ||
246 | static void intel_dvo_destroy (struct drm_connector *connector) | |
247 | { | |
21d40d37 EA |
248 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
249 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
250 | |
251 | if (dvo) { | |
252 | if (dvo->dev_ops->destroy) | |
253 | dvo->dev_ops->destroy(dvo); | |
254 | if (dvo->panel_fixed_mode) | |
255 | kfree(dvo->panel_fixed_mode); | |
256 | /* no need, in i830_dvoices[] now */ | |
257 | //kfree(dvo); | |
258 | } | |
21d40d37 EA |
259 | if (intel_encoder->i2c_bus) |
260 | intel_i2c_destroy(intel_encoder->i2c_bus); | |
261 | if (intel_encoder->ddc_bus) | |
262 | intel_i2c_destroy(intel_encoder->ddc_bus); | |
79e53945 JB |
263 | drm_sysfs_connector_remove(connector); |
264 | drm_connector_cleanup(connector); | |
21d40d37 | 265 | kfree(intel_encoder); |
79e53945 JB |
266 | } |
267 | ||
268 | #ifdef RANDR_GET_CRTC_INTERFACE | |
269 | static struct drm_crtc *intel_dvo_get_crtc(struct drm_connector *connector) | |
270 | { | |
271 | struct drm_device *dev = connector->dev; | |
272 | struct drm_i915_private *dev_priv = dev->dev_private; | |
21d40d37 EA |
273 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
274 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
275 | int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT); |
276 | ||
277 | return intel_pipe_to_crtc(pScrn, pipe); | |
278 | } | |
279 | #endif | |
280 | ||
281 | static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = { | |
282 | .dpms = intel_dvo_dpms, | |
283 | .mode_fixup = intel_dvo_mode_fixup, | |
284 | .prepare = intel_encoder_prepare, | |
285 | .mode_set = intel_dvo_mode_set, | |
286 | .commit = intel_encoder_commit, | |
287 | }; | |
288 | ||
289 | static const struct drm_connector_funcs intel_dvo_connector_funcs = { | |
c9fb15f6 | 290 | .dpms = drm_helper_connector_dpms, |
79e53945 JB |
291 | .detect = intel_dvo_detect, |
292 | .destroy = intel_dvo_destroy, | |
293 | .fill_modes = drm_helper_probe_single_connector_modes, | |
294 | }; | |
295 | ||
296 | static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { | |
297 | .mode_valid = intel_dvo_mode_valid, | |
298 | .get_modes = intel_dvo_get_modes, | |
299 | .best_encoder = intel_best_encoder, | |
300 | }; | |
301 | ||
b358d0a6 | 302 | static void intel_dvo_enc_destroy(struct drm_encoder *encoder) |
79e53945 JB |
303 | { |
304 | drm_encoder_cleanup(encoder); | |
305 | } | |
306 | ||
307 | static const struct drm_encoder_funcs intel_dvo_enc_funcs = { | |
308 | .destroy = intel_dvo_enc_destroy, | |
309 | }; | |
310 | ||
311 | ||
312 | /** | |
313 | * Attempts to get a fixed panel timing for LVDS (currently only the i830). | |
314 | * | |
315 | * Other chips with DVO LVDS will need to extend this to deal with the LVDS | |
316 | * chip being on DVOB/C and having multiple pipes. | |
317 | */ | |
318 | static struct drm_display_mode * | |
319 | intel_dvo_get_current_mode (struct drm_connector *connector) | |
320 | { | |
321 | struct drm_device *dev = connector->dev; | |
322 | struct drm_i915_private *dev_priv = dev->dev_private; | |
21d40d37 EA |
323 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
324 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; | |
79e53945 JB |
325 | uint32_t dvo_reg = dvo->dvo_reg; |
326 | uint32_t dvo_val = I915_READ(dvo_reg); | |
327 | struct drm_display_mode *mode = NULL; | |
328 | ||
329 | /* If the DVO port is active, that'll be the LVDS, so we can pull out | |
330 | * its timings to get how the BIOS set up the panel. | |
331 | */ | |
332 | if (dvo_val & DVO_ENABLE) { | |
333 | struct drm_crtc *crtc; | |
334 | int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; | |
335 | ||
336 | crtc = intel_get_crtc_from_pipe(dev, pipe); | |
337 | if (crtc) { | |
338 | mode = intel_crtc_mode_get(dev, crtc); | |
339 | ||
340 | if (mode) { | |
341 | mode->type |= DRM_MODE_TYPE_PREFERRED; | |
342 | if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) | |
343 | mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
344 | if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) | |
345 | mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
346 | } | |
347 | } | |
348 | } | |
349 | return mode; | |
350 | } | |
351 | ||
352 | void intel_dvo_init(struct drm_device *dev) | |
353 | { | |
21d40d37 | 354 | struct intel_encoder *intel_encoder; |
79e53945 | 355 | struct intel_dvo_device *dvo; |
f9c10a9b | 356 | struct i2c_adapter *i2cbus = NULL; |
79e53945 JB |
357 | int ret = 0; |
358 | int i; | |
79e53945 | 359 | int encoder_type = DRM_MODE_ENCODER_NONE; |
21d40d37 EA |
360 | intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL); |
361 | if (!intel_encoder) | |
79e53945 JB |
362 | return; |
363 | ||
364 | /* Set up the DDC bus */ | |
21d40d37 EA |
365 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D"); |
366 | if (!intel_encoder->ddc_bus) | |
79e53945 JB |
367 | goto free_intel; |
368 | ||
369 | /* Now, try to find a controller */ | |
370 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { | |
21d40d37 | 371 | struct drm_connector *connector = &intel_encoder->base; |
79e53945 JB |
372 | int gpio; |
373 | ||
374 | dvo = &intel_dvo_devices[i]; | |
375 | ||
376 | /* Allow the I2C driver info to specify the GPIO to be used in | |
377 | * special cases, but otherwise default to what's defined | |
378 | * in the spec. | |
379 | */ | |
380 | if (dvo->gpio != 0) | |
381 | gpio = dvo->gpio; | |
382 | else if (dvo->type == INTEL_DVO_CHIP_LVDS) | |
383 | gpio = GPIOB; | |
384 | else | |
385 | gpio = GPIOE; | |
386 | ||
387 | /* Set up the I2C bus necessary for the chip we're probing. | |
388 | * It appears that everything is on GPIOE except for panels | |
389 | * on i830 laptops, which are on GPIOB (DVOA). | |
390 | */ | |
f9c10a9b KP |
391 | if (i2cbus != NULL) |
392 | intel_i2c_destroy(i2cbus); | |
393 | if (!(i2cbus = intel_i2c_create(dev, gpio, | |
394 | gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) { | |
395 | continue; | |
79e53945 JB |
396 | } |
397 | ||
398 | if (dvo->dev_ops!= NULL) | |
399 | ret = dvo->dev_ops->init(dvo, i2cbus); | |
400 | else | |
401 | ret = false; | |
402 | ||
403 | if (!ret) | |
404 | continue; | |
405 | ||
21d40d37 EA |
406 | intel_encoder->type = INTEL_OUTPUT_DVO; |
407 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); | |
79e53945 JB |
408 | switch (dvo->type) { |
409 | case INTEL_DVO_CHIP_TMDS: | |
21d40d37 | 410 | intel_encoder->clone_mask = |
f8aed700 ML |
411 | (1 << INTEL_DVO_TMDS_CLONE_BIT) | |
412 | (1 << INTEL_ANALOG_CLONE_BIT); | |
79e53945 JB |
413 | drm_connector_init(dev, connector, |
414 | &intel_dvo_connector_funcs, | |
415 | DRM_MODE_CONNECTOR_DVII); | |
416 | encoder_type = DRM_MODE_ENCODER_TMDS; | |
417 | break; | |
418 | case INTEL_DVO_CHIP_LVDS: | |
21d40d37 | 419 | intel_encoder->clone_mask = |
f8aed700 | 420 | (1 << INTEL_DVO_LVDS_CLONE_BIT); |
79e53945 JB |
421 | drm_connector_init(dev, connector, |
422 | &intel_dvo_connector_funcs, | |
423 | DRM_MODE_CONNECTOR_LVDS); | |
424 | encoder_type = DRM_MODE_ENCODER_LVDS; | |
425 | break; | |
426 | } | |
427 | ||
428 | drm_connector_helper_add(connector, | |
429 | &intel_dvo_connector_helper_funcs); | |
430 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | |
431 | connector->interlace_allowed = false; | |
432 | connector->doublescan_allowed = false; | |
433 | ||
21d40d37 EA |
434 | intel_encoder->dev_priv = dvo; |
435 | intel_encoder->i2c_bus = i2cbus; | |
79e53945 | 436 | |
21d40d37 | 437 | drm_encoder_init(dev, &intel_encoder->enc, |
79e53945 | 438 | &intel_dvo_enc_funcs, encoder_type); |
21d40d37 | 439 | drm_encoder_helper_add(&intel_encoder->enc, |
79e53945 JB |
440 | &intel_dvo_helper_funcs); |
441 | ||
21d40d37 EA |
442 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
443 | &intel_encoder->enc); | |
79e53945 JB |
444 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { |
445 | /* For our LVDS chipsets, we should hopefully be able | |
446 | * to dig the fixed panel mode out of the BIOS data. | |
447 | * However, it's in a different format from the BIOS | |
448 | * data on chipsets with integrated LVDS (stored in AIM | |
449 | * headers, likely), so for now, just get the current | |
450 | * mode being output through DVO. | |
451 | */ | |
452 | dvo->panel_fixed_mode = | |
453 | intel_dvo_get_current_mode(connector); | |
454 | dvo->panel_wants_dither = true; | |
455 | } | |
456 | ||
457 | drm_sysfs_connector_add(connector); | |
458 | return; | |
459 | } | |
460 | ||
21d40d37 | 461 | intel_i2c_destroy(intel_encoder->ddc_bus); |
79e53945 JB |
462 | /* Didn't find a chip, so tear down. */ |
463 | if (i2cbus != NULL) | |
464 | intel_i2c_destroy(i2cbus); | |
465 | free_intel: | |
21d40d37 | 466 | kfree(intel_encoder); |
79e53945 | 467 | } |