[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_hdmi.c

/*
 * Copyright 2006 Dave Airlie <airlied@linux.ie>
 * Copyright © 2006-2009 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *	Jesse Barnes <jesse.barnes@intel.com>
 */

#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "drm_edid.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"

struct intel_hdmi_priv {
	u32 sdvox_reg;
	bool has_hdmi_sink;
};

static void intel_hdmi_mode_set(struct drm_encoder *encoder,
				struct drm_display_mode *mode,
				struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_crtc *crtc = encoder->crtc;
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
	u32 sdvox;

	sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		sdvox |= SDVO_HSYNC_ACTIVE_HIGH;

	if (hdmi_priv->has_hdmi_sink) {
		sdvox |= SDVO_AUDIO_ENABLE;
		if (HAS_PCH_CPT(dev))
			sdvox |= HDMI_MODE_SELECT;
	}

	if (intel_crtc->pipe == 1) {
		if (HAS_PCH_CPT(dev))
			sdvox |= PORT_TRANS_B_SEL_CPT;
		else
			sdvox |= SDVO_PIPE_B_SELECT;
	}

	I915_WRITE(hdmi_priv->sdvox_reg, sdvox);
	POSTING_READ(hdmi_priv->sdvox_reg);
}

static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
	u32 temp;

	temp = I915_READ(hdmi_priv->sdvox_reg);

	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	 * we do this anyway which shows more stable in testing.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
		POSTING_READ(hdmi_priv->sdvox_reg);
	}

	if (mode != DRM_MODE_DPMS_ON) {
		temp &= ~SDVO_ENABLE;
	} else {
		temp |= SDVO_ENABLE;
	}

	I915_WRITE(hdmi_priv->sdvox_reg, temp);
	POSTING_READ(hdmi_priv->sdvox_reg);

	/* HW workaround, need to write this twice for issue that may result
	 * in first write getting masked.
	 */
	if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(hdmi_priv->sdvox_reg, temp);
		POSTING_READ(hdmi_priv->sdvox_reg);
	}
}

static int intel_hdmi_mode_valid(struct drm_connector *connector,
				 struct drm_display_mode *mode)
{
	if (mode->clock > 165000)
		return MODE_CLOCK_HIGH;
	if (mode->clock < 20000)
		return MODE_CLOCK_HIGH;

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	return MODE_OK;
}

static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
				  struct drm_display_mode *mode,
				  struct drm_display_mode *adjusted_mode)
{
	return true;
}

static enum drm_connector_status
intel_hdmi_detect(struct drm_connector *connector)
{
	struct drm_encoder *encoder = intel_attached_encoder(connector);
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
	struct edid *edid = NULL;
	enum drm_connector_status status = connector_status_disconnected;

	hdmi_priv->has_hdmi_sink = false;
	edid = drm_get_edid(connector,
			    intel_encoder->ddc_bus);

	if (edid) {
		if (edid->input & DRM_EDID_INPUT_DIGITAL) {
			status = connector_status_connected;
			hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
		}
		connector->display_info.raw_edid = NULL;
		kfree(edid);
	}

	return status;
}

static int intel_hdmi_get_modes(struct drm_connector *connector)
{
	struct drm_encoder *encoder = intel_attached_encoder(connector);
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);

	/* We should parse the EDID data and find out if it's an HDMI sink so
	 * we can send audio to it.
	 */

	return intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
}

static void intel_hdmi_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	.dpms = intel_hdmi_dpms,
	.mode_fixup = intel_hdmi_mode_fixup,
	.prepare = intel_encoder_prepare,
	.mode_set = intel_hdmi_mode_set,
	.commit = intel_encoder_commit,
};

static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.detect = intel_hdmi_detect,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = intel_hdmi_destroy,
};

static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	.get_modes = intel_hdmi_get_modes,
	.mode_valid = intel_hdmi_mode_valid,
	.best_encoder = intel_attached_encoder,
};

static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
{
	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);

	if (intel_encoder->i2c_bus)
		intel_i2c_destroy(intel_encoder->i2c_bus);
	drm_encoder_cleanup(encoder);
	kfree(intel_encoder);
}

static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
	.destroy = intel_hdmi_enc_destroy,
};

void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_connector *connector;
	struct intel_encoder *intel_encoder;
	struct intel_connector *intel_connector;
	struct intel_hdmi_priv *hdmi_priv;

	intel_encoder = kcalloc(sizeof(struct intel_encoder) +
			       sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
	if (!intel_encoder)
		return;

	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(intel_encoder);
		return;
	}

	hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1);

	connector = &intel_connector->base;
	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
			   DRM_MODE_CONNECTOR_HDMIA);
	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);

	intel_encoder->type = INTEL_OUTPUT_HDMI;

	connector->polled = DRM_CONNECTOR_POLL_HPD;
	connector->interlace_allowed = 0;
	connector->doublescan_allowed = 0;
	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

	/* Set up the DDC bus. */
	if (sdvox_reg == SDVOB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == SDVOC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIB) {
		intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
								"HDMIB");
		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMIC) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
								"HDMIC");
		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
	} else if (sdvox_reg == HDMID) {
		intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
		intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
								"HDMID");
		dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
	}
	if (!intel_encoder->ddc_bus)
		goto err_connector;

	hdmi_priv->sdvox_reg = sdvox_reg;
	intel_encoder->dev_priv = hdmi_priv;

	drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
			 DRM_MODE_ENCODER_TMDS);
	drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs);

	drm_mode_connector_attach_encoder(&intel_connector->base,
					  &intel_encoder->enc);
	drm_sysfs_connector_add(connector);

	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	 * 0xd.  Failure to do so will result in spurious interrupts being
	 * generated on the port when a cable is not attached.
	 */
	if (IS_G4X(dev) && !IS_GM45(dev)) {
		u32 temp = I915_READ(PEG_BAND_GAP_DATA);
		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
	}

	return;

err_connector:
	drm_connector_cleanup(connector);
	kfree(intel_encoder);
	kfree(intel_connector);

	return;
}
Commit	Line	Data
7d57382e EA	1	/*
	2	* Copyright 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright © 2006-2009 Intel Corporation
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	* Jesse Barnes <jesse.barnes@intel.com>
	27	*/
	28
	29	#include <linux/i2c.h>
5a0e3ad6	30	#include <linux/slab.h>
7d57382e EA	31	#include <linux/delay.h>
	32	#include "drmP.h"
	33	#include "drm.h"
	34	#include "drm_crtc.h"
aa93d632	35	#include "drm_edid.h"
7d57382e EA	36	#include "intel_drv.h"
	37	#include "i915_drm.h"
	38	#include "i915_drv.h"
	39
	40	struct intel_hdmi_priv {
	41	u32 sdvox_reg;
9dff6af8	42	bool has_hdmi_sink;
7d57382e EA	43	};
	44
	45	static void intel_hdmi_mode_set(struct drm_encoder *encoder,
	46	struct drm_display_mode *mode,
	47	struct drm_display_mode *adjusted_mode)
	48	{
	49	struct drm_device *dev = encoder->dev;
	50	struct drm_i915_private *dev_priv = dev->dev_private;
	51	struct drm_crtc *crtc = encoder->crtc;
	52	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
21d40d37 EA	53	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 EA	54	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
7d57382e EA	55	u32 sdvox;
7d57382e EA	56
b599c0bc AJ	57	sdvox = SDVO_ENCODING_HDMI \| SDVO_BORDER_ENABLE;
	58	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	59	sdvox \|= SDVO_VSYNC_ACTIVE_HIGH;
	60	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	61	sdvox \|= SDVO_HSYNC_ACTIVE_HIGH;
7d57382e	62
467b200d	63	if (hdmi_priv->has_hdmi_sink) {
7d57382e	64	sdvox \|= SDVO_AUDIO_ENABLE;
467b200d ZW	65	if (HAS_PCH_CPT(dev))
	66	sdvox \|= HDMI_MODE_SELECT;
	67	}
7d57382e	68
0f229062 ZW	69	if (intel_crtc->pipe == 1) {
	70	if (HAS_PCH_CPT(dev))
	71	sdvox \|= PORT_TRANS_B_SEL_CPT;
	72	else
	73	sdvox \|= SDVO_PIPE_B_SELECT;
	74	}
7d57382e EA	75
	76	I915_WRITE(hdmi_priv->sdvox_reg, sdvox);
	77	POSTING_READ(hdmi_priv->sdvox_reg);
	78	}
	79
	80	static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
	81	{
	82	struct drm_device *dev = encoder->dev;
	83	struct drm_i915_private *dev_priv = dev->dev_private;
21d40d37 EA	84	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 EA	85	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
7d57382e EA	86	u32 temp;
7d57382e EA	87
d8a2d0e0 ZW	88	temp = I915_READ(hdmi_priv->sdvox_reg);
	89
	90	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
	91	* we do this anyway which shows more stable in testing.
	92	*/
c619eed4	93	if (HAS_PCH_SPLIT(dev)) {
7d57382e	94	I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
d8a2d0e0 ZW	95	POSTING_READ(hdmi_priv->sdvox_reg);
	96	}
	97
	98	if (mode != DRM_MODE_DPMS_ON) {
	99	temp &= ~SDVO_ENABLE;
7d57382e	100	} else {
d8a2d0e0	101	temp \|= SDVO_ENABLE;
7d57382e	102	}
d8a2d0e0 ZW	103
d8a2d0e0 ZW	104	I915_WRITE(hdmi_priv->sdvox_reg, temp);
7d57382e	105	POSTING_READ(hdmi_priv->sdvox_reg);
d8a2d0e0 ZW	106
	107	/* HW workaround, need to write this twice for issue that may result
	108	* in first write getting masked.
	109	*/
c619eed4	110	if (HAS_PCH_SPLIT(dev)) {
d8a2d0e0 ZW	111	I915_WRITE(hdmi_priv->sdvox_reg, temp);
	112	POSTING_READ(hdmi_priv->sdvox_reg);
	113	}
7d57382e EA	114	}
7d57382e EA	115
7d57382e EA	116	static int intel_hdmi_mode_valid(struct drm_connector *connector,
	117	struct drm_display_mode *mode)
	118	{
	119	if (mode->clock > 165000)
	120	return MODE_CLOCK_HIGH;
	121	if (mode->clock < 20000)
	122	return MODE_CLOCK_HIGH;
	123
	124	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	125	return MODE_NO_DBLESCAN;
	126
	127	return MODE_OK;
	128	}
	129
	130	static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
	131	struct drm_display_mode *mode,
	132	struct drm_display_mode *adjusted_mode)
	133	{
	134	return true;
	135	}
	136
aa93d632	137	static enum drm_connector_status
2ded9e27	138	intel_hdmi_detect(struct drm_connector *connector)
9dff6af8	139	{
674e2d08 ZW	140	struct drm_encoder *encoder = intel_attached_encoder(connector);
674e2d08 ZW	141	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37	142	struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
9dff6af8	143	struct edid *edid = NULL;
aa93d632	144	enum drm_connector_status status = connector_status_disconnected;
9dff6af8	145
2ded9e27	146	hdmi_priv->has_hdmi_sink = false;
674e2d08	147	edid = drm_get_edid(connector,
21d40d37	148	intel_encoder->ddc_bus);
2ded9e27	149
aa93d632	150	if (edid) {
be9f1c4f	151	if (edid->input & DRM_EDID_INPUT_DIGITAL) {
aa93d632 KP	152	status = connector_status_connected;
	153	hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
	154	}
674e2d08	155	connector->display_info.raw_edid = NULL;
aa93d632	156	kfree(edid);
9dff6af8	157	}
30ad48b7	158
2ded9e27	159	return status;
7d57382e EA	160	}
	161
	162	static int intel_hdmi_get_modes(struct drm_connector *connector)
	163	{
674e2d08 ZW	164	struct drm_encoder *encoder = intel_attached_encoder(connector);
674e2d08 ZW	165	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
7d57382e EA	166
	167	/* We should parse the EDID data and find out if it's an HDMI sink so
	168	* we can send audio to it.
	169	*/
	170
335af9a2	171	return intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
7d57382e EA	172	}
	173
	174	static void intel_hdmi_destroy(struct drm_connector *connector)
	175	{
7d57382e EA	176	drm_sysfs_connector_remove(connector);
7d57382e EA	177	drm_connector_cleanup(connector);
674e2d08	178	kfree(connector);
7d57382e EA	179	}
	180
	181	static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
	182	.dpms = intel_hdmi_dpms,
	183	.mode_fixup = intel_hdmi_mode_fixup,
	184	.prepare = intel_encoder_prepare,
	185	.mode_set = intel_hdmi_mode_set,
	186	.commit = intel_encoder_commit,
	187	};
	188
	189	static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
c9fb15f6	190	.dpms = drm_helper_connector_dpms,
7d57382e EA	191	.detect = intel_hdmi_detect,
	192	.fill_modes = drm_helper_probe_single_connector_modes,
	193	.destroy = intel_hdmi_destroy,
	194	};
	195
	196	static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
	197	.get_modes = intel_hdmi_get_modes,
	198	.mode_valid = intel_hdmi_mode_valid,
674e2d08	199	.best_encoder = intel_attached_encoder,
7d57382e EA	200	};
	201
	202	static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
	203	{
674e2d08 ZW	204	struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
	205
	206	if (intel_encoder->i2c_bus)
	207	intel_i2c_destroy(intel_encoder->i2c_bus);
7d57382e	208	drm_encoder_cleanup(encoder);
674e2d08	209	kfree(intel_encoder);
7d57382e EA	210	}
	211
	212	static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
	213	.destroy = intel_hdmi_enc_destroy,
	214	};
	215
7d57382e EA	216	void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
	217	{
	218	struct drm_i915_private *dev_priv = dev->dev_private;
	219	struct drm_connector *connector;
21d40d37	220	struct intel_encoder *intel_encoder;
674e2d08	221	struct intel_connector *intel_connector;
7d57382e EA	222	struct intel_hdmi_priv *hdmi_priv;
7d57382e EA	223
21d40d37	224	intel_encoder = kcalloc(sizeof(struct intel_encoder) +
7d57382e	225	sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
21d40d37	226	if (!intel_encoder)
7d57382e	227	return;
674e2d08 ZW	228
	229	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	230	if (!intel_connector) {
	231	kfree(intel_encoder);
	232	return;
	233	}
	234
21d40d37	235	hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1);
7d57382e	236
674e2d08	237	connector = &intel_connector->base;
7d57382e	238	drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
8d91104a	239	DRM_MODE_CONNECTOR_HDMIA);
7d57382e EA	240	drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
7d57382e EA	241
21d40d37	242	intel_encoder->type = INTEL_OUTPUT_HDMI;
7d57382e	243
eb1f8e4f	244	connector->polled = DRM_CONNECTOR_POLL_HPD;
7d57382e EA	245	connector->interlace_allowed = 0;
7d57382e EA	246	connector->doublescan_allowed = 0;
21d40d37	247	intel_encoder->crtc_mask = (1 << 0) \| (1 << 1);
7d57382e EA	248
7d57382e EA	249	/* Set up the DDC bus. */
f8aed700	250	if (sdvox_reg == SDVOB) {
21d40d37 EA	251	intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
21d40d37 EA	252	intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
b01f2c3a	253	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	254	} else if (sdvox_reg == SDVOC) {
21d40d37 EA	255	intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
21d40d37 EA	256	intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
b01f2c3a	257	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	258	} else if (sdvox_reg == HDMIB) {
21d40d37 EA	259	intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
21d40d37 EA	260	intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
30ad48b7	261	"HDMIB");
b01f2c3a	262	dev_priv->hotplug_supported_mask \|= HDMIB_HOTPLUG_INT_STATUS;
f8aed700	263	} else if (sdvox_reg == HDMIC) {
21d40d37 EA	264	intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
21d40d37 EA	265	intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
30ad48b7	266	"HDMIC");
b01f2c3a	267	dev_priv->hotplug_supported_mask \|= HDMIC_HOTPLUG_INT_STATUS;
f8aed700	268	} else if (sdvox_reg == HDMID) {
21d40d37 EA	269	intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
21d40d37 EA	270	intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
30ad48b7	271	"HDMID");
b01f2c3a	272	dev_priv->hotplug_supported_mask \|= HDMID_HOTPLUG_INT_STATUS;
f8aed700	273	}
21d40d37	274	if (!intel_encoder->ddc_bus)
7d57382e EA	275	goto err_connector;
	276
	277	hdmi_priv->sdvox_reg = sdvox_reg;
21d40d37	278	intel_encoder->dev_priv = hdmi_priv;
7d57382e	279
21d40d37	280	drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
7d57382e	281	DRM_MODE_ENCODER_TMDS);
21d40d37	282	drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs);
7d57382e	283
674e2d08	284	drm_mode_connector_attach_encoder(&intel_connector->base,
21d40d37	285	&intel_encoder->enc);
7d57382e EA	286	drm_sysfs_connector_add(connector);
	287
	288	/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
	289	* 0xd. Failure to do so will result in spurious interrupts being
	290	* generated on the port when a cable is not attached.
	291	*/
	292	if (IS_G4X(dev) && !IS_GM45(dev)) {
	293	u32 temp = I915_READ(PEG_BAND_GAP_DATA);
	294	I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) \| 0xd);
	295	}
	296
	297	return;
	298
	299	err_connector:
	300	drm_connector_cleanup(connector);
21d40d37	301	kfree(intel_encoder);
674e2d08	302	kfree(intel_connector);
7d57382e EA	303
	304	return;
	305	}