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79e53945 JB |
1 | /* |
2 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
3 | * Copyright © 2006-2008 Intel Corporation | |
4 | * Jesse Barnes <jesse.barnes@intel.com> | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the "Software"), | |
8 | * to deal in the Software without restriction, including without limitation | |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
10 | * and/or sell copies of the Software, and to permit persons to whom the | |
11 | * Software is furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the next | |
14 | * paragraph) shall be included in all copies or substantial portions of the | |
15 | * Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
23 | * DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | * Authors: | |
26 | * Eric Anholt <eric@anholt.net> | |
27 | */ | |
28 | #include <linux/i2c.h> | |
5a0e3ad6 | 29 | #include <linux/slab.h> |
79e53945 JB |
30 | #include <linux/i2c-id.h> |
31 | #include <linux/i2c-algo-bit.h> | |
32 | #include "drmP.h" | |
33 | #include "drm.h" | |
34 | #include "intel_drv.h" | |
35 | #include "i915_drm.h" | |
36 | #include "i915_drv.h" | |
37 | ||
0ba0e9e1 SL |
38 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable) |
39 | { | |
40 | struct drm_i915_private *dev_priv = dev->dev_private; | |
41 | ||
42 | /* When using bit bashing for I2C, this bit needs to be set to 1 */ | |
f2b115e6 | 43 | if (!IS_PINEVIEW(dev)) |
0ba0e9e1 SL |
44 | return; |
45 | if (enable) | |
652c393a JB |
46 | I915_WRITE(DSPCLK_GATE_D, |
47 | I915_READ(DSPCLK_GATE_D) | DPCUNIT_CLOCK_GATE_DISABLE); | |
0ba0e9e1 | 48 | else |
652c393a JB |
49 | I915_WRITE(DSPCLK_GATE_D, |
50 | I915_READ(DSPCLK_GATE_D) & (~DPCUNIT_CLOCK_GATE_DISABLE)); | |
0ba0e9e1 SL |
51 | } |
52 | ||
79e53945 JB |
53 | /* |
54 | * Intel GPIO access functions | |
55 | */ | |
56 | ||
57 | #define I2C_RISEFALL_TIME 20 | |
58 | ||
59 | static int get_clock(void *data) | |
60 | { | |
61 | struct intel_i2c_chan *chan = data; | |
62 | struct drm_i915_private *dev_priv = chan->drm_dev->dev_private; | |
63 | u32 val; | |
64 | ||
65 | val = I915_READ(chan->reg); | |
66 | return ((val & GPIO_CLOCK_VAL_IN) != 0); | |
67 | } | |
68 | ||
69 | static int get_data(void *data) | |
70 | { | |
71 | struct intel_i2c_chan *chan = data; | |
72 | struct drm_i915_private *dev_priv = chan->drm_dev->dev_private; | |
73 | u32 val; | |
74 | ||
75 | val = I915_READ(chan->reg); | |
76 | return ((val & GPIO_DATA_VAL_IN) != 0); | |
77 | } | |
78 | ||
79 | static void set_clock(void *data, int state_high) | |
80 | { | |
81 | struct intel_i2c_chan *chan = data; | |
82 | struct drm_device *dev = chan->drm_dev; | |
83 | struct drm_i915_private *dev_priv = chan->drm_dev->dev_private; | |
84 | u32 reserved = 0, clock_bits; | |
85 | ||
86 | /* On most chips, these bits must be preserved in software. */ | |
87 | if (!IS_I830(dev) && !IS_845G(dev)) | |
88 | reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE | | |
89 | GPIO_CLOCK_PULLUP_DISABLE); | |
90 | ||
91 | if (state_high) | |
92 | clock_bits = GPIO_CLOCK_DIR_IN | GPIO_CLOCK_DIR_MASK; | |
93 | else | |
94 | clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK | | |
95 | GPIO_CLOCK_VAL_MASK; | |
96 | I915_WRITE(chan->reg, reserved | clock_bits); | |
97 | udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */ | |
98 | } | |
99 | ||
100 | static void set_data(void *data, int state_high) | |
101 | { | |
102 | struct intel_i2c_chan *chan = data; | |
103 | struct drm_device *dev = chan->drm_dev; | |
104 | struct drm_i915_private *dev_priv = chan->drm_dev->dev_private; | |
105 | u32 reserved = 0, data_bits; | |
106 | ||
107 | /* On most chips, these bits must be preserved in software. */ | |
108 | if (!IS_I830(dev) && !IS_845G(dev)) | |
109 | reserved = I915_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE | | |
110 | GPIO_CLOCK_PULLUP_DISABLE); | |
111 | ||
112 | if (state_high) | |
113 | data_bits = GPIO_DATA_DIR_IN | GPIO_DATA_DIR_MASK; | |
114 | else | |
115 | data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK | | |
116 | GPIO_DATA_VAL_MASK; | |
117 | ||
118 | I915_WRITE(chan->reg, reserved | data_bits); | |
119 | udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */ | |
120 | } | |
121 | ||
f0217c42 EA |
122 | /* Clears the GMBUS setup. Our driver doesn't make use of the GMBUS I2C |
123 | * engine, but if the BIOS leaves it enabled, then that can break our use | |
124 | * of the bit-banging I2C interfaces. This is notably the case with the | |
125 | * Mac Mini in EFI mode. | |
126 | */ | |
127 | void | |
128 | intel_i2c_reset_gmbus(struct drm_device *dev) | |
129 | { | |
130 | struct drm_i915_private *dev_priv = dev->dev_private; | |
131 | ||
c619eed4 | 132 | if (HAS_PCH_SPLIT(dev)) { |
f0217c42 EA |
133 | I915_WRITE(PCH_GMBUS0, 0); |
134 | } else { | |
135 | I915_WRITE(GMBUS0, 0); | |
136 | } | |
137 | } | |
138 | ||
79e53945 JB |
139 | /** |
140 | * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg | |
141 | * @dev: DRM device | |
142 | * @output: driver specific output device | |
143 | * @reg: GPIO reg to use | |
144 | * @name: name for this bus | |
f9c10a9b | 145 | * @slave_addr: slave address (if fixed) |
79e53945 JB |
146 | * |
147 | * Creates and registers a new i2c bus with the Linux i2c layer, for use | |
148 | * in output probing and control (e.g. DDC or SDVO control functions). | |
149 | * | |
150 | * Possible values for @reg include: | |
151 | * %GPIOA | |
152 | * %GPIOB | |
153 | * %GPIOC | |
154 | * %GPIOD | |
155 | * %GPIOE | |
156 | * %GPIOF | |
157 | * %GPIOG | |
158 | * %GPIOH | |
159 | * see PRM for details on how these different busses are used. | |
160 | */ | |
f9c10a9b KP |
161 | struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg, |
162 | const char *name) | |
79e53945 JB |
163 | { |
164 | struct intel_i2c_chan *chan; | |
165 | ||
166 | chan = kzalloc(sizeof(struct intel_i2c_chan), GFP_KERNEL); | |
167 | if (!chan) | |
168 | goto out_free; | |
169 | ||
170 | chan->drm_dev = dev; | |
171 | chan->reg = reg; | |
172 | snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name); | |
173 | chan->adapter.owner = THIS_MODULE; | |
79e53945 JB |
174 | chan->adapter.algo_data = &chan->algo; |
175 | chan->adapter.dev.parent = &dev->pdev->dev; | |
176 | chan->algo.setsda = set_data; | |
177 | chan->algo.setscl = set_clock; | |
178 | chan->algo.getsda = get_data; | |
179 | chan->algo.getscl = get_clock; | |
180 | chan->algo.udelay = 20; | |
181 | chan->algo.timeout = usecs_to_jiffies(2200); | |
182 | chan->algo.data = chan; | |
183 | ||
184 | i2c_set_adapdata(&chan->adapter, chan); | |
185 | ||
186 | if(i2c_bit_add_bus(&chan->adapter)) | |
187 | goto out_free; | |
188 | ||
f0217c42 EA |
189 | intel_i2c_reset_gmbus(dev); |
190 | ||
79e53945 | 191 | /* JJJ: raise SCL and SDA? */ |
0ba0e9e1 | 192 | intel_i2c_quirk_set(dev, true); |
79e53945 JB |
193 | set_data(chan, 1); |
194 | set_clock(chan, 1); | |
0ba0e9e1 | 195 | intel_i2c_quirk_set(dev, false); |
79e53945 JB |
196 | udelay(20); |
197 | ||
f9c10a9b | 198 | return &chan->adapter; |
79e53945 JB |
199 | |
200 | out_free: | |
201 | kfree(chan); | |
202 | return NULL; | |
203 | } | |
204 | ||
205 | /** | |
206 | * intel_i2c_destroy - unregister and free i2c bus resources | |
207 | * @output: channel to free | |
208 | * | |
209 | * Unregister the adapter from the i2c layer, then free the structure. | |
210 | */ | |
f9c10a9b | 211 | void intel_i2c_destroy(struct i2c_adapter *adapter) |
79e53945 | 212 | { |
f9c10a9b KP |
213 | struct intel_i2c_chan *chan; |
214 | ||
215 | if (!adapter) | |
79e53945 JB |
216 | return; |
217 | ||
f9c10a9b KP |
218 | chan = container_of(adapter, |
219 | struct intel_i2c_chan, | |
220 | adapter); | |
79e53945 JB |
221 | i2c_del_adapter(&chan->adapter); |
222 | kfree(chan); | |
223 | } |