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1 | /* |
2 | * Copyright (c) 2015 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
21 | * SOFTWARE. | |
22 | */ | |
23 | ||
24 | #ifndef INTEL_MOCS_H | |
25 | #define INTEL_MOCS_H | |
26 | ||
27 | /** | |
28 | * DOC: Memory Objects Control State (MOCS) | |
29 | * | |
30 | * Motivation: | |
31 | * In previous Gens the MOCS settings was a value that was set by user land as | |
32 | * part of the batch. In Gen9 this has changed to be a single table (per ring) | |
33 | * that all batches now reference by index instead of programming the MOCS | |
34 | * directly. | |
35 | * | |
36 | * The one wrinkle in this is that only PART of the MOCS tables are included | |
37 | * in context (The GFX_MOCS_0 - GFX_MOCS_64 and the LNCFCMOCS0 - LNCFCMOCS32 | |
38 | * registers). The rest are not (the settings for the other rings). | |
39 | * | |
40 | * This table needs to be set at system start-up because the way the table | |
41 | * interacts with the contexts and the GmmLib interface. | |
42 | * | |
43 | * | |
44 | * Implementation: | |
45 | * | |
46 | * The tables (one per supported platform) are defined in intel_mocs.c | |
47 | * and are programmed in the first batch after the context is loaded | |
48 | * (with the hardware workarounds). This will then let the usual | |
49 | * context handling keep the MOCS in step. | |
50 | */ | |
51 | ||
52 | #include <drm/drmP.h> | |
53 | #include "i915_drv.h" | |
54 | ||
55 | int intel_rcs_context_init_mocs(struct drm_i915_gem_request *req); | |
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56 | void intel_mocs_init_l3cc_table(struct drm_device *dev); |
57 | int intel_mocs_init_engine(struct intel_engine_cs *ring); | |
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58 | |
59 | #endif |