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8ee1c3db MG |
1 | /* |
2 | * Copyright 2008 Intel Corporation <hong.liu@intel.com> | |
3 | * Copyright 2008 Red Hat <mjg@redhat.com> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
20 | * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
22 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
24 | * SOFTWARE. | |
25 | * | |
26 | */ | |
27 | ||
28 | #include <linux/acpi.h> | |
b30581a4 | 29 | #include <linux/dmi.h> |
74a365b3 | 30 | #include <acpi/video.h> |
8ee1c3db | 31 | |
760285e7 DH |
32 | #include <drm/drmP.h> |
33 | #include <drm/i915_drm.h> | |
8ee1c3db | 34 | #include "i915_drv.h" |
a9573556 | 35 | #include "intel_drv.h" |
8ee1c3db | 36 | |
8ee1c3db MG |
37 | #define OPREGION_HEADER_OFFSET 0 |
38 | #define OPREGION_ACPI_OFFSET 0x100 | |
82d3c90c CW |
39 | #define ACPI_CLID 0x01ac /* current lid state indicator */ |
40 | #define ACPI_CDCK 0x01b0 /* current docking state indicator */ | |
8ee1c3db MG |
41 | #define OPREGION_SWSCI_OFFSET 0x200 |
42 | #define OPREGION_ASLE_OFFSET 0x300 | |
44834a67 | 43 | #define OPREGION_VBT_OFFSET 0x400 |
b3cbd98b | 44 | #define OPREGION_ASLE_EXT_OFFSET 0x1C00 |
8ee1c3db MG |
45 | |
46 | #define OPREGION_SIGNATURE "IntelGraphicsMem" | |
47 | #define MBOX_ACPI (1<<0) | |
48 | #define MBOX_SWSCI (1<<1) | |
49 | #define MBOX_ASLE (1<<2) | |
f6a430d8 | 50 | #define MBOX_ASLE_EXT (1<<4) |
8ee1c3db MG |
51 | |
52 | struct opregion_header { | |
0206e353 AJ |
53 | u8 signature[16]; |
54 | u32 size; | |
55 | u32 opregion_ver; | |
56 | u8 bios_ver[32]; | |
57 | u8 vbios_ver[16]; | |
58 | u8 driver_ver[16]; | |
59 | u32 mboxes; | |
f6a430d8 JN |
60 | u32 driver_model; |
61 | u32 pcon; | |
62 | u8 dver[32]; | |
63 | u8 rsvd[124]; | |
e4451239 | 64 | } __packed; |
8ee1c3db MG |
65 | |
66 | /* OpRegion mailbox #1: public ACPI methods */ | |
67 | struct opregion_acpi { | |
0206e353 AJ |
68 | u32 drdy; /* driver readiness */ |
69 | u32 csts; /* notification status */ | |
70 | u32 cevt; /* current event */ | |
71 | u8 rsvd1[20]; | |
72 | u32 didl[8]; /* supported display devices ID list */ | |
73 | u32 cpdl[8]; /* currently presented display list */ | |
74 | u32 cadl[8]; /* currently active display list */ | |
75 | u32 nadl[8]; /* next active devices list */ | |
76 | u32 aslp; /* ASL sleep time-out */ | |
77 | u32 tidx; /* toggle table index */ | |
78 | u32 chpd; /* current hotplug enable indicator */ | |
79 | u32 clid; /* current lid state*/ | |
80 | u32 cdck; /* current docking state */ | |
81 | u32 sxsw; /* Sx state resume */ | |
82 | u32 evts; /* ASL supported events */ | |
83 | u32 cnot; /* current OS notification */ | |
84 | u32 nrdy; /* driver status */ | |
f6a430d8 JN |
85 | u32 did2[7]; /* extended supported display devices ID list */ |
86 | u32 cpd2[7]; /* extended attached display devices list */ | |
87 | u8 rsvd2[4]; | |
e4451239 | 88 | } __packed; |
8ee1c3db MG |
89 | |
90 | /* OpRegion mailbox #2: SWSCI */ | |
91 | struct opregion_swsci { | |
0206e353 AJ |
92 | u32 scic; /* SWSCI command|status|data */ |
93 | u32 parm; /* command parameters */ | |
94 | u32 dslp; /* driver sleep time-out */ | |
95 | u8 rsvd[244]; | |
e4451239 | 96 | } __packed; |
8ee1c3db MG |
97 | |
98 | /* OpRegion mailbox #3: ASLE */ | |
99 | struct opregion_asle { | |
0206e353 AJ |
100 | u32 ardy; /* driver readiness */ |
101 | u32 aslc; /* ASLE interrupt command */ | |
102 | u32 tche; /* technology enabled indicator */ | |
103 | u32 alsi; /* current ALS illuminance reading */ | |
104 | u32 bclp; /* backlight brightness to set */ | |
105 | u32 pfit; /* panel fitting state */ | |
106 | u32 cblv; /* current brightness level */ | |
107 | u16 bclm[20]; /* backlight level duty cycle mapping table */ | |
108 | u32 cpfm; /* current panel fitting mode */ | |
109 | u32 epfm; /* enabled panel fitting modes */ | |
110 | u8 plut[74]; /* panel LUT and identifier */ | |
111 | u32 pfmb; /* PWM freq and min brightness */ | |
507c1a45 PZ |
112 | u32 cddv; /* color correction default values */ |
113 | u32 pcft; /* power conservation features */ | |
114 | u32 srot; /* supported rotation angles */ | |
115 | u32 iuer; /* IUER events */ | |
f6a430d8 JN |
116 | u64 fdss; |
117 | u32 fdsp; | |
118 | u32 stat; | |
c85f6c91 D |
119 | u64 rvda; /* Physical address of raw vbt data */ |
120 | u32 rvds; /* Size of raw vbt data */ | |
121 | u8 rsvd[58]; | |
e4451239 | 122 | } __packed; |
8ee1c3db | 123 | |
b3cbd98b D |
124 | /* OpRegion mailbox #5: ASLE ext */ |
125 | struct opregion_asle_ext { | |
126 | u32 phed; /* Panel Header */ | |
127 | u8 bddc[256]; /* Panel EDID */ | |
128 | u8 rsvd[764]; | |
129 | } __packed; | |
130 | ||
68bca4b0 JN |
131 | /* Driver readiness indicator */ |
132 | #define ASLE_ARDY_READY (1 << 0) | |
133 | #define ASLE_ARDY_NOT_READY (0 << 0) | |
134 | ||
507c1a45 PZ |
135 | /* ASLE Interrupt Command (ASLC) bits */ |
136 | #define ASLC_SET_ALS_ILLUM (1 << 0) | |
137 | #define ASLC_SET_BACKLIGHT (1 << 1) | |
138 | #define ASLC_SET_PFIT (1 << 2) | |
139 | #define ASLC_SET_PWM_FREQ (1 << 3) | |
140 | #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4) | |
141 | #define ASLC_BUTTON_ARRAY (1 << 5) | |
142 | #define ASLC_CONVERTIBLE_INDICATOR (1 << 6) | |
143 | #define ASLC_DOCKING_INDICATOR (1 << 7) | |
144 | #define ASLC_ISCT_STATE_CHANGE (1 << 8) | |
145 | #define ASLC_REQ_MSK 0x1ff | |
146 | /* response bits */ | |
147 | #define ASLC_ALS_ILLUM_FAILED (1 << 10) | |
148 | #define ASLC_BACKLIGHT_FAILED (1 << 12) | |
149 | #define ASLC_PFIT_FAILED (1 << 14) | |
150 | #define ASLC_PWM_FREQ_FAILED (1 << 16) | |
151 | #define ASLC_ROTATION_ANGLES_FAILED (1 << 18) | |
152 | #define ASLC_BUTTON_ARRAY_FAILED (1 << 20) | |
153 | #define ASLC_CONVERTIBLE_FAILED (1 << 22) | |
154 | #define ASLC_DOCKING_FAILED (1 << 24) | |
155 | #define ASLC_ISCT_STATE_FAILED (1 << 26) | |
8ee1c3db | 156 | |
f599cc29 JN |
157 | /* Technology enabled indicator */ |
158 | #define ASLE_TCHE_ALS_EN (1 << 0) | |
159 | #define ASLE_TCHE_BLC_EN (1 << 1) | |
160 | #define ASLE_TCHE_PFIT_EN (1 << 2) | |
161 | #define ASLE_TCHE_PFMB_EN (1 << 3) | |
162 | ||
8ee1c3db MG |
163 | /* ASLE backlight brightness to set */ |
164 | #define ASLE_BCLP_VALID (1<<31) | |
165 | #define ASLE_BCLP_MSK (~(1<<31)) | |
166 | ||
167 | /* ASLE panel fitting request */ | |
168 | #define ASLE_PFIT_VALID (1<<31) | |
169 | #define ASLE_PFIT_CENTER (1<<0) | |
170 | #define ASLE_PFIT_STRETCH_TEXT (1<<1) | |
171 | #define ASLE_PFIT_STRETCH_GFX (1<<2) | |
172 | ||
173 | /* PWM frequency and minimum brightness */ | |
174 | #define ASLE_PFMB_BRIGHTNESS_MASK (0xff) | |
175 | #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8) | |
176 | #define ASLE_PFMB_PWM_MASK (0x7ffffe00) | |
177 | #define ASLE_PFMB_PWM_VALID (1<<31) | |
178 | ||
179 | #define ASLE_CBLV_VALID (1<<31) | |
180 | ||
507c1a45 PZ |
181 | /* IUER */ |
182 | #define ASLE_IUER_DOCKING (1 << 7) | |
183 | #define ASLE_IUER_CONVERTIBLE (1 << 6) | |
184 | #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4) | |
185 | #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3) | |
186 | #define ASLE_IUER_VOLUME_UP_BTN (1 << 2) | |
187 | #define ASLE_IUER_WINDOWS_BTN (1 << 1) | |
188 | #define ASLE_IUER_POWER_BTN (1 << 0) | |
189 | ||
ebde53c7 JN |
190 | /* Software System Control Interrupt (SWSCI) */ |
191 | #define SWSCI_SCIC_INDICATOR (1 << 0) | |
192 | #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1 | |
193 | #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1) | |
194 | #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8 | |
195 | #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8) | |
196 | #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8 | |
197 | #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8) | |
198 | #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5 | |
199 | #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5) | |
200 | #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1 | |
201 | ||
202 | #define SWSCI_FUNCTION_CODE(main, sub) \ | |
203 | ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \ | |
204 | (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT) | |
205 | ||
206 | /* SWSCI: Get BIOS Data (GBDA) */ | |
207 | #define SWSCI_GBDA 4 | |
208 | #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0) | |
209 | #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1) | |
210 | #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4) | |
211 | #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5) | |
212 | #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6) | |
213 | #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7) | |
214 | #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10) | |
215 | ||
216 | /* SWSCI: System BIOS Callbacks (SBCB) */ | |
217 | #define SWSCI_SBCB 6 | |
218 | #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0) | |
219 | #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1) | |
220 | #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3) | |
221 | #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4) | |
222 | #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5) | |
223 | #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6) | |
224 | #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7) | |
225 | #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8) | |
226 | #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9) | |
227 | #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10) | |
228 | #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11) | |
229 | #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16) | |
230 | #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17) | |
231 | #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18) | |
232 | #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19) | |
233 | #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21) | |
234 | ||
25affa73 JN |
235 | /* |
236 | * ACPI Specification, Revision 5.0, Appendix B.3.2 _DOD (Enumerate All Devices | |
237 | * Attached to the Display Adapter). | |
238 | */ | |
239 | #define ACPI_DISPLAY_INDEX_SHIFT 0 | |
240 | #define ACPI_DISPLAY_INDEX_MASK (0xf << 0) | |
241 | #define ACPI_DISPLAY_PORT_ATTACHMENT_SHIFT 4 | |
242 | #define ACPI_DISPLAY_PORT_ATTACHMENT_MASK (0xf << 4) | |
243 | #define ACPI_DISPLAY_TYPE_SHIFT 8 | |
244 | #define ACPI_DISPLAY_TYPE_MASK (0xf << 8) | |
245 | #define ACPI_DISPLAY_TYPE_OTHER (0 << 8) | |
246 | #define ACPI_DISPLAY_TYPE_VGA (1 << 8) | |
247 | #define ACPI_DISPLAY_TYPE_TV (2 << 8) | |
248 | #define ACPI_DISPLAY_TYPE_EXTERNAL_DIGITAL (3 << 8) | |
249 | #define ACPI_DISPLAY_TYPE_INTERNAL_DIGITAL (4 << 8) | |
250 | #define ACPI_VENDOR_SPECIFIC_SHIFT 12 | |
251 | #define ACPI_VENDOR_SPECIFIC_MASK (0xf << 12) | |
252 | #define ACPI_BIOS_CAN_DETECT (1 << 16) | |
253 | #define ACPI_DEPENDS_ON_VGA (1 << 17) | |
254 | #define ACPI_PIPE_ID_SHIFT 18 | |
255 | #define ACPI_PIPE_ID_MASK (7 << 18) | |
256 | #define ACPI_DEVICE_ID_SCHEME (1 << 31) | |
74a365b3 | 257 | |
bdde5c6a JN |
258 | #define MAX_DSLP 1500 |
259 | ||
6f9f4b7a CW |
260 | static int swsci(struct drm_i915_private *dev_priv, |
261 | u32 function, u32 parm, u32 *parm_out) | |
ebde53c7 | 262 | { |
115719fc | 263 | struct opregion_swsci *swsci = dev_priv->opregion.swsci; |
91c8a326 | 264 | struct pci_dev *pdev = dev_priv->drm.pdev; |
ebde53c7 | 265 | u32 main_function, sub_function, scic; |
e10fa551 | 266 | u16 swsci_val; |
ebde53c7 JN |
267 | u32 dslp; |
268 | ||
269 | if (!swsci) | |
270 | return -ENODEV; | |
271 | ||
272 | main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >> | |
273 | SWSCI_SCIC_MAIN_FUNCTION_SHIFT; | |
274 | sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >> | |
275 | SWSCI_SCIC_SUB_FUNCTION_SHIFT; | |
276 | ||
277 | /* Check if we can call the function. See swsci_setup for details. */ | |
278 | if (main_function == SWSCI_SBCB) { | |
279 | if ((dev_priv->opregion.swsci_sbcb_sub_functions & | |
280 | (1 << sub_function)) == 0) | |
281 | return -EINVAL; | |
282 | } else if (main_function == SWSCI_GBDA) { | |
283 | if ((dev_priv->opregion.swsci_gbda_sub_functions & | |
284 | (1 << sub_function)) == 0) | |
285 | return -EINVAL; | |
286 | } | |
287 | ||
288 | /* Driver sleep timeout in ms. */ | |
115719fc | 289 | dslp = swsci->dslp; |
ebde53c7 | 290 | if (!dslp) { |
4994aa8c PZ |
291 | /* The spec says 2ms should be the default, but it's too small |
292 | * for some machines. */ | |
293 | dslp = 50; | |
bdde5c6a | 294 | } else if (dslp > MAX_DSLP) { |
ebde53c7 | 295 | /* Hey bios, trust must be earned. */ |
bdde5c6a JN |
296 | DRM_INFO_ONCE("ACPI BIOS requests an excessive sleep of %u ms, " |
297 | "using %u ms instead\n", dslp, MAX_DSLP); | |
298 | dslp = MAX_DSLP; | |
ebde53c7 JN |
299 | } |
300 | ||
301 | /* The spec tells us to do this, but we are the only user... */ | |
115719fc | 302 | scic = swsci->scic; |
ebde53c7 JN |
303 | if (scic & SWSCI_SCIC_INDICATOR) { |
304 | DRM_DEBUG_DRIVER("SWSCI request already in progress\n"); | |
305 | return -EBUSY; | |
306 | } | |
307 | ||
308 | scic = function | SWSCI_SCIC_INDICATOR; | |
309 | ||
115719fc WD |
310 | swsci->parm = parm; |
311 | swsci->scic = scic; | |
ebde53c7 JN |
312 | |
313 | /* Ensure SCI event is selected and event trigger is cleared. */ | |
6f9f4b7a | 314 | pci_read_config_word(pdev, SWSCI, &swsci_val); |
e10fa551 JL |
315 | if (!(swsci_val & SWSCI_SCISEL) || (swsci_val & SWSCI_GSSCIE)) { |
316 | swsci_val |= SWSCI_SCISEL; | |
317 | swsci_val &= ~SWSCI_GSSCIE; | |
6f9f4b7a | 318 | pci_write_config_word(pdev, SWSCI, swsci_val); |
ebde53c7 JN |
319 | } |
320 | ||
321 | /* Use event trigger to tell bios to check the mail. */ | |
e10fa551 | 322 | swsci_val |= SWSCI_GSSCIE; |
6f9f4b7a | 323 | pci_write_config_word(pdev, SWSCI, swsci_val); |
ebde53c7 JN |
324 | |
325 | /* Poll for the result. */ | |
115719fc | 326 | #define C (((scic = swsci->scic) & SWSCI_SCIC_INDICATOR) == 0) |
ebde53c7 JN |
327 | if (wait_for(C, dslp)) { |
328 | DRM_DEBUG_DRIVER("SWSCI request timed out\n"); | |
329 | return -ETIMEDOUT; | |
330 | } | |
331 | ||
332 | scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >> | |
333 | SWSCI_SCIC_EXIT_STATUS_SHIFT; | |
334 | ||
335 | /* Note: scic == 0 is an error! */ | |
336 | if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) { | |
337 | DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic); | |
338 | return -EIO; | |
339 | } | |
340 | ||
341 | if (parm_out) | |
115719fc | 342 | *parm_out = swsci->parm; |
ebde53c7 JN |
343 | |
344 | return 0; | |
345 | ||
346 | #undef C | |
347 | } | |
348 | ||
9c4b0a68 JN |
349 | #define DISPLAY_TYPE_CRT 0 |
350 | #define DISPLAY_TYPE_TV 1 | |
351 | #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2 | |
352 | #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3 | |
353 | ||
354 | int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, | |
355 | bool enable) | |
356 | { | |
6f9f4b7a | 357 | struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); |
9c4b0a68 JN |
358 | u32 parm = 0; |
359 | u32 type = 0; | |
360 | u32 port; | |
361 | ||
362 | /* don't care about old stuff for now */ | |
6f9f4b7a | 363 | if (!HAS_DDI(dev_priv)) |
9c4b0a68 JN |
364 | return 0; |
365 | ||
7d4aefd0 SS |
366 | if (intel_encoder->type == INTEL_OUTPUT_DSI) |
367 | port = 0; | |
368 | else | |
369 | port = intel_ddi_get_encoder_port(intel_encoder); | |
370 | ||
371 | if (port == PORT_E) { | |
9c4b0a68 JN |
372 | port = 0; |
373 | } else { | |
374 | parm |= 1 << port; | |
375 | port++; | |
376 | } | |
377 | ||
378 | if (!enable) | |
379 | parm |= 4 << 8; | |
380 | ||
381 | switch (intel_encoder->type) { | |
382 | case INTEL_OUTPUT_ANALOG: | |
383 | type = DISPLAY_TYPE_CRT; | |
384 | break; | |
385 | case INTEL_OUTPUT_UNKNOWN: | |
cca0502b | 386 | case INTEL_OUTPUT_DP: |
9c4b0a68 | 387 | case INTEL_OUTPUT_HDMI: |
0e32b39c | 388 | case INTEL_OUTPUT_DP_MST: |
9c4b0a68 JN |
389 | type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL; |
390 | break; | |
391 | case INTEL_OUTPUT_EDP: | |
7d4aefd0 | 392 | case INTEL_OUTPUT_DSI: |
9c4b0a68 JN |
393 | type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL; |
394 | break; | |
395 | default: | |
396 | WARN_ONCE(1, "unsupported intel_encoder type %d\n", | |
397 | intel_encoder->type); | |
398 | return -EINVAL; | |
399 | } | |
400 | ||
401 | parm |= type << (16 + port * 3); | |
402 | ||
6f9f4b7a | 403 | return swsci(dev_priv, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL); |
9c4b0a68 JN |
404 | } |
405 | ||
ecbc5cf3 JN |
406 | static const struct { |
407 | pci_power_t pci_power_state; | |
408 | u32 parm; | |
409 | } power_state_map[] = { | |
410 | { PCI_D0, 0x00 }, | |
411 | { PCI_D1, 0x01 }, | |
412 | { PCI_D2, 0x02 }, | |
413 | { PCI_D3hot, 0x04 }, | |
414 | { PCI_D3cold, 0x04 }, | |
415 | }; | |
416 | ||
6f9f4b7a CW |
417 | int intel_opregion_notify_adapter(struct drm_i915_private *dev_priv, |
418 | pci_power_t state) | |
ecbc5cf3 JN |
419 | { |
420 | int i; | |
421 | ||
6f9f4b7a | 422 | if (!HAS_DDI(dev_priv)) |
ecbc5cf3 JN |
423 | return 0; |
424 | ||
425 | for (i = 0; i < ARRAY_SIZE(power_state_map); i++) { | |
426 | if (state == power_state_map[i].pci_power_state) | |
6f9f4b7a | 427 | return swsci(dev_priv, SWSCI_SBCB_ADAPTER_POWER_STATE, |
ecbc5cf3 JN |
428 | power_state_map[i].parm, NULL); |
429 | } | |
430 | ||
431 | return -EINVAL; | |
432 | } | |
433 | ||
6f9f4b7a | 434 | static u32 asle_set_backlight(struct drm_i915_private *dev_priv, u32 bclp) |
8ee1c3db | 435 | { |
19c8054c | 436 | struct intel_connector *connector; |
115719fc | 437 | struct opregion_asle *asle = dev_priv->opregion.asle; |
91c8a326 | 438 | struct drm_device *dev = &dev_priv->drm; |
8ee1c3db | 439 | |
749052fb JN |
440 | DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp); |
441 | ||
da882e5a | 442 | if (acpi_video_get_backlight_type() == acpi_backlight_native) { |
0b9f7d93 AL |
443 | DRM_DEBUG_KMS("opregion backlight request ignored\n"); |
444 | return 0; | |
445 | } | |
446 | ||
8ee1c3db | 447 | if (!(bclp & ASLE_BCLP_VALID)) |
507c1a45 | 448 | return ASLC_BACKLIGHT_FAILED; |
8ee1c3db MG |
449 | |
450 | bclp &= ASLE_BCLP_MSK; | |
a9573556 | 451 | if (bclp > 255) |
507c1a45 | 452 | return ASLC_BACKLIGHT_FAILED; |
8ee1c3db | 453 | |
51fd371b | 454 | drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); |
c91c9f32 | 455 | |
752aa88a | 456 | /* |
c91c9f32 JN |
457 | * Update backlight on all connectors that support backlight (usually |
458 | * only one). | |
752aa88a | 459 | */ |
540b5d02 | 460 | DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp); |
19c8054c JN |
461 | for_each_intel_connector(dev, connector) |
462 | intel_panel_set_backlight_acpi(connector, bclp, 255); | |
115719fc | 463 | asle->cblv = DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID; |
8ee1c3db | 464 | |
51fd371b | 465 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
752aa88a | 466 | |
c91c9f32 JN |
467 | |
468 | return 0; | |
8ee1c3db MG |
469 | } |
470 | ||
6f9f4b7a | 471 | static u32 asle_set_als_illum(struct drm_i915_private *dev_priv, u32 alsi) |
8ee1c3db MG |
472 | { |
473 | /* alsi is the current ALS reading in lux. 0 indicates below sensor | |
474 | range, 0xffff indicates above sensor range. 1-0xfffe are valid */ | |
e93d440b | 475 | DRM_DEBUG_DRIVER("Illum is not supported\n"); |
507c1a45 | 476 | return ASLC_ALS_ILLUM_FAILED; |
8ee1c3db MG |
477 | } |
478 | ||
6f9f4b7a | 479 | static u32 asle_set_pwm_freq(struct drm_i915_private *dev_priv, u32 pfmb) |
8ee1c3db | 480 | { |
e93d440b | 481 | DRM_DEBUG_DRIVER("PWM freq is not supported\n"); |
507c1a45 | 482 | return ASLC_PWM_FREQ_FAILED; |
8ee1c3db MG |
483 | } |
484 | ||
6f9f4b7a | 485 | static u32 asle_set_pfit(struct drm_i915_private *dev_priv, u32 pfit) |
8ee1c3db MG |
486 | { |
487 | /* Panel fitting is currently controlled by the X code, so this is a | |
488 | noop until modesetting support works fully */ | |
e93d440b | 489 | DRM_DEBUG_DRIVER("Pfit is not supported\n"); |
507c1a45 PZ |
490 | return ASLC_PFIT_FAILED; |
491 | } | |
492 | ||
6f9f4b7a | 493 | static u32 asle_set_supported_rotation_angles(struct drm_i915_private *dev_priv, u32 srot) |
507c1a45 PZ |
494 | { |
495 | DRM_DEBUG_DRIVER("SROT is not supported\n"); | |
496 | return ASLC_ROTATION_ANGLES_FAILED; | |
497 | } | |
498 | ||
6f9f4b7a | 499 | static u32 asle_set_button_array(struct drm_i915_private *dev_priv, u32 iuer) |
507c1a45 PZ |
500 | { |
501 | if (!iuer) | |
502 | DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n"); | |
503 | if (iuer & ASLE_IUER_ROTATION_LOCK_BTN) | |
504 | DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n"); | |
505 | if (iuer & ASLE_IUER_VOLUME_DOWN_BTN) | |
506 | DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n"); | |
507 | if (iuer & ASLE_IUER_VOLUME_UP_BTN) | |
508 | DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n"); | |
509 | if (iuer & ASLE_IUER_WINDOWS_BTN) | |
510 | DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n"); | |
511 | if (iuer & ASLE_IUER_POWER_BTN) | |
512 | DRM_DEBUG_DRIVER("Button array event is not supported (power)\n"); | |
513 | ||
514 | return ASLC_BUTTON_ARRAY_FAILED; | |
515 | } | |
516 | ||
6f9f4b7a | 517 | static u32 asle_set_convertible(struct drm_i915_private *dev_priv, u32 iuer) |
507c1a45 PZ |
518 | { |
519 | if (iuer & ASLE_IUER_CONVERTIBLE) | |
520 | DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n"); | |
521 | else | |
522 | DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n"); | |
523 | ||
524 | return ASLC_CONVERTIBLE_FAILED; | |
525 | } | |
526 | ||
6f9f4b7a | 527 | static u32 asle_set_docking(struct drm_i915_private *dev_priv, u32 iuer) |
507c1a45 PZ |
528 | { |
529 | if (iuer & ASLE_IUER_DOCKING) | |
530 | DRM_DEBUG_DRIVER("Docking is not supported (docked)\n"); | |
531 | else | |
532 | DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n"); | |
533 | ||
534 | return ASLC_DOCKING_FAILED; | |
535 | } | |
536 | ||
6f9f4b7a | 537 | static u32 asle_isct_state(struct drm_i915_private *dev_priv) |
507c1a45 PZ |
538 | { |
539 | DRM_DEBUG_DRIVER("ISCT is not supported\n"); | |
540 | return ASLC_ISCT_STATE_FAILED; | |
8ee1c3db MG |
541 | } |
542 | ||
91a60f20 | 543 | static void asle_work(struct work_struct *work) |
8ee1c3db | 544 | { |
91a60f20 JN |
545 | struct intel_opregion *opregion = |
546 | container_of(work, struct intel_opregion, asle_work); | |
547 | struct drm_i915_private *dev_priv = | |
548 | container_of(opregion, struct drm_i915_private, opregion); | |
115719fc | 549 | struct opregion_asle *asle = dev_priv->opregion.asle; |
507c1a45 PZ |
550 | u32 aslc_stat = 0; |
551 | u32 aslc_req; | |
8ee1c3db MG |
552 | |
553 | if (!asle) | |
554 | return; | |
555 | ||
115719fc | 556 | aslc_req = asle->aslc; |
8ee1c3db | 557 | |
507c1a45 PZ |
558 | if (!(aslc_req & ASLC_REQ_MSK)) { |
559 | DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n", | |
560 | aslc_req); | |
8ee1c3db MG |
561 | return; |
562 | } | |
563 | ||
507c1a45 | 564 | if (aslc_req & ASLC_SET_ALS_ILLUM) |
6f9f4b7a | 565 | aslc_stat |= asle_set_als_illum(dev_priv, asle->alsi); |
507c1a45 PZ |
566 | |
567 | if (aslc_req & ASLC_SET_BACKLIGHT) | |
6f9f4b7a | 568 | aslc_stat |= asle_set_backlight(dev_priv, asle->bclp); |
507c1a45 PZ |
569 | |
570 | if (aslc_req & ASLC_SET_PFIT) | |
6f9f4b7a | 571 | aslc_stat |= asle_set_pfit(dev_priv, asle->pfit); |
507c1a45 PZ |
572 | |
573 | if (aslc_req & ASLC_SET_PWM_FREQ) | |
6f9f4b7a | 574 | aslc_stat |= asle_set_pwm_freq(dev_priv, asle->pfmb); |
507c1a45 PZ |
575 | |
576 | if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES) | |
6f9f4b7a | 577 | aslc_stat |= asle_set_supported_rotation_angles(dev_priv, |
115719fc | 578 | asle->srot); |
507c1a45 PZ |
579 | |
580 | if (aslc_req & ASLC_BUTTON_ARRAY) | |
6f9f4b7a | 581 | aslc_stat |= asle_set_button_array(dev_priv, asle->iuer); |
8ee1c3db | 582 | |
507c1a45 | 583 | if (aslc_req & ASLC_CONVERTIBLE_INDICATOR) |
6f9f4b7a | 584 | aslc_stat |= asle_set_convertible(dev_priv, asle->iuer); |
8ee1c3db | 585 | |
507c1a45 | 586 | if (aslc_req & ASLC_DOCKING_INDICATOR) |
6f9f4b7a | 587 | aslc_stat |= asle_set_docking(dev_priv, asle->iuer); |
8ee1c3db | 588 | |
507c1a45 | 589 | if (aslc_req & ASLC_ISCT_STATE_CHANGE) |
6f9f4b7a | 590 | aslc_stat |= asle_isct_state(dev_priv); |
8ee1c3db | 591 | |
115719fc | 592 | asle->aslc = aslc_stat; |
8ee1c3db MG |
593 | } |
594 | ||
91d14251 | 595 | void intel_opregion_asle_intr(struct drm_i915_private *dev_priv) |
91a60f20 | 596 | { |
91a60f20 JN |
597 | if (dev_priv->opregion.asle) |
598 | schedule_work(&dev_priv->opregion.asle_work); | |
599 | } | |
600 | ||
8ee1c3db MG |
601 | #define ACPI_EV_DISPLAY_SWITCH (1<<0) |
602 | #define ACPI_EV_LID (1<<1) | |
603 | #define ACPI_EV_DOCK (1<<2) | |
604 | ||
605 | static struct intel_opregion *system_opregion; | |
606 | ||
b358d0a6 HE |
607 | static int intel_opregion_video_event(struct notifier_block *nb, |
608 | unsigned long val, void *data) | |
8ee1c3db MG |
609 | { |
610 | /* The only video events relevant to opregion are 0x80. These indicate | |
611 | either a docking event, lid switch or display switch request. In | |
612 | Linux, these are handled by the dock, button and video drivers. | |
f5a3d0c4 | 613 | */ |
8ee1c3db | 614 | |
f5a3d0c4 | 615 | struct acpi_bus_event *event = data; |
115719fc | 616 | struct opregion_acpi *acpi; |
f5a3d0c4 MG |
617 | int ret = NOTIFY_OK; |
618 | ||
619 | if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0) | |
620 | return NOTIFY_DONE; | |
8ee1c3db MG |
621 | |
622 | if (!system_opregion) | |
623 | return NOTIFY_DONE; | |
624 | ||
625 | acpi = system_opregion->acpi; | |
f5a3d0c4 | 626 | |
115719fc | 627 | if (event->type == 0x80 && ((acpi->cevt & 1) == 0)) |
f5a3d0c4 MG |
628 | ret = NOTIFY_BAD; |
629 | ||
115719fc | 630 | acpi->csts = 0; |
8ee1c3db | 631 | |
f5a3d0c4 | 632 | return ret; |
8ee1c3db MG |
633 | } |
634 | ||
635 | static struct notifier_block intel_opregion_notifier = { | |
636 | .notifier_call = intel_opregion_video_event, | |
637 | }; | |
638 | ||
74a365b3 MG |
639 | /* |
640 | * Initialise the DIDL field in opregion. This passes a list of devices to | |
641 | * the firmware. Values are defined by section B.4.2 of the ACPI specification | |
642 | * (version 3) | |
643 | */ | |
644 | ||
d5cbb22f JN |
645 | static u32 get_did(struct intel_opregion *opregion, int i) |
646 | { | |
647 | u32 did; | |
648 | ||
649 | if (i < ARRAY_SIZE(opregion->acpi->didl)) { | |
115719fc | 650 | did = opregion->acpi->didl[i]; |
d5cbb22f JN |
651 | } else { |
652 | i -= ARRAY_SIZE(opregion->acpi->didl); | |
653 | ||
654 | if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2))) | |
655 | return 0; | |
656 | ||
115719fc | 657 | did = opregion->acpi->did2[i]; |
d5cbb22f JN |
658 | } |
659 | ||
660 | return did; | |
661 | } | |
662 | ||
663 | static void set_did(struct intel_opregion *opregion, int i, u32 val) | |
664 | { | |
665 | if (i < ARRAY_SIZE(opregion->acpi->didl)) { | |
115719fc | 666 | opregion->acpi->didl[i] = val; |
d5cbb22f JN |
667 | } else { |
668 | i -= ARRAY_SIZE(opregion->acpi->didl); | |
669 | ||
670 | if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2))) | |
671 | return; | |
672 | ||
115719fc | 673 | opregion->acpi->did2[i] = val; |
d5cbb22f JN |
674 | } |
675 | } | |
676 | ||
c37f7f57 JN |
677 | static u32 acpi_display_type(struct drm_connector *connector) |
678 | { | |
bb9c1b97 | 679 | u32 display_type; |
c37f7f57 JN |
680 | |
681 | switch (connector->connector_type) { | |
682 | case DRM_MODE_CONNECTOR_VGA: | |
683 | case DRM_MODE_CONNECTOR_DVIA: | |
684 | display_type = ACPI_DISPLAY_TYPE_VGA; | |
685 | break; | |
686 | case DRM_MODE_CONNECTOR_Composite: | |
687 | case DRM_MODE_CONNECTOR_SVIDEO: | |
688 | case DRM_MODE_CONNECTOR_Component: | |
689 | case DRM_MODE_CONNECTOR_9PinDIN: | |
bb9c1b97 | 690 | case DRM_MODE_CONNECTOR_TV: |
c37f7f57 JN |
691 | display_type = ACPI_DISPLAY_TYPE_TV; |
692 | break; | |
693 | case DRM_MODE_CONNECTOR_DVII: | |
694 | case DRM_MODE_CONNECTOR_DVID: | |
695 | case DRM_MODE_CONNECTOR_DisplayPort: | |
696 | case DRM_MODE_CONNECTOR_HDMIA: | |
697 | case DRM_MODE_CONNECTOR_HDMIB: | |
698 | display_type = ACPI_DISPLAY_TYPE_EXTERNAL_DIGITAL; | |
699 | break; | |
700 | case DRM_MODE_CONNECTOR_LVDS: | |
bb9c1b97 JN |
701 | case DRM_MODE_CONNECTOR_eDP: |
702 | case DRM_MODE_CONNECTOR_DSI: | |
c37f7f57 JN |
703 | display_type = ACPI_DISPLAY_TYPE_INTERNAL_DIGITAL; |
704 | break; | |
bb9c1b97 JN |
705 | case DRM_MODE_CONNECTOR_Unknown: |
706 | case DRM_MODE_CONNECTOR_VIRTUAL: | |
707 | display_type = ACPI_DISPLAY_TYPE_OTHER; | |
708 | break; | |
709 | default: | |
710 | MISSING_CASE(connector->connector_type); | |
711 | display_type = ACPI_DISPLAY_TYPE_OTHER; | |
712 | break; | |
c37f7f57 JN |
713 | } |
714 | ||
715 | return display_type; | |
716 | } | |
717 | ||
6f9f4b7a | 718 | static void intel_didl_outputs(struct drm_i915_private *dev_priv) |
74a365b3 | 719 | { |
74a365b3 | 720 | struct intel_opregion *opregion = &dev_priv->opregion; |
91c8a326 | 721 | struct pci_dev *pdev = dev_priv->drm.pdev; |
74a365b3 | 722 | struct drm_connector *connector; |
3143751f ZR |
723 | acpi_handle handle; |
724 | struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL; | |
725 | unsigned long long device_id; | |
726 | acpi_status status; | |
dfc2066d | 727 | u32 temp, max_outputs; |
74a365b3 MG |
728 | int i = 0; |
729 | ||
6f9f4b7a | 730 | handle = ACPI_HANDLE(&pdev->dev); |
7d37beaa | 731 | if (!handle || acpi_bus_get_device(handle, &acpi_dev)) |
3143751f ZR |
732 | return; |
733 | ||
d4e1a692 | 734 | if (acpi_is_video_device(handle)) |
3143751f ZR |
735 | acpi_video_bus = acpi_dev; |
736 | else { | |
737 | list_for_each_entry(acpi_cdev, &acpi_dev->children, node) { | |
d4e1a692 | 738 | if (acpi_is_video_device(acpi_cdev->handle)) { |
3143751f ZR |
739 | acpi_video_bus = acpi_cdev; |
740 | break; | |
741 | } | |
742 | } | |
743 | } | |
744 | ||
745 | if (!acpi_video_bus) { | |
78c3d5fa | 746 | DRM_DEBUG_KMS("No ACPI video bus found\n"); |
3143751f ZR |
747 | return; |
748 | } | |
749 | ||
dfc2066d JN |
750 | /* |
751 | * In theory, did2, the extended didl, gets added at opregion version | |
752 | * 3.0. In practice, however, we're supposed to set it for earlier | |
753 | * versions as well, since a BIOS that doesn't understand did2 should | |
754 | * not look at it anyway. Use a variable so we can tweak this if a need | |
755 | * arises later. | |
756 | */ | |
757 | max_outputs = ARRAY_SIZE(opregion->acpi->didl) + | |
758 | ARRAY_SIZE(opregion->acpi->did2); | |
759 | ||
3143751f | 760 | list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) { |
dfc2066d JN |
761 | if (i >= max_outputs) { |
762 | DRM_DEBUG_KMS("More than %u outputs detected via ACPI\n", | |
763 | max_outputs); | |
3143751f ZR |
764 | return; |
765 | } | |
d5cbb22f JN |
766 | status = acpi_evaluate_integer(acpi_cdev->handle, "_ADR", |
767 | NULL, &device_id); | |
3143751f ZR |
768 | if (ACPI_SUCCESS(status)) { |
769 | if (!device_id) | |
770 | goto blind_set; | |
d5cbb22f | 771 | set_did(opregion, i++, (u32)(device_id & 0x0f0f)); |
3143751f ZR |
772 | } |
773 | } | |
774 | ||
775 | end: | |
dfc2066d JN |
776 | DRM_DEBUG_KMS("%d outputs detected\n", i); |
777 | ||
778 | /* If fewer than max outputs, the list must be null terminated */ | |
779 | if (i < max_outputs) | |
d5cbb22f | 780 | set_did(opregion, i, 0); |
3143751f ZR |
781 | return; |
782 | ||
783 | blind_set: | |
784 | i = 0; | |
91c8a326 CW |
785 | list_for_each_entry(connector, |
786 | &dev_priv->drm.mode_config.connector_list, head) { | |
c37f7f57 JN |
787 | int display_type = acpi_display_type(connector); |
788 | ||
dfc2066d JN |
789 | if (i >= max_outputs) { |
790 | DRM_DEBUG_KMS("More than %u outputs in connector list\n", | |
791 | max_outputs); | |
74a365b3 MG |
792 | return; |
793 | } | |
c37f7f57 | 794 | |
d5cbb22f | 795 | temp = get_did(opregion, i); |
c37f7f57 | 796 | set_did(opregion, i, temp | (1 << 31) | display_type | i); |
74a365b3 MG |
797 | i++; |
798 | } | |
3143751f | 799 | goto end; |
74a365b3 MG |
800 | } |
801 | ||
6f9f4b7a | 802 | static void intel_setup_cadls(struct drm_i915_private *dev_priv) |
d627b62f | 803 | { |
d627b62f L |
804 | struct intel_opregion *opregion = &dev_priv->opregion; |
805 | int i = 0; | |
806 | u32 disp_id; | |
807 | ||
808 | /* Initialize the CADL field by duplicating the DIDL values. | |
809 | * Technically, this is not always correct as display outputs may exist, | |
810 | * but not active. This initialization is necessary for some Clevo | |
811 | * laptops that check this field before processing the brightness and | |
812 | * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if | |
813 | * there are less than eight devices. */ | |
814 | do { | |
d5cbb22f | 815 | disp_id = get_did(opregion, i); |
115719fc | 816 | opregion->acpi->cadl[i] = disp_id; |
d627b62f L |
817 | } while (++i < 8 && disp_id != 0); |
818 | } | |
819 | ||
03d92e47 | 820 | void intel_opregion_register(struct drm_i915_private *dev_priv) |
44834a67 | 821 | { |
44834a67 CW |
822 | struct intel_opregion *opregion = &dev_priv->opregion; |
823 | ||
824 | if (!opregion->header) | |
825 | return; | |
826 | ||
827 | if (opregion->acpi) { | |
6f9f4b7a CW |
828 | intel_didl_outputs(dev_priv); |
829 | intel_setup_cadls(dev_priv); | |
44834a67 CW |
830 | |
831 | /* Notify BIOS we are ready to handle ACPI video ext notifs. | |
832 | * Right now, all the events are handled by the ACPI video module. | |
833 | * We don't actually need to do anything with them. */ | |
115719fc WD |
834 | opregion->acpi->csts = 0; |
835 | opregion->acpi->drdy = 1; | |
44834a67 CW |
836 | |
837 | system_opregion = opregion; | |
838 | register_acpi_notifier(&intel_opregion_notifier); | |
839 | } | |
840 | ||
68bca4b0 | 841 | if (opregion->asle) { |
115719fc WD |
842 | opregion->asle->tche = ASLE_TCHE_BLC_EN; |
843 | opregion->asle->ardy = ASLE_ARDY_READY; | |
68bca4b0 | 844 | } |
44834a67 CW |
845 | } |
846 | ||
03d92e47 | 847 | void intel_opregion_unregister(struct drm_i915_private *dev_priv) |
44834a67 | 848 | { |
44834a67 CW |
849 | struct intel_opregion *opregion = &dev_priv->opregion; |
850 | ||
851 | if (!opregion->header) | |
852 | return; | |
853 | ||
68bca4b0 | 854 | if (opregion->asle) |
115719fc | 855 | opregion->asle->ardy = ASLE_ARDY_NOT_READY; |
68bca4b0 | 856 | |
91a60f20 JN |
857 | cancel_work_sync(&dev_priv->opregion.asle_work); |
858 | ||
44834a67 | 859 | if (opregion->acpi) { |
115719fc | 860 | opregion->acpi->drdy = 0; |
44834a67 CW |
861 | |
862 | system_opregion = NULL; | |
863 | unregister_acpi_notifier(&intel_opregion_notifier); | |
864 | } | |
865 | ||
866 | /* just clear all opregion memory pointers now */ | |
115719fc | 867 | memunmap(opregion->header); |
04ebaadb JN |
868 | if (opregion->rvda) { |
869 | memunmap(opregion->rvda); | |
870 | opregion->rvda = NULL; | |
871 | } | |
44834a67 CW |
872 | opregion->header = NULL; |
873 | opregion->acpi = NULL; | |
874 | opregion->swsci = NULL; | |
875 | opregion->asle = NULL; | |
876 | opregion->vbt = NULL; | |
794a79a6 | 877 | opregion->lid_state = NULL; |
44834a67 | 878 | } |
ebde53c7 | 879 | |
6f9f4b7a | 880 | static void swsci_setup(struct drm_i915_private *dev_priv) |
ebde53c7 | 881 | { |
ebde53c7 JN |
882 | struct intel_opregion *opregion = &dev_priv->opregion; |
883 | bool requested_callbacks = false; | |
884 | u32 tmp; | |
885 | ||
886 | /* Sub-function code 0 is okay, let's allow them. */ | |
887 | opregion->swsci_gbda_sub_functions = 1; | |
888 | opregion->swsci_sbcb_sub_functions = 1; | |
889 | ||
890 | /* We use GBDA to ask for supported GBDA calls. */ | |
6f9f4b7a | 891 | if (swsci(dev_priv, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) { |
ebde53c7 JN |
892 | /* make the bits match the sub-function codes */ |
893 | tmp <<= 1; | |
894 | opregion->swsci_gbda_sub_functions |= tmp; | |
895 | } | |
896 | ||
897 | /* | |
898 | * We also use GBDA to ask for _requested_ SBCB callbacks. The driver | |
899 | * must not call interfaces that are not specifically requested by the | |
900 | * bios. | |
901 | */ | |
6f9f4b7a | 902 | if (swsci(dev_priv, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) { |
ebde53c7 JN |
903 | /* here, the bits already match sub-function codes */ |
904 | opregion->swsci_sbcb_sub_functions |= tmp; | |
905 | requested_callbacks = true; | |
906 | } | |
907 | ||
908 | /* | |
909 | * But we use SBCB to ask for _supported_ SBCB calls. This does not mean | |
910 | * the callback is _requested_. But we still can't call interfaces that | |
911 | * are not requested. | |
912 | */ | |
6f9f4b7a | 913 | if (swsci(dev_priv, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) { |
ebde53c7 JN |
914 | /* make the bits match the sub-function codes */ |
915 | u32 low = tmp & 0x7ff; | |
916 | u32 high = tmp & ~0xfff; /* bit 11 is reserved */ | |
917 | tmp = (high << 4) | (low << 1) | 1; | |
918 | ||
919 | /* best guess what to do with supported wrt requested */ | |
920 | if (requested_callbacks) { | |
921 | u32 req = opregion->swsci_sbcb_sub_functions; | |
922 | if ((req & tmp) != req) | |
923 | DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp); | |
924 | /* XXX: for now, trust the requested callbacks */ | |
925 | /* opregion->swsci_sbcb_sub_functions &= tmp; */ | |
926 | } else { | |
927 | opregion->swsci_sbcb_sub_functions |= tmp; | |
928 | } | |
929 | } | |
930 | ||
931 | DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n", | |
932 | opregion->swsci_gbda_sub_functions, | |
933 | opregion->swsci_sbcb_sub_functions); | |
934 | } | |
44834a67 | 935 | |
b30581a4 JN |
936 | static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id) |
937 | { | |
938 | DRM_DEBUG_KMS("Falling back to manually reading VBT from " | |
939 | "VBIOS ROM for %s\n", id->ident); | |
940 | return 1; | |
941 | } | |
942 | ||
943 | static const struct dmi_system_id intel_no_opregion_vbt[] = { | |
944 | { | |
945 | .callback = intel_no_opregion_vbt_callback, | |
946 | .ident = "ThinkCentre A57", | |
947 | .matches = { | |
948 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
949 | DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), | |
950 | }, | |
951 | }, | |
952 | { } | |
953 | }; | |
954 | ||
6f9f4b7a | 955 | int intel_opregion_setup(struct drm_i915_private *dev_priv) |
8ee1c3db | 956 | { |
8ee1c3db | 957 | struct intel_opregion *opregion = &dev_priv->opregion; |
91c8a326 | 958 | struct pci_dev *pdev = dev_priv->drm.pdev; |
8ee1c3db | 959 | u32 asls, mboxes; |
5bc4418b | 960 | char buf[sizeof(OPREGION_SIGNATURE)]; |
8ee1c3db | 961 | int err = 0; |
115719fc | 962 | void *base; |
8ee1c3db | 963 | |
2d80391d JN |
964 | BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100); |
965 | BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100); | |
966 | BUILD_BUG_ON(sizeof(struct opregion_swsci) != 0x100); | |
967 | BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100); | |
b3cbd98b | 968 | BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400); |
2d80391d | 969 | |
6f9f4b7a | 970 | pci_read_config_dword(pdev, ASLS, &asls); |
44d98a61 | 971 | DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls); |
8ee1c3db | 972 | if (asls == 0) { |
44d98a61 | 973 | DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n"); |
8ee1c3db MG |
974 | return -ENOTSUPP; |
975 | } | |
976 | ||
91a60f20 JN |
977 | INIT_WORK(&opregion->asle_work, asle_work); |
978 | ||
115719fc | 979 | base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB); |
8ee1c3db MG |
980 | if (!base) |
981 | return -ENOMEM; | |
982 | ||
115719fc | 983 | memcpy(buf, base, sizeof(buf)); |
5bc4418b BW |
984 | |
985 | if (memcmp(buf, OPREGION_SIGNATURE, 16)) { | |
44d98a61 | 986 | DRM_DEBUG_DRIVER("opregion signature mismatch\n"); |
8ee1c3db MG |
987 | err = -EINVAL; |
988 | goto err_out; | |
989 | } | |
44834a67 | 990 | opregion->header = base; |
82d3c90c | 991 | opregion->lid_state = base + ACPI_CLID; |
01fe9dbd | 992 | |
115719fc | 993 | mboxes = opregion->header->mboxes; |
8ee1c3db | 994 | if (mboxes & MBOX_ACPI) { |
44d98a61 | 995 | DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); |
8ee1c3db | 996 | opregion->acpi = base + OPREGION_ACPI_OFFSET; |
8ee1c3db | 997 | } |
8ee1c3db MG |
998 | |
999 | if (mboxes & MBOX_SWSCI) { | |
44d98a61 | 1000 | DRM_DEBUG_DRIVER("SWSCI supported\n"); |
8ee1c3db | 1001 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; |
6f9f4b7a | 1002 | swsci_setup(dev_priv); |
8ee1c3db | 1003 | } |
b3cbd98b | 1004 | |
8ee1c3db | 1005 | if (mboxes & MBOX_ASLE) { |
44d98a61 | 1006 | DRM_DEBUG_DRIVER("ASLE supported\n"); |
8ee1c3db | 1007 | opregion->asle = base + OPREGION_ASLE_OFFSET; |
68bca4b0 | 1008 | |
115719fc | 1009 | opregion->asle->ardy = ASLE_ARDY_NOT_READY; |
8ee1c3db MG |
1010 | } |
1011 | ||
b3cbd98b D |
1012 | if (mboxes & MBOX_ASLE_EXT) |
1013 | DRM_DEBUG_DRIVER("ASLE extension supported\n"); | |
1014 | ||
f0067a31 | 1015 | if (!dmi_check_system(intel_no_opregion_vbt)) { |
04ebaadb JN |
1016 | const void *vbt = NULL; |
1017 | u32 vbt_size = 0; | |
1018 | ||
1019 | if (opregion->header->opregion_ver >= 2 && opregion->asle && | |
1020 | opregion->asle->rvda && opregion->asle->rvds) { | |
1021 | opregion->rvda = memremap(opregion->asle->rvda, | |
1022 | opregion->asle->rvds, | |
1023 | MEMREMAP_WB); | |
1024 | vbt = opregion->rvda; | |
1025 | vbt_size = opregion->asle->rvds; | |
1026 | } | |
f0067a31 JN |
1027 | |
1028 | if (intel_bios_is_valid_vbt(vbt, vbt_size)) { | |
04ebaadb | 1029 | DRM_DEBUG_KMS("Found valid VBT in ACPI OpRegion (RVDA)\n"); |
f0067a31 | 1030 | opregion->vbt = vbt; |
ada8f955 | 1031 | opregion->vbt_size = vbt_size; |
04ebaadb JN |
1032 | } else { |
1033 | vbt = base + OPREGION_VBT_OFFSET; | |
1034 | vbt_size = OPREGION_ASLE_EXT_OFFSET - OPREGION_VBT_OFFSET; | |
1035 | if (intel_bios_is_valid_vbt(vbt, vbt_size)) { | |
1036 | DRM_DEBUG_KMS("Found valid VBT in ACPI OpRegion (Mailbox #4)\n"); | |
1037 | opregion->vbt = vbt; | |
1038 | opregion->vbt_size = vbt_size; | |
1039 | } | |
f0067a31 JN |
1040 | } |
1041 | } | |
b30581a4 | 1042 | |
8ee1c3db MG |
1043 | return 0; |
1044 | ||
1045 | err_out: | |
115719fc | 1046 | memunmap(base); |
8ee1c3db MG |
1047 | return err; |
1048 | } | |
a0562819 VS |
1049 | |
1050 | int | |
6f9f4b7a | 1051 | intel_opregion_get_panel_type(struct drm_i915_private *dev_priv) |
a0562819 VS |
1052 | { |
1053 | u32 panel_details; | |
1054 | int ret; | |
1055 | ||
6f9f4b7a | 1056 | ret = swsci(dev_priv, SWSCI_GBDA_PANEL_DETAILS, 0x0, &panel_details); |
a0562819 VS |
1057 | if (ret) { |
1058 | DRM_DEBUG_KMS("Failed to get panel details from OpRegion (%d)\n", | |
1059 | ret); | |
1060 | return ret; | |
1061 | } | |
1062 | ||
1063 | ret = (panel_details >> 8) & 0xff; | |
1064 | if (ret > 0x10) { | |
1065 | DRM_DEBUG_KMS("Invalid OpRegion panel type 0x%x\n", ret); | |
1066 | return -EINVAL; | |
1067 | } | |
1068 | ||
1069 | /* fall back to VBT panel type? */ | |
1070 | if (ret == 0x0) { | |
1071 | DRM_DEBUG_KMS("No panel type in OpRegion\n"); | |
1072 | return -ENODEV; | |
1073 | } | |
1074 | ||
bb10d4ec VS |
1075 | /* |
1076 | * FIXME On Dell XPS 13 9350 the OpRegion panel type (0) gives us | |
1077 | * low vswing for eDP, whereas the VBT panel type (2) gives us normal | |
1078 | * vswing instead. Low vswing results in some display flickers, so | |
1079 | * let's simply ignore the OpRegion panel type on SKL for now. | |
1080 | */ | |
1081 | if (IS_SKYLAKE(dev_priv)) { | |
1082 | DRM_DEBUG_KMS("Ignoring OpRegion panel type (%d)\n", ret - 1); | |
1083 | return -ENODEV; | |
1084 | } | |
1085 | ||
a0562819 VS |
1086 | return ret - 1; |
1087 | } |