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8ee1c3db MG |
1 | /* |
2 | * Copyright 2008 Intel Corporation <hong.liu@intel.com> | |
3 | * Copyright 2008 Red Hat <mjg@redhat.com> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
20 | * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
22 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
24 | * SOFTWARE. | |
25 | * | |
26 | */ | |
27 | ||
a70491cc JP |
28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
29 | ||
8ee1c3db | 30 | #include <linux/acpi.h> |
b705120e | 31 | #include <linux/acpi_io.h> |
74a365b3 | 32 | #include <acpi/video.h> |
8ee1c3db | 33 | |
760285e7 DH |
34 | #include <drm/drmP.h> |
35 | #include <drm/i915_drm.h> | |
8ee1c3db | 36 | #include "i915_drv.h" |
a9573556 | 37 | #include "intel_drv.h" |
8ee1c3db | 38 | |
ebde53c7 JN |
39 | #define PCI_ASLE 0xe4 |
40 | #define PCI_ASLS 0xfc | |
41 | #define PCI_SWSCI 0xe8 | |
42 | #define PCI_SWSCI_SCISEL (1 << 15) | |
43 | #define PCI_SWSCI_GSSCIE (1 << 0) | |
8ee1c3db | 44 | |
8ee1c3db MG |
45 | #define OPREGION_HEADER_OFFSET 0 |
46 | #define OPREGION_ACPI_OFFSET 0x100 | |
82d3c90c CW |
47 | #define ACPI_CLID 0x01ac /* current lid state indicator */ |
48 | #define ACPI_CDCK 0x01b0 /* current docking state indicator */ | |
8ee1c3db MG |
49 | #define OPREGION_SWSCI_OFFSET 0x200 |
50 | #define OPREGION_ASLE_OFFSET 0x300 | |
44834a67 | 51 | #define OPREGION_VBT_OFFSET 0x400 |
8ee1c3db MG |
52 | |
53 | #define OPREGION_SIGNATURE "IntelGraphicsMem" | |
54 | #define MBOX_ACPI (1<<0) | |
55 | #define MBOX_SWSCI (1<<1) | |
56 | #define MBOX_ASLE (1<<2) | |
57 | ||
58 | struct opregion_header { | |
0206e353 AJ |
59 | u8 signature[16]; |
60 | u32 size; | |
61 | u32 opregion_ver; | |
62 | u8 bios_ver[32]; | |
63 | u8 vbios_ver[16]; | |
64 | u8 driver_ver[16]; | |
65 | u32 mboxes; | |
66 | u8 reserved[164]; | |
8ee1c3db MG |
67 | } __attribute__((packed)); |
68 | ||
69 | /* OpRegion mailbox #1: public ACPI methods */ | |
70 | struct opregion_acpi { | |
0206e353 AJ |
71 | u32 drdy; /* driver readiness */ |
72 | u32 csts; /* notification status */ | |
73 | u32 cevt; /* current event */ | |
74 | u8 rsvd1[20]; | |
75 | u32 didl[8]; /* supported display devices ID list */ | |
76 | u32 cpdl[8]; /* currently presented display list */ | |
77 | u32 cadl[8]; /* currently active display list */ | |
78 | u32 nadl[8]; /* next active devices list */ | |
79 | u32 aslp; /* ASL sleep time-out */ | |
80 | u32 tidx; /* toggle table index */ | |
81 | u32 chpd; /* current hotplug enable indicator */ | |
82 | u32 clid; /* current lid state*/ | |
83 | u32 cdck; /* current docking state */ | |
84 | u32 sxsw; /* Sx state resume */ | |
85 | u32 evts; /* ASL supported events */ | |
86 | u32 cnot; /* current OS notification */ | |
87 | u32 nrdy; /* driver status */ | |
88 | u8 rsvd2[60]; | |
8ee1c3db MG |
89 | } __attribute__((packed)); |
90 | ||
91 | /* OpRegion mailbox #2: SWSCI */ | |
92 | struct opregion_swsci { | |
0206e353 AJ |
93 | u32 scic; /* SWSCI command|status|data */ |
94 | u32 parm; /* command parameters */ | |
95 | u32 dslp; /* driver sleep time-out */ | |
96 | u8 rsvd[244]; | |
8ee1c3db MG |
97 | } __attribute__((packed)); |
98 | ||
99 | /* OpRegion mailbox #3: ASLE */ | |
100 | struct opregion_asle { | |
0206e353 AJ |
101 | u32 ardy; /* driver readiness */ |
102 | u32 aslc; /* ASLE interrupt command */ | |
103 | u32 tche; /* technology enabled indicator */ | |
104 | u32 alsi; /* current ALS illuminance reading */ | |
105 | u32 bclp; /* backlight brightness to set */ | |
106 | u32 pfit; /* panel fitting state */ | |
107 | u32 cblv; /* current brightness level */ | |
108 | u16 bclm[20]; /* backlight level duty cycle mapping table */ | |
109 | u32 cpfm; /* current panel fitting mode */ | |
110 | u32 epfm; /* enabled panel fitting modes */ | |
111 | u8 plut[74]; /* panel LUT and identifier */ | |
112 | u32 pfmb; /* PWM freq and min brightness */ | |
113 | u8 rsvd[102]; | |
8ee1c3db MG |
114 | } __attribute__((packed)); |
115 | ||
68bca4b0 JN |
116 | /* Driver readiness indicator */ |
117 | #define ASLE_ARDY_READY (1 << 0) | |
118 | #define ASLE_ARDY_NOT_READY (0 << 0) | |
119 | ||
8ee1c3db MG |
120 | /* ASLE irq request bits */ |
121 | #define ASLE_SET_ALS_ILLUM (1 << 0) | |
122 | #define ASLE_SET_BACKLIGHT (1 << 1) | |
123 | #define ASLE_SET_PFIT (1 << 2) | |
124 | #define ASLE_SET_PWM_FREQ (1 << 3) | |
125 | #define ASLE_REQ_MSK 0xf | |
126 | ||
127 | /* response bits of ASLE irq request */ | |
01c66889 ZY |
128 | #define ASLE_ALS_ILLUM_FAILED (1<<10) |
129 | #define ASLE_BACKLIGHT_FAILED (1<<12) | |
130 | #define ASLE_PFIT_FAILED (1<<14) | |
131 | #define ASLE_PWM_FREQ_FAILED (1<<16) | |
8ee1c3db | 132 | |
f599cc29 JN |
133 | /* Technology enabled indicator */ |
134 | #define ASLE_TCHE_ALS_EN (1 << 0) | |
135 | #define ASLE_TCHE_BLC_EN (1 << 1) | |
136 | #define ASLE_TCHE_PFIT_EN (1 << 2) | |
137 | #define ASLE_TCHE_PFMB_EN (1 << 3) | |
138 | ||
8ee1c3db MG |
139 | /* ASLE backlight brightness to set */ |
140 | #define ASLE_BCLP_VALID (1<<31) | |
141 | #define ASLE_BCLP_MSK (~(1<<31)) | |
142 | ||
143 | /* ASLE panel fitting request */ | |
144 | #define ASLE_PFIT_VALID (1<<31) | |
145 | #define ASLE_PFIT_CENTER (1<<0) | |
146 | #define ASLE_PFIT_STRETCH_TEXT (1<<1) | |
147 | #define ASLE_PFIT_STRETCH_GFX (1<<2) | |
148 | ||
149 | /* PWM frequency and minimum brightness */ | |
150 | #define ASLE_PFMB_BRIGHTNESS_MASK (0xff) | |
151 | #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8) | |
152 | #define ASLE_PFMB_PWM_MASK (0x7ffffe00) | |
153 | #define ASLE_PFMB_PWM_VALID (1<<31) | |
154 | ||
155 | #define ASLE_CBLV_VALID (1<<31) | |
156 | ||
ebde53c7 JN |
157 | /* Software System Control Interrupt (SWSCI) */ |
158 | #define SWSCI_SCIC_INDICATOR (1 << 0) | |
159 | #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1 | |
160 | #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1) | |
161 | #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8 | |
162 | #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8) | |
163 | #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8 | |
164 | #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8) | |
165 | #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5 | |
166 | #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5) | |
167 | #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1 | |
168 | ||
169 | #define SWSCI_FUNCTION_CODE(main, sub) \ | |
170 | ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \ | |
171 | (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT) | |
172 | ||
173 | /* SWSCI: Get BIOS Data (GBDA) */ | |
174 | #define SWSCI_GBDA 4 | |
175 | #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0) | |
176 | #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1) | |
177 | #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4) | |
178 | #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5) | |
179 | #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6) | |
180 | #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7) | |
181 | #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10) | |
182 | ||
183 | /* SWSCI: System BIOS Callbacks (SBCB) */ | |
184 | #define SWSCI_SBCB 6 | |
185 | #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0) | |
186 | #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1) | |
187 | #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3) | |
188 | #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4) | |
189 | #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5) | |
190 | #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6) | |
191 | #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7) | |
192 | #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8) | |
193 | #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9) | |
194 | #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10) | |
195 | #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11) | |
196 | #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16) | |
197 | #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17) | |
198 | #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18) | |
199 | #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19) | |
200 | #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21) | |
201 | ||
74a365b3 MG |
202 | #define ACPI_OTHER_OUTPUT (0<<8) |
203 | #define ACPI_VGA_OUTPUT (1<<8) | |
204 | #define ACPI_TV_OUTPUT (2<<8) | |
205 | #define ACPI_DIGITAL_OUTPUT (3<<8) | |
206 | #define ACPI_LVDS_OUTPUT (4<<8) | |
207 | ||
44834a67 | 208 | #ifdef CONFIG_ACPI |
ebde53c7 JN |
209 | static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out) |
210 | { | |
211 | struct drm_i915_private *dev_priv = dev->dev_private; | |
212 | struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci; | |
213 | u32 main_function, sub_function, scic; | |
214 | u16 pci_swsci; | |
215 | u32 dslp; | |
216 | ||
217 | if (!swsci) | |
218 | return -ENODEV; | |
219 | ||
220 | main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >> | |
221 | SWSCI_SCIC_MAIN_FUNCTION_SHIFT; | |
222 | sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >> | |
223 | SWSCI_SCIC_SUB_FUNCTION_SHIFT; | |
224 | ||
225 | /* Check if we can call the function. See swsci_setup for details. */ | |
226 | if (main_function == SWSCI_SBCB) { | |
227 | if ((dev_priv->opregion.swsci_sbcb_sub_functions & | |
228 | (1 << sub_function)) == 0) | |
229 | return -EINVAL; | |
230 | } else if (main_function == SWSCI_GBDA) { | |
231 | if ((dev_priv->opregion.swsci_gbda_sub_functions & | |
232 | (1 << sub_function)) == 0) | |
233 | return -EINVAL; | |
234 | } | |
235 | ||
236 | /* Driver sleep timeout in ms. */ | |
237 | dslp = ioread32(&swsci->dslp); | |
238 | if (!dslp) { | |
239 | dslp = 2; | |
240 | } else if (dslp > 500) { | |
241 | /* Hey bios, trust must be earned. */ | |
242 | WARN_ONCE(1, "excessive driver sleep timeout (DSPL) %u\n", dslp); | |
243 | dslp = 500; | |
244 | } | |
245 | ||
246 | /* The spec tells us to do this, but we are the only user... */ | |
247 | scic = ioread32(&swsci->scic); | |
248 | if (scic & SWSCI_SCIC_INDICATOR) { | |
249 | DRM_DEBUG_DRIVER("SWSCI request already in progress\n"); | |
250 | return -EBUSY; | |
251 | } | |
252 | ||
253 | scic = function | SWSCI_SCIC_INDICATOR; | |
254 | ||
255 | iowrite32(parm, &swsci->parm); | |
256 | iowrite32(scic, &swsci->scic); | |
257 | ||
258 | /* Ensure SCI event is selected and event trigger is cleared. */ | |
259 | pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci); | |
260 | if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) { | |
261 | pci_swsci |= PCI_SWSCI_SCISEL; | |
262 | pci_swsci &= ~PCI_SWSCI_GSSCIE; | |
263 | pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci); | |
264 | } | |
265 | ||
266 | /* Use event trigger to tell bios to check the mail. */ | |
267 | pci_swsci |= PCI_SWSCI_GSSCIE; | |
268 | pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci); | |
269 | ||
270 | /* Poll for the result. */ | |
271 | #define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0) | |
272 | if (wait_for(C, dslp)) { | |
273 | DRM_DEBUG_DRIVER("SWSCI request timed out\n"); | |
274 | return -ETIMEDOUT; | |
275 | } | |
276 | ||
277 | scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >> | |
278 | SWSCI_SCIC_EXIT_STATUS_SHIFT; | |
279 | ||
280 | /* Note: scic == 0 is an error! */ | |
281 | if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) { | |
282 | DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic); | |
283 | return -EIO; | |
284 | } | |
285 | ||
286 | if (parm_out) | |
287 | *parm_out = ioread32(&swsci->parm); | |
288 | ||
289 | return 0; | |
290 | ||
291 | #undef C | |
292 | } | |
293 | ||
9c4b0a68 JN |
294 | #define DISPLAY_TYPE_CRT 0 |
295 | #define DISPLAY_TYPE_TV 1 | |
296 | #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2 | |
297 | #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3 | |
298 | ||
299 | int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, | |
300 | bool enable) | |
301 | { | |
302 | struct drm_device *dev = intel_encoder->base.dev; | |
303 | u32 parm = 0; | |
304 | u32 type = 0; | |
305 | u32 port; | |
306 | ||
307 | /* don't care about old stuff for now */ | |
308 | if (!HAS_DDI(dev)) | |
309 | return 0; | |
310 | ||
311 | port = intel_ddi_get_encoder_port(intel_encoder); | |
312 | if (port == PORT_E) { | |
313 | port = 0; | |
314 | } else { | |
315 | parm |= 1 << port; | |
316 | port++; | |
317 | } | |
318 | ||
319 | if (!enable) | |
320 | parm |= 4 << 8; | |
321 | ||
322 | switch (intel_encoder->type) { | |
323 | case INTEL_OUTPUT_ANALOG: | |
324 | type = DISPLAY_TYPE_CRT; | |
325 | break; | |
326 | case INTEL_OUTPUT_UNKNOWN: | |
327 | case INTEL_OUTPUT_DISPLAYPORT: | |
328 | case INTEL_OUTPUT_HDMI: | |
329 | type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL; | |
330 | break; | |
331 | case INTEL_OUTPUT_EDP: | |
332 | type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL; | |
333 | break; | |
334 | default: | |
335 | WARN_ONCE(1, "unsupported intel_encoder type %d\n", | |
336 | intel_encoder->type); | |
337 | return -EINVAL; | |
338 | } | |
339 | ||
340 | parm |= type << (16 + port * 3); | |
341 | ||
342 | return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL); | |
343 | } | |
344 | ||
ecbc5cf3 JN |
345 | static const struct { |
346 | pci_power_t pci_power_state; | |
347 | u32 parm; | |
348 | } power_state_map[] = { | |
349 | { PCI_D0, 0x00 }, | |
350 | { PCI_D1, 0x01 }, | |
351 | { PCI_D2, 0x02 }, | |
352 | { PCI_D3hot, 0x04 }, | |
353 | { PCI_D3cold, 0x04 }, | |
354 | }; | |
355 | ||
356 | int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state) | |
357 | { | |
358 | int i; | |
359 | ||
360 | if (!HAS_DDI(dev)) | |
361 | return 0; | |
362 | ||
363 | for (i = 0; i < ARRAY_SIZE(power_state_map); i++) { | |
364 | if (state == power_state_map[i].pci_power_state) | |
365 | return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE, | |
366 | power_state_map[i].parm, NULL); | |
367 | } | |
368 | ||
369 | return -EINVAL; | |
370 | } | |
371 | ||
8ee1c3db MG |
372 | static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) |
373 | { | |
374 | struct drm_i915_private *dev_priv = dev->dev_private; | |
5bc4418b | 375 | struct opregion_asle __iomem *asle = dev_priv->opregion.asle; |
8ee1c3db | 376 | |
749052fb JN |
377 | DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp); |
378 | ||
8ee1c3db | 379 | if (!(bclp & ASLE_BCLP_VALID)) |
862daefc | 380 | return ASLE_BACKLIGHT_FAILED; |
8ee1c3db MG |
381 | |
382 | bclp &= ASLE_BCLP_MSK; | |
a9573556 | 383 | if (bclp > 255) |
862daefc | 384 | return ASLE_BACKLIGHT_FAILED; |
8ee1c3db | 385 | |
d6540632 | 386 | intel_panel_set_backlight(dev, bclp, 255); |
5bc4418b | 387 | iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv); |
8ee1c3db MG |
388 | |
389 | return 0; | |
390 | } | |
391 | ||
392 | static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi) | |
393 | { | |
394 | /* alsi is the current ALS reading in lux. 0 indicates below sensor | |
395 | range, 0xffff indicates above sensor range. 1-0xfffe are valid */ | |
e93d440b JN |
396 | DRM_DEBUG_DRIVER("Illum is not supported\n"); |
397 | return ASLE_ALS_ILLUM_FAILED; | |
8ee1c3db MG |
398 | } |
399 | ||
400 | static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb) | |
401 | { | |
e93d440b JN |
402 | DRM_DEBUG_DRIVER("PWM freq is not supported\n"); |
403 | return ASLE_PWM_FREQ_FAILED; | |
8ee1c3db MG |
404 | } |
405 | ||
406 | static u32 asle_set_pfit(struct drm_device *dev, u32 pfit) | |
407 | { | |
408 | /* Panel fitting is currently controlled by the X code, so this is a | |
409 | noop until modesetting support works fully */ | |
e93d440b JN |
410 | DRM_DEBUG_DRIVER("Pfit is not supported\n"); |
411 | return ASLE_PFIT_FAILED; | |
8ee1c3db MG |
412 | } |
413 | ||
3b617967 | 414 | void intel_opregion_asle_intr(struct drm_device *dev) |
8ee1c3db MG |
415 | { |
416 | struct drm_i915_private *dev_priv = dev->dev_private; | |
5bc4418b | 417 | struct opregion_asle __iomem *asle = dev_priv->opregion.asle; |
8ee1c3db MG |
418 | u32 asle_stat = 0; |
419 | u32 asle_req; | |
420 | ||
421 | if (!asle) | |
422 | return; | |
423 | ||
5bc4418b | 424 | asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK; |
8ee1c3db MG |
425 | |
426 | if (!asle_req) { | |
44d98a61 | 427 | DRM_DEBUG_DRIVER("non asle set request??\n"); |
8ee1c3db MG |
428 | return; |
429 | } | |
430 | ||
431 | if (asle_req & ASLE_SET_ALS_ILLUM) | |
5bc4418b | 432 | asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi)); |
8ee1c3db MG |
433 | |
434 | if (asle_req & ASLE_SET_BACKLIGHT) | |
5bc4418b | 435 | asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp)); |
8ee1c3db MG |
436 | |
437 | if (asle_req & ASLE_SET_PFIT) | |
5bc4418b | 438 | asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit)); |
8ee1c3db MG |
439 | |
440 | if (asle_req & ASLE_SET_PWM_FREQ) | |
5bc4418b | 441 | asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb)); |
8ee1c3db | 442 | |
5bc4418b | 443 | iowrite32(asle_stat, &asle->aslc); |
8ee1c3db MG |
444 | } |
445 | ||
8ee1c3db MG |
446 | #define ACPI_EV_DISPLAY_SWITCH (1<<0) |
447 | #define ACPI_EV_LID (1<<1) | |
448 | #define ACPI_EV_DOCK (1<<2) | |
449 | ||
450 | static struct intel_opregion *system_opregion; | |
451 | ||
b358d0a6 HE |
452 | static int intel_opregion_video_event(struct notifier_block *nb, |
453 | unsigned long val, void *data) | |
8ee1c3db MG |
454 | { |
455 | /* The only video events relevant to opregion are 0x80. These indicate | |
456 | either a docking event, lid switch or display switch request. In | |
457 | Linux, these are handled by the dock, button and video drivers. | |
f5a3d0c4 | 458 | */ |
8ee1c3db | 459 | |
5bc4418b | 460 | struct opregion_acpi __iomem *acpi; |
f5a3d0c4 MG |
461 | struct acpi_bus_event *event = data; |
462 | int ret = NOTIFY_OK; | |
463 | ||
464 | if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0) | |
465 | return NOTIFY_DONE; | |
8ee1c3db MG |
466 | |
467 | if (!system_opregion) | |
468 | return NOTIFY_DONE; | |
469 | ||
470 | acpi = system_opregion->acpi; | |
f5a3d0c4 | 471 | |
5bc4418b BW |
472 | if (event->type == 0x80 && |
473 | (ioread32(&acpi->cevt) & 1) == 0) | |
f5a3d0c4 MG |
474 | ret = NOTIFY_BAD; |
475 | ||
5bc4418b | 476 | iowrite32(0, &acpi->csts); |
8ee1c3db | 477 | |
f5a3d0c4 | 478 | return ret; |
8ee1c3db MG |
479 | } |
480 | ||
481 | static struct notifier_block intel_opregion_notifier = { | |
482 | .notifier_call = intel_opregion_video_event, | |
483 | }; | |
484 | ||
74a365b3 MG |
485 | /* |
486 | * Initialise the DIDL field in opregion. This passes a list of devices to | |
487 | * the firmware. Values are defined by section B.4.2 of the ACPI specification | |
488 | * (version 3) | |
489 | */ | |
490 | ||
491 | static void intel_didl_outputs(struct drm_device *dev) | |
492 | { | |
493 | struct drm_i915_private *dev_priv = dev->dev_private; | |
494 | struct intel_opregion *opregion = &dev_priv->opregion; | |
495 | struct drm_connector *connector; | |
3143751f ZR |
496 | acpi_handle handle; |
497 | struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL; | |
498 | unsigned long long device_id; | |
499 | acpi_status status; | |
5bc4418b | 500 | u32 temp; |
74a365b3 MG |
501 | int i = 0; |
502 | ||
3143751f | 503 | handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev); |
7d37beaa | 504 | if (!handle || acpi_bus_get_device(handle, &acpi_dev)) |
3143751f ZR |
505 | return; |
506 | ||
d4e1a692 | 507 | if (acpi_is_video_device(handle)) |
3143751f ZR |
508 | acpi_video_bus = acpi_dev; |
509 | else { | |
510 | list_for_each_entry(acpi_cdev, &acpi_dev->children, node) { | |
d4e1a692 | 511 | if (acpi_is_video_device(acpi_cdev->handle)) { |
3143751f ZR |
512 | acpi_video_bus = acpi_cdev; |
513 | break; | |
514 | } | |
515 | } | |
516 | } | |
517 | ||
518 | if (!acpi_video_bus) { | |
a70491cc | 519 | pr_warn("No ACPI video bus found\n"); |
3143751f ZR |
520 | return; |
521 | } | |
522 | ||
523 | list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) { | |
524 | if (i >= 8) { | |
0f4f7b57 DV |
525 | dev_dbg(&dev->pdev->dev, |
526 | "More than 8 outputs detected via ACPI\n"); | |
3143751f ZR |
527 | return; |
528 | } | |
529 | status = | |
530 | acpi_evaluate_integer(acpi_cdev->handle, "_ADR", | |
531 | NULL, &device_id); | |
532 | if (ACPI_SUCCESS(status)) { | |
533 | if (!device_id) | |
534 | goto blind_set; | |
5bc4418b BW |
535 | iowrite32((u32)(device_id & 0x0f0f), |
536 | &opregion->acpi->didl[i]); | |
3143751f ZR |
537 | i++; |
538 | } | |
539 | } | |
540 | ||
541 | end: | |
542 | /* If fewer than 8 outputs, the list must be null terminated */ | |
543 | if (i < 8) | |
5bc4418b | 544 | iowrite32(0, &opregion->acpi->didl[i]); |
3143751f ZR |
545 | return; |
546 | ||
547 | blind_set: | |
548 | i = 0; | |
74a365b3 MG |
549 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
550 | int output_type = ACPI_OTHER_OUTPUT; | |
551 | if (i >= 8) { | |
0f4f7b57 DV |
552 | dev_dbg(&dev->pdev->dev, |
553 | "More than 8 outputs in connector list\n"); | |
74a365b3 MG |
554 | return; |
555 | } | |
556 | switch (connector->connector_type) { | |
557 | case DRM_MODE_CONNECTOR_VGA: | |
558 | case DRM_MODE_CONNECTOR_DVIA: | |
559 | output_type = ACPI_VGA_OUTPUT; | |
560 | break; | |
561 | case DRM_MODE_CONNECTOR_Composite: | |
562 | case DRM_MODE_CONNECTOR_SVIDEO: | |
563 | case DRM_MODE_CONNECTOR_Component: | |
564 | case DRM_MODE_CONNECTOR_9PinDIN: | |
565 | output_type = ACPI_TV_OUTPUT; | |
566 | break; | |
567 | case DRM_MODE_CONNECTOR_DVII: | |
568 | case DRM_MODE_CONNECTOR_DVID: | |
569 | case DRM_MODE_CONNECTOR_DisplayPort: | |
570 | case DRM_MODE_CONNECTOR_HDMIA: | |
571 | case DRM_MODE_CONNECTOR_HDMIB: | |
572 | output_type = ACPI_DIGITAL_OUTPUT; | |
573 | break; | |
574 | case DRM_MODE_CONNECTOR_LVDS: | |
575 | output_type = ACPI_LVDS_OUTPUT; | |
576 | break; | |
577 | } | |
5bc4418b BW |
578 | temp = ioread32(&opregion->acpi->didl[i]); |
579 | iowrite32(temp | (1<<31) | output_type | i, | |
580 | &opregion->acpi->didl[i]); | |
74a365b3 MG |
581 | i++; |
582 | } | |
3143751f | 583 | goto end; |
74a365b3 MG |
584 | } |
585 | ||
d627b62f L |
586 | static void intel_setup_cadls(struct drm_device *dev) |
587 | { | |
588 | struct drm_i915_private *dev_priv = dev->dev_private; | |
589 | struct intel_opregion *opregion = &dev_priv->opregion; | |
590 | int i = 0; | |
591 | u32 disp_id; | |
592 | ||
593 | /* Initialize the CADL field by duplicating the DIDL values. | |
594 | * Technically, this is not always correct as display outputs may exist, | |
595 | * but not active. This initialization is necessary for some Clevo | |
596 | * laptops that check this field before processing the brightness and | |
597 | * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if | |
598 | * there are less than eight devices. */ | |
599 | do { | |
600 | disp_id = ioread32(&opregion->acpi->didl[i]); | |
601 | iowrite32(disp_id, &opregion->acpi->cadl[i]); | |
602 | } while (++i < 8 && disp_id != 0); | |
603 | } | |
604 | ||
44834a67 CW |
605 | void intel_opregion_init(struct drm_device *dev) |
606 | { | |
607 | struct drm_i915_private *dev_priv = dev->dev_private; | |
608 | struct intel_opregion *opregion = &dev_priv->opregion; | |
609 | ||
610 | if (!opregion->header) | |
611 | return; | |
612 | ||
613 | if (opregion->acpi) { | |
d627b62f | 614 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
44834a67 | 615 | intel_didl_outputs(dev); |
d627b62f L |
616 | intel_setup_cadls(dev); |
617 | } | |
44834a67 CW |
618 | |
619 | /* Notify BIOS we are ready to handle ACPI video ext notifs. | |
620 | * Right now, all the events are handled by the ACPI video module. | |
621 | * We don't actually need to do anything with them. */ | |
5bc4418b BW |
622 | iowrite32(0, &opregion->acpi->csts); |
623 | iowrite32(1, &opregion->acpi->drdy); | |
44834a67 CW |
624 | |
625 | system_opregion = opregion; | |
626 | register_acpi_notifier(&intel_opregion_notifier); | |
627 | } | |
628 | ||
68bca4b0 | 629 | if (opregion->asle) { |
68bca4b0 JN |
630 | iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche); |
631 | iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy); | |
632 | } | |
44834a67 CW |
633 | } |
634 | ||
635 | void intel_opregion_fini(struct drm_device *dev) | |
636 | { | |
637 | struct drm_i915_private *dev_priv = dev->dev_private; | |
638 | struct intel_opregion *opregion = &dev_priv->opregion; | |
639 | ||
640 | if (!opregion->header) | |
641 | return; | |
642 | ||
68bca4b0 JN |
643 | if (opregion->asle) |
644 | iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy); | |
645 | ||
44834a67 | 646 | if (opregion->acpi) { |
5bc4418b | 647 | iowrite32(0, &opregion->acpi->drdy); |
44834a67 CW |
648 | |
649 | system_opregion = NULL; | |
650 | unregister_acpi_notifier(&intel_opregion_notifier); | |
651 | } | |
652 | ||
653 | /* just clear all opregion memory pointers now */ | |
654 | iounmap(opregion->header); | |
655 | opregion->header = NULL; | |
656 | opregion->acpi = NULL; | |
657 | opregion->swsci = NULL; | |
658 | opregion->asle = NULL; | |
659 | opregion->vbt = NULL; | |
794a79a6 | 660 | opregion->lid_state = NULL; |
44834a67 | 661 | } |
ebde53c7 JN |
662 | |
663 | static void swsci_setup(struct drm_device *dev) | |
664 | { | |
665 | struct drm_i915_private *dev_priv = dev->dev_private; | |
666 | struct intel_opregion *opregion = &dev_priv->opregion; | |
667 | bool requested_callbacks = false; | |
668 | u32 tmp; | |
669 | ||
670 | /* Sub-function code 0 is okay, let's allow them. */ | |
671 | opregion->swsci_gbda_sub_functions = 1; | |
672 | opregion->swsci_sbcb_sub_functions = 1; | |
673 | ||
674 | /* We use GBDA to ask for supported GBDA calls. */ | |
675 | if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) { | |
676 | /* make the bits match the sub-function codes */ | |
677 | tmp <<= 1; | |
678 | opregion->swsci_gbda_sub_functions |= tmp; | |
679 | } | |
680 | ||
681 | /* | |
682 | * We also use GBDA to ask for _requested_ SBCB callbacks. The driver | |
683 | * must not call interfaces that are not specifically requested by the | |
684 | * bios. | |
685 | */ | |
686 | if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) { | |
687 | /* here, the bits already match sub-function codes */ | |
688 | opregion->swsci_sbcb_sub_functions |= tmp; | |
689 | requested_callbacks = true; | |
690 | } | |
691 | ||
692 | /* | |
693 | * But we use SBCB to ask for _supported_ SBCB calls. This does not mean | |
694 | * the callback is _requested_. But we still can't call interfaces that | |
695 | * are not requested. | |
696 | */ | |
697 | if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) { | |
698 | /* make the bits match the sub-function codes */ | |
699 | u32 low = tmp & 0x7ff; | |
700 | u32 high = tmp & ~0xfff; /* bit 11 is reserved */ | |
701 | tmp = (high << 4) | (low << 1) | 1; | |
702 | ||
703 | /* best guess what to do with supported wrt requested */ | |
704 | if (requested_callbacks) { | |
705 | u32 req = opregion->swsci_sbcb_sub_functions; | |
706 | if ((req & tmp) != req) | |
707 | DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp); | |
708 | /* XXX: for now, trust the requested callbacks */ | |
709 | /* opregion->swsci_sbcb_sub_functions &= tmp; */ | |
710 | } else { | |
711 | opregion->swsci_sbcb_sub_functions |= tmp; | |
712 | } | |
713 | } | |
714 | ||
715 | DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n", | |
716 | opregion->swsci_gbda_sub_functions, | |
717 | opregion->swsci_sbcb_sub_functions); | |
718 | } | |
719 | #else /* CONFIG_ACPI */ | |
720 | static inline void swsci_setup(struct drm_device *dev) {} | |
721 | #endif /* CONFIG_ACPI */ | |
44834a67 CW |
722 | |
723 | int intel_opregion_setup(struct drm_device *dev) | |
8ee1c3db MG |
724 | { |
725 | struct drm_i915_private *dev_priv = dev->dev_private; | |
726 | struct intel_opregion *opregion = &dev_priv->opregion; | |
5bc4418b | 727 | void __iomem *base; |
8ee1c3db | 728 | u32 asls, mboxes; |
5bc4418b | 729 | char buf[sizeof(OPREGION_SIGNATURE)]; |
8ee1c3db MG |
730 | int err = 0; |
731 | ||
732 | pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); | |
44d98a61 | 733 | DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls); |
8ee1c3db | 734 | if (asls == 0) { |
44d98a61 | 735 | DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n"); |
8ee1c3db MG |
736 | return -ENOTSUPP; |
737 | } | |
738 | ||
b705120e | 739 | base = acpi_os_ioremap(asls, OPREGION_SIZE); |
8ee1c3db MG |
740 | if (!base) |
741 | return -ENOMEM; | |
742 | ||
5bc4418b BW |
743 | memcpy_fromio(buf, base, sizeof(buf)); |
744 | ||
745 | if (memcmp(buf, OPREGION_SIGNATURE, 16)) { | |
44d98a61 | 746 | DRM_DEBUG_DRIVER("opregion signature mismatch\n"); |
8ee1c3db MG |
747 | err = -EINVAL; |
748 | goto err_out; | |
749 | } | |
44834a67 CW |
750 | opregion->header = base; |
751 | opregion->vbt = base + OPREGION_VBT_OFFSET; | |
8ee1c3db | 752 | |
82d3c90c | 753 | opregion->lid_state = base + ACPI_CLID; |
01fe9dbd | 754 | |
5bc4418b | 755 | mboxes = ioread32(&opregion->header->mboxes); |
8ee1c3db | 756 | if (mboxes & MBOX_ACPI) { |
44d98a61 | 757 | DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); |
8ee1c3db | 758 | opregion->acpi = base + OPREGION_ACPI_OFFSET; |
8ee1c3db | 759 | } |
8ee1c3db MG |
760 | |
761 | if (mboxes & MBOX_SWSCI) { | |
44d98a61 | 762 | DRM_DEBUG_DRIVER("SWSCI supported\n"); |
8ee1c3db | 763 | opregion->swsci = base + OPREGION_SWSCI_OFFSET; |
ebde53c7 | 764 | swsci_setup(dev); |
8ee1c3db MG |
765 | } |
766 | if (mboxes & MBOX_ASLE) { | |
44d98a61 | 767 | DRM_DEBUG_DRIVER("ASLE supported\n"); |
8ee1c3db | 768 | opregion->asle = base + OPREGION_ASLE_OFFSET; |
68bca4b0 JN |
769 | |
770 | iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy); | |
8ee1c3db MG |
771 | } |
772 | ||
8ee1c3db MG |
773 | return 0; |
774 | ||
775 | err_out: | |
30c56660 | 776 | iounmap(base); |
8ee1c3db MG |
777 | return err; |
778 | } |