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drm/i915: Add functions to emit register offsets to the ring
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW		 1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP		 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
f766093e 33#include <linux/kernel.h>
7bd90909 34#include <linux/moduleparam.h>
b029e66f 35#include <linux/pwm.h>
1d8e1c75
CW		 36#include "intel_drv.h"
37
b029e66f
SK		 38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
1d8e1c75 40void
4c6df4b4 41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW		 42 struct drm_display_mode *adjusted_mode)
43{
4c6df4b4 44 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID		 45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW		 47}
48
525997e0
JN		 49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev: drm device
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
59intel_find_panel_downclock(struct drm_device *dev,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(dev, tmp_mode);
98 else
99 return NULL;
100}
101
1d8e1c75
CW		 102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
b074cec8 104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 105 struct intel_crtc_state *pipe_config,
b074cec8 106 int fitting_mode)
1d8e1c75 107{
7c5f93b0
VS		 108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
1d8e1c75
CW		 110
111 /* Native modes don't need fitting */
aad941d5
VS		 112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW		 114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS		 118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
aad941d5
VS		 120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
1d8e1c75
CW		 122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
aad941d5 127 u32 scaled_width = adjusted_mode->crtc_hdisplay
9084e7d2
DV		 128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
aad941d5 130 * adjusted_mode->crtc_vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
aad941d5 135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
1d8e1c75 136 y = 0;
aad941d5 137 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ		 140 if (height & 1)
141 height++;
aad941d5 142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
1d8e1c75 143 x = 0;
aad941d5 144 width = adjusted_mode->crtc_hdisplay;
1d8e1c75
CW		 145 } else {
146 x = y = 0;
aad941d5
VS		 147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
1d8e1c75
CW		 149 }
150 }
151 break;
152
1d8e1c75
CW		 153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
aad941d5
VS		 155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 157 break;
ab3e67f4
JB		 158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW		 162 }
163
164done:
b074cec8
JB		 165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552 170static void
5e7234c9 171centre_horizontally(struct drm_display_mode *adjusted_mode,
2dd24552
JB		 172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
5e7234c9
VS		 177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
2dd24552
JB		 179 sync_pos = (blank_width - sync_width + 1) / 2;
180
aad941d5 181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
2dd24552
JB		 182 border += border & 1; /* make the border even */
183
5e7234c9
VS		 184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
2dd24552 187
5e7234c9
VS		 188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
2dd24552
JB		 190}
191
192static void
5e7234c9 193centre_vertically(struct drm_display_mode *adjusted_mode,
2dd24552
JB		 194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
5e7234c9
VS		 199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
2dd24552
JB		 201 sync_pos = (blank_width - sync_width + 1) / 2;
202
aad941d5 203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
2dd24552 204
5e7234c9
VS		 205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
2dd24552 208
5e7234c9
VS		 209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
2dd24552
JB		 211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
5cec258b 226static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 227 u32 *pfit_control)
228{
7c5f93b0 229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV		 231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 233 adjusted_mode->crtc_vdisplay;
9084e7d2
DV		 234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
aad941d5 242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
9084e7d2
DV		 243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
5cec258b 246static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
2d112de7 250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV		 252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 254 adjusted_mode->crtc_vdisplay;
9084e7d2
DV		 255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
aad941d5 268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
9084e7d2 269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
aad941d5 270 adjusted_mode->crtc_vdisplay);
9084e7d2
DV		 271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
aad941d5 284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
9084e7d2 285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
aad941d5 286 adjusted_mode->crtc_hdisplay);
9084e7d2
DV		 287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552 303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 304 struct intel_crtc_state *pipe_config,
2dd24552
JB		 305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
7c5f93b0 309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
2dd24552
JB		 310
311 /* Native modes don't need fitting */
aad941d5
VS		 312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
2dd24552
JB		 314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
37327abd
VS		 322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB		 324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
9084e7d2
DV		 328 if (INTEL_INFO(dev)->gen >= 4)
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
2dd24552 333 break;
2dd24552
JB		 334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
aad941d5
VS		 339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
2dd24552
JB		 341 pfit_control |= PFIT_ENABLE;
342 if (INTEL_INFO(dev)->gen >= 4)
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
ab3e67f4
JB		 351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
2dd24552
JB		 354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
358 if (INTEL_INFO(dev)->gen >= 4)
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
6b89cdde
DV		 368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
369 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
2deefda5
DV		 372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 374 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB		 375}
376
525997e0
JN		 377enum drm_connector_status
378intel_panel_detect(struct drm_device *dev)
379{
380 struct drm_i915_private *dev_priv = dev->dev_private;
381
382 /* Assume that the BIOS does not lie through the OpRegion... */
383 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
115719fc 384 return *dev_priv->opregion.lid_state & 0x1 ?
525997e0
JN		 385 connector_status_connected :
386 connector_status_disconnected;
387 }
388
389 switch (i915.panel_ignore_lid) {
390 case -2:
391 return connector_status_connected;
392 case -1:
393 return connector_status_disconnected;
394 default:
395 return connector_status_unknown;
396 }
397}
398
6dda730e
JN		 399/**
400 * scale - scale values from one range to another
401 *
402 * @source_val: value in range [@source_min..@source_max]
403 *
404 * Return @source_val in range [@source_min..@source_max] scaled to range
405 * [@target_min..@target_max].
406 */
407static uint32_t scale(uint32_t source_val,
408 uint32_t source_min, uint32_t source_max,
409 uint32_t target_min, uint32_t target_max)
410{
411 uint64_t target_val;
412
413 WARN_ON(source_min > source_max);
414 WARN_ON(target_min > target_max);
415
416 /* defensive */
417 source_val = clamp(source_val, source_min, source_max);
418
419 /* avoid overflows */
673e7bbd
AE		 420 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
421 (target_max - target_min), source_max - source_min);
6dda730e
JN		 422 target_val += target_min;
423
424 return target_val;
425}
426
427/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
428static inline u32 scale_user_to_hw(struct intel_connector *connector,
429 u32 user_level, u32 user_max)
430{
431 struct intel_panel *panel = &connector->panel;
432
433 return scale(user_level, 0, user_max,
434 panel->backlight.min, panel->backlight.max);
435}
436
437/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
438 * to [hw_min..hw_max]. */
439static inline u32 clamp_user_to_hw(struct intel_connector *connector,
440 u32 user_level, u32 user_max)
441{
442 struct intel_panel *panel = &connector->panel;
443 u32 hw_level;
444
445 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
446 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
447
448 return hw_level;
449}
450
451/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
452static inline u32 scale_hw_to_user(struct intel_connector *connector,
453 u32 hw_level, u32 user_max)
454{
455 struct intel_panel *panel = &connector->panel;
456
457 return scale(hw_level, panel->backlight.min, panel->backlight.max,
458 0, user_max);
459}
460
7bd688cd
JN		 461static u32 intel_panel_compute_brightness(struct intel_connector *connector,
462 u32 val)
7bd90909 463{
7bd688cd 464 struct drm_device *dev = connector->base.dev;
4dca20ef 465 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN		 466 struct intel_panel *panel = &connector->panel;
467
468 WARN_ON(panel->backlight.max == 0);
4dca20ef 469
d330a953 470 if (i915.invert_brightness < 0)
4dca20ef
CE		 471 return val;
472
d330a953 473 if (i915.invert_brightness > 0 ||
d6540632 474 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 475 return panel->backlight.max - val;
d6540632 476 }
7bd90909
CE		 477
478 return val;
479}
480
437b15b8 481static u32 lpt_get_backlight(struct intel_connector *connector)
0b0b053a 482{
96ab4c70 483 struct drm_device *dev = connector->base.dev;
bfd7590d 484 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 485
96ab4c70
DV		 486 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
487}
07bf139b 488
7bd688cd 489static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 490{
7bd688cd 491 struct drm_device *dev = connector->base.dev;
a9573556 492 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 493
7bd688cd
JN		 494 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
495}
a9573556 496
7bd688cd
JN		 497static u32 i9xx_get_backlight(struct intel_connector *connector)
498{
499 struct drm_device *dev = connector->base.dev;
500 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 501 struct intel_panel *panel = &connector->panel;
7bd688cd 502 u32 val;
07bf139b 503
7bd688cd
JN		 504 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
505 if (INTEL_INFO(dev)->gen < 4)
506 val >>= 1;
ba3820ad 507
636baebf 508 if (panel->backlight.combination_mode) {
7bd688cd 509 u8 lbpc;
ba3820ad 510
7bd688cd
JN		 511 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
512 val *= lbpc;
a9573556
CW		 513 }
514
7bd688cd
JN		 515 return val;
516}
517
518static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
519{
520 struct drm_i915_private *dev_priv = dev->dev_private;
521
23ec0a88
VS		 522 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
523 return 0;
524
7bd688cd
JN		 525 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
526}
527
528static u32 vlv_get_backlight(struct intel_connector *connector)
529{
530 struct drm_device *dev = connector->base.dev;
531 enum pipe pipe = intel_get_pipe_from_connector(connector);
532
533 return _vlv_get_backlight(dev, pipe);
534}
535
0fb890c0
VK		 536static u32 bxt_get_backlight(struct intel_connector *connector)
537{
538 struct drm_device *dev = connector->base.dev;
022e4e52 539 struct intel_panel *panel = &connector->panel;
0fb890c0
VK		 540 struct drm_i915_private *dev_priv = dev->dev_private;
541
022e4e52 542 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
0fb890c0
VK		 543}
544
b029e66f
SK		 545static u32 pwm_get_backlight(struct intel_connector *connector)
546{
547 struct intel_panel *panel = &connector->panel;
548 int duty_ns;
549
550 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
551 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
552}
553
7bd688cd
JN		 554static u32 intel_panel_get_backlight(struct intel_connector *connector)
555{
556 struct drm_device *dev = connector->base.dev;
557 struct drm_i915_private *dev_priv = dev->dev_private;
2d72f6c7
VS		 558 struct intel_panel *panel = &connector->panel;
559 u32 val = 0;
7bd688cd 560
07f11d49 561 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 562
2d72f6c7 563 if (panel->backlight.enabled) {
5507faeb 564 val = panel->backlight.get(connector);
2d72f6c7
VS		 565 val = intel_panel_compute_brightness(connector, val);
566 }
8ba2d185 567
07f11d49 568 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 569
a9573556
CW		 570 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
571 return val;
572}
573
437b15b8 574static void lpt_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 575{
96ab4c70 576 struct drm_device *dev = connector->base.dev;
f8e10062
BW		 577 struct drm_i915_private *dev_priv = dev->dev_private;
578 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
579 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
580}
581
7bd688cd 582static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 583{
7bd688cd 584 struct drm_device *dev = connector->base.dev;
a9573556 585 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN		 586 u32 tmp;
587
588 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
589 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW		 590}
591
7bd688cd 592static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 593{
7bd688cd 594 struct drm_device *dev = connector->base.dev;
a9573556 595 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 596 struct intel_panel *panel = &connector->panel;
b329b328 597 u32 tmp, mask;
ba3820ad 598
f91c15e0
JN		 599 WARN_ON(panel->backlight.max == 0);
600
636baebf 601 if (panel->backlight.combination_mode) {
ba3820ad
TI		 602 u8 lbpc;
603
f91c15e0 604 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI		 605 level /= lbpc;
606 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
607 }
608
b329b328
JN		 609 if (IS_GEN4(dev)) {
610 mask = BACKLIGHT_DUTY_CYCLE_MASK;
611 } else {
a9573556 612 level <<= 1;
b329b328
JN		 613 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
614 }
7bd688cd 615
b329b328 616 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN		 617 I915_WRITE(BLC_PWM_CTL, tmp | level);
618}
619
620static void vlv_set_backlight(struct intel_connector *connector, u32 level)
621{
622 struct drm_device *dev = connector->base.dev;
623 struct drm_i915_private *dev_priv = dev->dev_private;
624 enum pipe pipe = intel_get_pipe_from_connector(connector);
625 u32 tmp;
626
23ec0a88
VS		 627 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
628 return;
629
7bd688cd
JN		 630 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
631 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
632}
633
0fb890c0
VK		 634static void bxt_set_backlight(struct intel_connector *connector, u32 level)
635{
636 struct drm_device *dev = connector->base.dev;
637 struct drm_i915_private *dev_priv = dev->dev_private;
022e4e52 638 struct intel_panel *panel = &connector->panel;
0fb890c0 639
022e4e52 640 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
0fb890c0
VK		 641}
642
b029e66f
SK		 643static void pwm_set_backlight(struct intel_connector *connector, u32 level)
644{
645 struct intel_panel *panel = &connector->panel;
646 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
647
648 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
649}
650
7bd688cd
JN		 651static void
652intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
653{
5507faeb 654 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 655
656 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
657
658 level = intel_panel_compute_brightness(connector, level);
5507faeb 659 panel->backlight.set(connector, level);
a9573556 660}
47356eb6 661
6dda730e
JN		 662/* set backlight brightness to level in range [0..max], scaling wrt hw min */
663static void intel_panel_set_backlight(struct intel_connector *connector,
664 u32 user_level, u32 user_max)
47356eb6 665{
752aa88a 666 struct drm_device *dev = connector->base.dev;
47356eb6 667 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 668 struct intel_panel *panel = &connector->panel;
6dda730e 669 u32 hw_level;
8ba2d185 670
260d8f98 671 if (!panel->backlight.present)
752aa88a
JB		 672 return;
673
07f11d49 674 mutex_lock(&dev_priv->backlight_lock);
d6540632 675
f91c15e0 676 WARN_ON(panel->backlight.max == 0);
d6540632 677
6dda730e
JN		 678 hw_level = scale_user_to_hw(connector, user_level, user_max);
679 panel->backlight.level = hw_level;
680
681 if (panel->backlight.enabled)
682 intel_panel_actually_set_backlight(connector, hw_level);
683
07f11d49 684 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN		 685}
686
687/* set backlight brightness to level in range [0..max], assuming hw min is
688 * respected.
689 */
690void intel_panel_set_backlight_acpi(struct intel_connector *connector,
691 u32 user_level, u32 user_max)
692{
693 struct drm_device *dev = connector->base.dev;
694 struct drm_i915_private *dev_priv = dev->dev_private;
695 struct intel_panel *panel = &connector->panel;
696 enum pipe pipe = intel_get_pipe_from_connector(connector);
697 u32 hw_level;
6dda730e 698
260d8f98
VS		 699 /*
700 * INVALID_PIPE may occur during driver init because
701 * connection_mutex isn't held across the entire backlight
702 * setup + modeset readout, and the BIOS can issue the
703 * requests at any time.
704 */
6dda730e
JN		 705 if (!panel->backlight.present || pipe == INVALID_PIPE)
706 return;
707
07f11d49 708 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN		 709
710 WARN_ON(panel->backlight.max == 0);
711
712 hw_level = clamp_user_to_hw(connector, user_level, user_max);
713 panel->backlight.level = hw_level;
47356eb6 714
58c68779 715 if (panel->backlight.device)
6dda730e
JN		 716 panel->backlight.device->props.brightness =
717 scale_hw_to_user(connector,
718 panel->backlight.level,
719 panel->backlight.device->props.max_brightness);
b6b3ba5b 720
58c68779 721 if (panel->backlight.enabled)
6dda730e 722 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 723
07f11d49 724 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI		 725}
726
437b15b8
JN		 727static void lpt_disable_backlight(struct intel_connector *connector)
728{
729 struct drm_device *dev = connector->base.dev;
730 struct drm_i915_private *dev_priv = dev->dev_private;
731 u32 tmp;
732
733 intel_panel_actually_set_backlight(connector, 0);
734
735 tmp = I915_READ(BLC_PWM_PCH_CTL1);
736 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
737}
738
7bd688cd
JN		 739static void pch_disable_backlight(struct intel_connector *connector)
740{
741 struct drm_device *dev = connector->base.dev;
742 struct drm_i915_private *dev_priv = dev->dev_private;
743 u32 tmp;
744
3bd712e5
JN		 745 intel_panel_actually_set_backlight(connector, 0);
746
7bd688cd
JN		 747 tmp = I915_READ(BLC_PWM_CPU_CTL2);
748 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
749
750 tmp = I915_READ(BLC_PWM_PCH_CTL1);
751 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
752}
753
3bd712e5
JN		 754static void i9xx_disable_backlight(struct intel_connector *connector)
755{
756 intel_panel_actually_set_backlight(connector, 0);
757}
758
7bd688cd
JN		 759static void i965_disable_backlight(struct intel_connector *connector)
760{
761 struct drm_device *dev = connector->base.dev;
762 struct drm_i915_private *dev_priv = dev->dev_private;
763 u32 tmp;
764
3bd712e5
JN		 765 intel_panel_actually_set_backlight(connector, 0);
766
7bd688cd
JN		 767 tmp = I915_READ(BLC_PWM_CTL2);
768 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
769}
770
771static void vlv_disable_backlight(struct intel_connector *connector)
772{
773 struct drm_device *dev = connector->base.dev;
774 struct drm_i915_private *dev_priv = dev->dev_private;
775 enum pipe pipe = intel_get_pipe_from_connector(connector);
776 u32 tmp;
777
23ec0a88
VS		 778 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
779 return;
780
3bd712e5
JN		 781 intel_panel_actually_set_backlight(connector, 0);
782
7bd688cd
JN		 783 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
784 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
785}
786
0fb890c0
VK		 787static void bxt_disable_backlight(struct intel_connector *connector)
788{
789 struct drm_device *dev = connector->base.dev;
790 struct drm_i915_private *dev_priv = dev->dev_private;
022e4e52
SK		 791 struct intel_panel *panel = &connector->panel;
792 u32 tmp, val;
0fb890c0
VK		 793
794 intel_panel_actually_set_backlight(connector, 0);
795
022e4e52
SK		 796 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
797 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
798 tmp & ~BXT_BLC_PWM_ENABLE);
799
800 if (panel->backlight.controller == 1) {
801 val = I915_READ(UTIL_PIN_CTL);
802 val &= ~UTIL_PIN_ENABLE;
803 I915_WRITE(UTIL_PIN_CTL, val);
804 }
0fb890c0
VK		 805}
806
b029e66f
SK		 807static void pwm_disable_backlight(struct intel_connector *connector)
808{
809 struct intel_panel *panel = &connector->panel;
810
811 /* Disable the backlight */
812 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
813 usleep_range(2000, 3000);
814 pwm_disable(panel->backlight.pwm);
815}
816
752aa88a 817void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 818{
752aa88a 819 struct drm_device *dev = connector->base.dev;
f52c619a 820 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 821 struct intel_panel *panel = &connector->panel;
8ba2d185 822
260d8f98 823 if (!panel->backlight.present)
752aa88a
JB		 824 return;
825
3f577573 826 /*
5389e916 827 * Do not disable backlight on the vga_switcheroo path. When switching
3f577573
JN		 828 * away from i915, the other client may depend on i915 to handle the
829 * backlight. This will leave the backlight on unnecessarily when
830 * another client is not activated.
831 */
832 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
833 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
834 return;
835 }
836
07f11d49 837 mutex_lock(&dev_priv->backlight_lock);
47356eb6 838
ab656bb9
JN		 839 if (panel->backlight.device)
840 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 841 panel->backlight.enabled = false;
5507faeb 842 panel->backlight.disable(connector);
24ded204 843
07f11d49 844 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 845}
24ded204 846
437b15b8 847static void lpt_enable_backlight(struct intel_connector *connector)
96ab4c70
DV		 848{
849 struct drm_device *dev = connector->base.dev;
850 struct drm_i915_private *dev_priv = dev->dev_private;
851 struct intel_panel *panel = &connector->panel;
852 u32 pch_ctl1, pch_ctl2;
853
854 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
855 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
856 DRM_DEBUG_KMS("pch backlight already enabled\n");
857 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
858 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
859 }
24ded204 860
96ab4c70
DV		 861 pch_ctl2 = panel->backlight.max << 16;
862 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 863
96ab4c70
DV		 864 pch_ctl1 = 0;
865 if (panel->backlight.active_low_pwm)
866 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 867
e6b2627c
JN		 868 /* After LPT, override is the default. */
869 if (HAS_PCH_LPT(dev_priv))
870 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
96ab4c70
DV		 871
872 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
873 POSTING_READ(BLC_PWM_PCH_CTL1);
874 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
875
876 /* This won't stick until the above enable. */
877 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW		 878}
879
7bd688cd
JN		 880static void pch_enable_backlight(struct intel_connector *connector)
881{
882 struct drm_device *dev = connector->base.dev;
883 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 884 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 885 enum pipe pipe = intel_get_pipe_from_connector(connector);
886 enum transcoder cpu_transcoder =
887 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 888 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 889
b35684b8
JN		 890 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
891 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 892 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN		 893 cpu_ctl2 &= ~BLM_PWM_ENABLE;
894 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
895 }
7bd688cd 896
b35684b8
JN		 897 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
898 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
899 DRM_DEBUG_KMS("pch backlight already enabled\n");
900 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
901 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
902 }
7bd688cd
JN		 903
904 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 905 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 906 else
b35684b8
JN		 907 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
908 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 909 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 910 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 911
b35684b8 912 /* This won't stick until the above enable. */
3bd712e5 913 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN		 914
915 pch_ctl2 = panel->backlight.max << 16;
916 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
917
b35684b8
JN		 918 pch_ctl1 = 0;
919 if (panel->backlight.active_low_pwm)
920 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 921
b35684b8
JN		 922 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
923 POSTING_READ(BLC_PWM_PCH_CTL1);
924 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN		 925}
926
927static void i9xx_enable_backlight(struct intel_connector *connector)
928{
b35684b8
JN		 929 struct drm_device *dev = connector->base.dev;
930 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 931 struct intel_panel *panel = &connector->panel;
b35684b8
JN		 932 u32 ctl, freq;
933
934 ctl = I915_READ(BLC_PWM_CTL);
935 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 936 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 937 I915_WRITE(BLC_PWM_CTL, 0);
938 }
3bd712e5 939
b35684b8
JN		 940 freq = panel->backlight.max;
941 if (panel->backlight.combination_mode)
942 freq /= 0xff;
943
944 ctl = freq << 17;
b6ab66aa 945 if (panel->backlight.combination_mode)
b35684b8
JN		 946 ctl |= BLM_LEGACY_MODE;
947 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
948 ctl |= BLM_POLARITY_PNV;
949
950 I915_WRITE(BLC_PWM_CTL, ctl);
951 POSTING_READ(BLC_PWM_CTL);
952
953 /* XXX: combine this into above write? */
3bd712e5 954 intel_panel_actually_set_backlight(connector, panel->backlight.level);
2059ac3b
JN		 955
956 /*
957 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
958 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
959 * that has backlight.
960 */
961 if (IS_GEN2(dev))
962 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
7bd688cd 963}
8ba2d185 964
7bd688cd
JN		 965static void i965_enable_backlight(struct intel_connector *connector)
966{
967 struct drm_device *dev = connector->base.dev;
968 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 969 struct intel_panel *panel = &connector->panel;
7bd688cd 970 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 971 u32 ctl, ctl2, freq;
7bd688cd 972
b35684b8
JN		 973 ctl2 = I915_READ(BLC_PWM_CTL2);
974 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 975 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 976 ctl2 &= ~BLM_PWM_ENABLE;
977 I915_WRITE(BLC_PWM_CTL2, ctl2);
978 }
7bd688cd 979
b35684b8
JN		 980 freq = panel->backlight.max;
981 if (panel->backlight.combination_mode)
982 freq /= 0xff;
7bd688cd 983
b35684b8
JN		 984 ctl = freq << 16;
985 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 986
b35684b8
JN		 987 ctl2 = BLM_PIPE(pipe);
988 if (panel->backlight.combination_mode)
989 ctl2 |= BLM_COMBINATION_MODE;
990 if (panel->backlight.active_low_pwm)
991 ctl2 |= BLM_POLARITY_I965;
992 I915_WRITE(BLC_PWM_CTL2, ctl2);
993 POSTING_READ(BLC_PWM_CTL2);
994 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN		 995
996 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN		 997}
998
999static void vlv_enable_backlight(struct intel_connector *connector)
1000{
1001 struct drm_device *dev = connector->base.dev;
1002 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 1003 struct intel_panel *panel = &connector->panel;
7bd688cd 1004 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 1005 u32 ctl, ctl2;
7bd688cd 1006
23ec0a88
VS		 1007 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1008 return;
1009
b35684b8
JN		 1010 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1011 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 1012 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 1013 ctl2 &= ~BLM_PWM_ENABLE;
1014 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1015 }
7bd688cd 1016
b35684b8
JN		 1017 ctl = panel->backlight.max << 16;
1018 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 1019
b35684b8
JN		 1020 /* XXX: combine this into above write? */
1021 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 1022
b35684b8
JN		 1023 ctl2 = 0;
1024 if (panel->backlight.active_low_pwm)
1025 ctl2 |= BLM_POLARITY_I965;
1026 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 1027 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 1028 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW		 1029}
1030
0fb890c0
VK		 1031static void bxt_enable_backlight(struct intel_connector *connector)
1032{
1033 struct drm_device *dev = connector->base.dev;
1034 struct drm_i915_private *dev_priv = dev->dev_private;
1035 struct intel_panel *panel = &connector->panel;
022e4e52
SK		 1036 enum pipe pipe = intel_get_pipe_from_connector(connector);
1037 u32 pwm_ctl, val;
1038
1039 /* To use 2nd set of backlight registers, utility pin has to be
1040 * enabled with PWM mode.
1041 * The field should only be changed when the utility pin is disabled
1042 */
1043 if (panel->backlight.controller == 1) {
1044 val = I915_READ(UTIL_PIN_CTL);
1045 if (val & UTIL_PIN_ENABLE) {
1046 DRM_DEBUG_KMS("util pin already enabled\n");
1047 val &= ~UTIL_PIN_ENABLE;
1048 I915_WRITE(UTIL_PIN_CTL, val);
1049 }
0fb890c0 1050
022e4e52
SK		 1051 val = 0;
1052 if (panel->backlight.util_pin_active_low)
1053 val |= UTIL_PIN_POLARITY;
1054 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1055 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1056 }
1057
1058 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
0fb890c0
VK		 1059 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1060 DRM_DEBUG_KMS("backlight already enabled\n");
1061 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
022e4e52
SK		 1062 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1063 pwm_ctl);
0fb890c0
VK		 1064 }
1065
022e4e52
SK		 1066 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1067 panel->backlight.max);
0fb890c0
VK		 1068
1069 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1070
1071 pwm_ctl = 0;
1072 if (panel->backlight.active_low_pwm)
1073 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1074
022e4e52
SK		 1075 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1076 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1077 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1078 pwm_ctl | BXT_BLC_PWM_ENABLE);
0fb890c0
VK		 1079}
1080
b029e66f
SK		 1081static void pwm_enable_backlight(struct intel_connector *connector)
1082{
1083 struct intel_panel *panel = &connector->panel;
1084
1085 pwm_enable(panel->backlight.pwm);
1086 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1087}
1088
752aa88a 1089void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 1090{
752aa88a 1091 struct drm_device *dev = connector->base.dev;
47356eb6 1092 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 1093 struct intel_panel *panel = &connector->panel;
752aa88a 1094 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 1095
260d8f98 1096 if (!panel->backlight.present)
752aa88a
JB		 1097 return;
1098
6f2bcceb 1099 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 1100
07f11d49 1101 mutex_lock(&dev_priv->backlight_lock);
47356eb6 1102
f91c15e0
JN		 1103 WARN_ON(panel->backlight.max == 0);
1104
13f3fbe8 1105 if (panel->backlight.level <= panel->backlight.min) {
f91c15e0 1106 panel->backlight.level = panel->backlight.max;
58c68779
JN		 1107 if (panel->backlight.device)
1108 panel->backlight.device->props.brightness =
6dda730e
JN		 1109 scale_hw_to_user(connector,
1110 panel->backlight.level,
1111 panel->backlight.device->props.max_brightness);
b6b3ba5b 1112 }
47356eb6 1113
5507faeb 1114 panel->backlight.enable(connector);
58c68779 1115 panel->backlight.enabled = true;
ab656bb9
JN		 1116 if (panel->backlight.device)
1117 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 1118
07f11d49 1119 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW		 1120}
1121
912e8b12 1122#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 1123static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 1124{
752aa88a 1125 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 1126 struct intel_panel *panel = &connector->panel;
752aa88a
JB		 1127 struct drm_device *dev = connector->base.dev;
1128
51fd371b 1129 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW		 1130 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1131 bd->props.brightness, bd->props.max_brightness);
752aa88a 1132 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 1133 bd->props.max_brightness);
ab656bb9
JN		 1134
1135 /*
1136 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1137 * backlight class device does not make it easy to to differentiate
1138 * between callbacks for brightness and bl_power, so our backlight_power
1139 * callback needs to take this into account.
1140 */
1141 if (panel->backlight.enabled) {
5507faeb 1142 if (panel->backlight.power) {
e6755fb7
JN		 1143 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1144 bd->props.brightness != 0;
5507faeb 1145 panel->backlight.power(connector, enable);
ab656bb9
JN		 1146 }
1147 } else {
1148 bd->props.power = FB_BLANK_POWERDOWN;
1149 }
1150
51fd371b 1151 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG		 1152 return 0;
1153}
1154
db31af1d 1155static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1156{
752aa88a
JB		 1157 struct intel_connector *connector = bl_get_data(bd);
1158 struct drm_device *dev = connector->base.dev;
c8c8fb33 1159 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1160 u32 hw_level;
7bd688cd 1161 int ret;
752aa88a 1162
c8c8fb33 1163 intel_runtime_pm_get(dev_priv);
51fd371b 1164 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN		 1165
1166 hw_level = intel_panel_get_backlight(connector);
1167 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1168
51fd371b 1169 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1170 intel_runtime_pm_put(dev_priv);
752aa88a 1171
7bd688cd 1172 return ret;
aaa6fd2a
MG		 1173}
1174
db31af1d
JN		 1175static const struct backlight_ops intel_backlight_device_ops = {
1176 .update_status = intel_backlight_device_update_status,
1177 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG		 1178};
1179
db31af1d 1180static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1181{
58c68779 1182 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1183 struct backlight_properties props;
aaa6fd2a 1184
58c68779 1185 if (WARN_ON(panel->backlight.device))
dc652f90
JN		 1186 return -ENODEV;
1187
0962c3c9
VS		 1188 if (!panel->backlight.present)
1189 return 0;
1190
6dda730e 1191 WARN_ON(panel->backlight.max == 0);
7bd688cd 1192
af437cfd 1193 memset(&props, 0, sizeof(props));
aaa6fd2a 1194 props.type = BACKLIGHT_RAW;
6dda730e
JN		 1195
1196 /*
1197 * Note: Everything should work even if the backlight device max
1198 * presented to the userspace is arbitrarily chosen.
1199 */
7bd688cd 1200 props.max_brightness = panel->backlight.max;
6dda730e
JN		 1201 props.brightness = scale_hw_to_user(connector,
1202 panel->backlight.level,
1203 props.max_brightness);
58c68779 1204
ab656bb9
JN		 1205 if (panel->backlight.enabled)
1206 props.power = FB_BLANK_UNBLANK;
1207 else
1208 props.power = FB_BLANK_POWERDOWN;
1209
58c68779
JN		 1210 /*
1211 * Note: using the same name independent of the connector prevents
1212 * registration of multiple backlight devices in the driver.
1213 */
1214 panel->backlight.device =
aaa6fd2a 1215 backlight_device_register("intel_backlight",
db31af1d
JN		 1216 connector->base.kdev,
1217 connector,
1218 &intel_backlight_device_ops, &props);
aaa6fd2a 1219
58c68779 1220 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1221 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN		 1222 PTR_ERR(panel->backlight.device));
1223 panel->backlight.device = NULL;
aaa6fd2a
MG		 1224 return -ENODEV;
1225 }
0962c3c9
VS		 1226
1227 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1228 connector->base.name);
1229
aaa6fd2a
MG		 1230 return 0;
1231}
1232
db31af1d 1233static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1234{
58c68779
JN		 1235 struct intel_panel *panel = &connector->panel;
1236
1237 if (panel->backlight.device) {
1238 backlight_device_unregister(panel->backlight.device);
1239 panel->backlight.device = NULL;
dc652f90 1240 }
aaa6fd2a 1241}
db31af1d
JN		 1242#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1243static int intel_backlight_device_register(struct intel_connector *connector)
1244{
1245 return 0;
1246}
1247static void intel_backlight_device_unregister(struct intel_connector *connector)
1248{
1249}
1250#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1251
f91c15e0 1252/*
aa17cdb4
JN		 1253 * SPT: This value represents the period of the PWM stream in clock periods
1254 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1255 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1256 */
1257static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1258{
1259 struct drm_device *dev = connector->base.dev;
1260 struct drm_i915_private *dev_priv = dev->dev_private;
1261 u32 mul, clock;
1262
1263 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1264 mul = 128;
1265 else
1266 mul = 16;
1267
1268 clock = MHz(24);
1269
1270 return clock / (pwm_freq_hz * mul);
1271}
1272
1273/*
1274 * LPT: This value represents the period of the PWM stream in clock periods
1275 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1276 * LPT SOUTH_CHICKEN2 register bit 5).
1277 */
1278static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1279{
1280 struct drm_device *dev = connector->base.dev;
1281 struct drm_i915_private *dev_priv = dev->dev_private;
1282 u32 mul, clock;
1283
1284 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1285 mul = 16;
1286 else
1287 mul = 128;
1288
1289 if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
1290 clock = MHz(135); /* LPT:H */
1291 else
1292 clock = MHz(24); /* LPT:LP */
1293
1294 return clock / (pwm_freq_hz * mul);
1295}
1296
1297/*
1298 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1299 * display raw clocks multiplied by 128.
1300 */
1301static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1302{
1303 struct drm_device *dev = connector->base.dev;
1304 int clock = MHz(intel_pch_rawclk(dev));
1305
1306 return clock / (pwm_freq_hz * 128);
1307}
1308
1309/*
1310 * Gen2: This field determines the number of time base events (display core
1311 * clock frequency/32) in total for a complete cycle of modulated backlight
1312 * control.
f91c15e0 1313 *
aa17cdb4
JN		 1314 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1315 * divided by 32.
1316 */
1317static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1318{
1319 struct drm_device *dev = connector->base.dev;
1320 struct drm_i915_private *dev_priv = dev->dev_private;
1321 int clock;
1322
1323 if (IS_PINEVIEW(dev))
1324 clock = intel_hrawclk(dev);
1325 else
1326 clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1327
1328 return clock / (pwm_freq_hz * 32);
1329}
1330
1331/*
1332 * Gen4: This value represents the period of the PWM stream in display core
1333 * clocks multiplied by 128.
1334 */
1335static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1336{
1337 struct drm_device *dev = connector->base.dev;
1338 struct drm_i915_private *dev_priv = dev->dev_private;
1339 int clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1340
1341 return clock / (pwm_freq_hz * 128);
1342}
1343
1344/*
1345 * VLV: This value represents the period of the PWM stream in display core
1346 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1347 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1348 */
1349static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1350{
1351 struct drm_device *dev = connector->base.dev;
1352 struct drm_i915_private *dev_priv = dev->dev_private;
1353 int clock;
1354
1355 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1356 if (IS_CHERRYVIEW(dev))
1357 return KHz(19200) / (pwm_freq_hz * 16);
1358 else
1359 return MHz(25) / (pwm_freq_hz * 16);
1360 } else {
1361 clock = intel_hrawclk(dev);
1362 return MHz(clock) / (pwm_freq_hz * 128);
1363 }
1364}
1365
1366static u32 get_backlight_max_vbt(struct intel_connector *connector)
1367{
1368 struct drm_device *dev = connector->base.dev;
1369 struct drm_i915_private *dev_priv = dev->dev_private;
5507faeb 1370 struct intel_panel *panel = &connector->panel;
aa17cdb4
JN		 1371 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1372 u32 pwm;
1373
1374 if (!pwm_freq_hz) {
1375 DRM_DEBUG_KMS("backlight frequency not specified in VBT\n");
1376 return 0;
1377 }
1378
5507faeb 1379 if (!panel->backlight.hz_to_pwm) {
aa17cdb4
JN		 1380 DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n");
1381 return 0;
1382 }
1383
5507faeb 1384 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
aa17cdb4
JN		 1385 if (!pwm) {
1386 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1387 return 0;
1388 }
1389
1390 DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz);
1391
1392 return pwm;
1393}
1394
1395/*
1396 * Note: The setup hooks can't assume pipe is set!
f91c15e0 1397 */
6dda730e
JN		 1398static u32 get_backlight_min_vbt(struct intel_connector *connector)
1399{
1400 struct drm_device *dev = connector->base.dev;
1401 struct drm_i915_private *dev_priv = dev->dev_private;
1402 struct intel_panel *panel = &connector->panel;
e1c412e7 1403 int min;
6dda730e
JN		 1404
1405 WARN_ON(panel->backlight.max == 0);
1406
e1c412e7
JN		 1407 /*
1408 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1409 * to problems. There are such machines out there. Either our
1410 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1411 * against this by letting the minimum be at most (arbitrarily chosen)
1412 * 25% of the max.
1413 */
1414 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1415 if (min != dev_priv->vbt.backlight.min_brightness) {
1416 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1417 dev_priv->vbt.backlight.min_brightness, min);
1418 }
1419
6dda730e 1420 /* vbt value is a coefficient in range [0..255] */
e1c412e7 1421 return scale(min, 0, 255, 0, panel->backlight.max);
6dda730e
JN		 1422}
1423
437b15b8 1424static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
aaa6fd2a 1425{
96ab4c70 1426 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1427 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV		 1428 struct intel_panel *panel = &connector->panel;
1429 u32 pch_ctl1, pch_ctl2, val;
1430
1431 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1432 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1433
1434 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1435 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN		 1436
1437 if (!panel->backlight.max)
1438 panel->backlight.max = get_backlight_max_vbt(connector);
1439
96ab4c70
DV		 1440 if (!panel->backlight.max)
1441 return -ENODEV;
1442
6dda730e
JN		 1443 panel->backlight.min = get_backlight_min_vbt(connector);
1444
437b15b8 1445 val = lpt_get_backlight(connector);
96ab4c70
DV		 1446 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1447
1448 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1449 panel->backlight.level != 0;
1450
1451 return 0;
1452}
1453
6517d273 1454static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1455{
636baebf
JN		 1456 struct drm_device *dev = connector->base.dev;
1457 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1458 struct intel_panel *panel = &connector->panel;
636baebf 1459 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1460
636baebf
JN		 1461 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1462 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1463
1464 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1465 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN		 1466
1467 if (!panel->backlight.max)
1468 panel->backlight.max = get_backlight_max_vbt(connector);
1469
7bd688cd
JN		 1470 if (!panel->backlight.max)
1471 return -ENODEV;
1472
6dda730e
JN		 1473 panel->backlight.min = get_backlight_min_vbt(connector);
1474
7bd688cd
JN		 1475 val = pch_get_backlight(connector);
1476 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1477
636baebf
JN		 1478 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1479 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1480 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1481
7bd688cd
JN		 1482 return 0;
1483}
1484
6517d273 1485static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1486{
636baebf
JN		 1487 struct drm_device *dev = connector->base.dev;
1488 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1489 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1490 u32 ctl, val;
1491
1492 ctl = I915_READ(BLC_PWM_CTL);
1493
b6ab66aa 1494 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
636baebf
JN		 1495 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1496
1497 if (IS_PINEVIEW(dev))
1498 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1499
1500 panel->backlight.max = ctl >> 17;
aa17cdb4
JN		 1501
1502 if (!panel->backlight.max) {
1503 panel->backlight.max = get_backlight_max_vbt(connector);
1504 panel->backlight.max >>= 1;
1505 }
7bd688cd 1506
7bd688cd
JN		 1507 if (!panel->backlight.max)
1508 return -ENODEV;
1509
aa17cdb4
JN		 1510 if (panel->backlight.combination_mode)
1511 panel->backlight.max *= 0xff;
1512
6dda730e
JN		 1513 panel->backlight.min = get_backlight_min_vbt(connector);
1514
7bd688cd
JN		 1515 val = i9xx_get_backlight(connector);
1516 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1517
636baebf
JN		 1518 panel->backlight.enabled = panel->backlight.level != 0;
1519
7bd688cd
JN		 1520 return 0;
1521}
1522
6517d273 1523static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1524{
636baebf
JN		 1525 struct drm_device *dev = connector->base.dev;
1526 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1527 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1528 u32 ctl, ctl2, val;
1529
1530 ctl2 = I915_READ(BLC_PWM_CTL2);
1531 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1532 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1533
1534 ctl = I915_READ(BLC_PWM_CTL);
1535 panel->backlight.max = ctl >> 16;
aa17cdb4
JN		 1536
1537 if (!panel->backlight.max)
1538 panel->backlight.max = get_backlight_max_vbt(connector);
7bd688cd 1539
7bd688cd
JN		 1540 if (!panel->backlight.max)
1541 return -ENODEV;
1542
aa17cdb4
JN		 1543 if (panel->backlight.combination_mode)
1544 panel->backlight.max *= 0xff;
1545
6dda730e
JN		 1546 panel->backlight.min = get_backlight_min_vbt(connector);
1547
7bd688cd
JN		 1548 val = i9xx_get_backlight(connector);
1549 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1550
636baebf
JN		 1551 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1552 panel->backlight.level != 0;
1553
7bd688cd
JN		 1554 return 0;
1555}
1556
6517d273 1557static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
7bd688cd
JN		 1558{
1559 struct drm_device *dev = connector->base.dev;
1560 struct drm_i915_private *dev_priv = dev->dev_private;
1561 struct intel_panel *panel = &connector->panel;
636baebf 1562 u32 ctl, ctl2, val;
7bd688cd 1563
6517d273
VS		 1564 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1565 return -ENODEV;
1566
1567 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
636baebf
JN		 1568 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1569
6517d273 1570 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
636baebf 1571 panel->backlight.max = ctl >> 16;
aa17cdb4
JN		 1572
1573 if (!panel->backlight.max)
1574 panel->backlight.max = get_backlight_max_vbt(connector);
1575
7bd688cd
JN		 1576 if (!panel->backlight.max)
1577 return -ENODEV;
1578
6dda730e
JN		 1579 panel->backlight.min = get_backlight_min_vbt(connector);
1580
6517d273 1581 val = _vlv_get_backlight(dev, pipe);
7bd688cd
JN		 1582 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1583
636baebf
JN		 1584 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1585 panel->backlight.level != 0;
1586
7bd688cd
JN		 1587 return 0;
1588}
1589
0fb890c0
VK		 1590static int
1591bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1592{
1593 struct drm_device *dev = connector->base.dev;
1594 struct drm_i915_private *dev_priv = dev->dev_private;
1595 struct intel_panel *panel = &connector->panel;
1596 u32 pwm_ctl, val;
1597
022e4e52
SK		 1598 /*
1599 * For BXT hard coding the Backlight controller to 0.
1600 * TODO : Read the controller value from VBT and generalize
1601 */
1602 panel->backlight.controller = 0;
0fb890c0 1603
022e4e52
SK		 1604 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1605
1606 /* Keeping the check if controller 1 is to be programmed.
1607 * This will come into affect once the VBT parsing
1608 * is fixed for controller selection, and controller 1 is used
1609 * for a prticular display configuration.
1610 */
1611 if (panel->backlight.controller == 1) {
1612 val = I915_READ(UTIL_PIN_CTL);
1613 panel->backlight.util_pin_active_low =
1614 val & UTIL_PIN_POLARITY;
1615 }
1616
1617 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1618 panel->backlight.max =
1619 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
aa17cdb4
JN		 1620
1621 if (!panel->backlight.max)
1622 panel->backlight.max = get_backlight_max_vbt(connector);
1623
0fb890c0
VK		 1624 if (!panel->backlight.max)
1625 return -ENODEV;
1626
1627 val = bxt_get_backlight(connector);
1628 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1629
1630 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1631 panel->backlight.level != 0;
1632
1633 return 0;
1634}
1635
b029e66f
SK		 1636static int pwm_setup_backlight(struct intel_connector *connector,
1637 enum pipe pipe)
1638{
1639 struct drm_device *dev = connector->base.dev;
1640 struct intel_panel *panel = &connector->panel;
1641 int retval;
1642
1643 /* Get the PWM chip for backlight control */
1644 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1645 if (IS_ERR(panel->backlight.pwm)) {
1646 DRM_ERROR("Failed to own the pwm chip\n");
1647 panel->backlight.pwm = NULL;
1648 return -ENODEV;
1649 }
1650
1651 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1652 CRC_PMIC_PWM_PERIOD_NS);
1653 if (retval < 0) {
1654 DRM_ERROR("Failed to configure the pwm chip\n");
1655 pwm_put(panel->backlight.pwm);
1656 panel->backlight.pwm = NULL;
1657 return retval;
1658 }
1659
1660 panel->backlight.min = 0; /* 0% */
1661 panel->backlight.max = 100; /* 100% */
1662 panel->backlight.level = DIV_ROUND_UP(
1663 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1664 CRC_PMIC_PWM_PERIOD_NS);
1665 panel->backlight.enabled = panel->backlight.level != 0;
1666
1667 return 0;
1668}
1669
6517d273 1670int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
aaa6fd2a 1671{
db31af1d 1672 struct drm_device *dev = connector->dev;
7bd688cd 1673 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1674 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1675 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1676 int ret;
db31af1d 1677
c675949e 1678 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD		 1679 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1680 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1681 } else {
1682 DRM_DEBUG_KMS("no backlight present per VBT\n");
1683 return 0;
1684 }
c675949e
JN		 1685 }
1686
5507faeb
JN		 1687 /* ensure intel_panel has been initialized first */
1688 if (WARN_ON(!panel->backlight.setup))
1689 return -ENODEV;
1690
7bd688cd 1691 /* set level and max in panel struct */
07f11d49 1692 mutex_lock(&dev_priv->backlight_lock);
5507faeb 1693 ret = panel->backlight.setup(intel_connector, pipe);
07f11d49 1694 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd
JN		 1695
1696 if (ret) {
1697 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1698 connector->name);
7bd688cd
JN		 1699 return ret;
1700 }
db31af1d 1701
c91c9f32
JN		 1702 panel->backlight.present = true;
1703
0962c3c9
VS		 1704 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1705 connector->name,
c445b3b1 1706 panel->backlight.enabled ? "enabled" : "disabled",
0962c3c9 1707 panel->backlight.level, panel->backlight.max);
c445b3b1 1708
aaa6fd2a
MG		 1709 return 0;
1710}
1711
db31af1d 1712void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1713{
db31af1d 1714 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1715 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1716
b029e66f
SK		 1717 /* dispose of the pwm */
1718 if (panel->backlight.pwm)
1719 pwm_put(panel->backlight.pwm);
1720
c91c9f32 1721 panel->backlight.present = false;
aaa6fd2a 1722}
1d508706 1723
7bd688cd 1724/* Set up chip specific backlight functions */
5507faeb
JN		 1725static void
1726intel_panel_init_backlight_funcs(struct intel_panel *panel)
7bd688cd 1727{
5507faeb
JN		 1728 struct intel_connector *intel_connector =
1729 container_of(panel, struct intel_connector, panel);
1730 struct drm_device *dev = intel_connector->base.dev;
7bd688cd
JN		 1731 struct drm_i915_private *dev_priv = dev->dev_private;
1732
0fb890c0 1733 if (IS_BROXTON(dev)) {
5507faeb
JN		 1734 panel->backlight.setup = bxt_setup_backlight;
1735 panel->backlight.enable = bxt_enable_backlight;
1736 panel->backlight.disable = bxt_disable_backlight;
1737 panel->backlight.set = bxt_set_backlight;
1738 panel->backlight.get = bxt_get_backlight;
437b15b8 1739 } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
5507faeb
JN		 1740 panel->backlight.setup = lpt_setup_backlight;
1741 panel->backlight.enable = lpt_enable_backlight;
1742 panel->backlight.disable = lpt_disable_backlight;
1743 panel->backlight.set = lpt_set_backlight;
1744 panel->backlight.get = lpt_get_backlight;
aa17cdb4 1745 if (HAS_PCH_LPT(dev))
5507faeb 1746 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
aa17cdb4 1747 else
5507faeb 1748 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
96ab4c70 1749 } else if (HAS_PCH_SPLIT(dev)) {
5507faeb
JN		 1750 panel->backlight.setup = pch_setup_backlight;
1751 panel->backlight.enable = pch_enable_backlight;
1752 panel->backlight.disable = pch_disable_backlight;
1753 panel->backlight.set = pch_set_backlight;
1754 panel->backlight.get = pch_get_backlight;
1755 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
7bd688cd 1756 } else if (IS_VALLEYVIEW(dev)) {
b029e66f 1757 if (dev_priv->vbt.has_mipi) {
5507faeb
JN		 1758 panel->backlight.setup = pwm_setup_backlight;
1759 panel->backlight.enable = pwm_enable_backlight;
1760 panel->backlight.disable = pwm_disable_backlight;
1761 panel->backlight.set = pwm_set_backlight;
1762 panel->backlight.get = pwm_get_backlight;
b029e66f 1763 } else {
5507faeb
JN		 1764 panel->backlight.setup = vlv_setup_backlight;
1765 panel->backlight.enable = vlv_enable_backlight;
1766 panel->backlight.disable = vlv_disable_backlight;
1767 panel->backlight.set = vlv_set_backlight;
1768 panel->backlight.get = vlv_get_backlight;
1769 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
b029e66f 1770 }
7bd688cd 1771 } else if (IS_GEN4(dev)) {
5507faeb
JN		 1772 panel->backlight.setup = i965_setup_backlight;
1773 panel->backlight.enable = i965_enable_backlight;
1774 panel->backlight.disable = i965_disable_backlight;
1775 panel->backlight.set = i9xx_set_backlight;
1776 panel->backlight.get = i9xx_get_backlight;
1777 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
7bd688cd 1778 } else {
5507faeb
JN		 1779 panel->backlight.setup = i9xx_setup_backlight;
1780 panel->backlight.enable = i9xx_enable_backlight;
1781 panel->backlight.disable = i9xx_disable_backlight;
1782 panel->backlight.set = i9xx_set_backlight;
1783 panel->backlight.get = i9xx_get_backlight;
1784 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
7bd688cd
JN		 1785 }
1786}
1787
dd06f90e 1788int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK		 1789 struct drm_display_mode *fixed_mode,
1790 struct drm_display_mode *downclock_mode)
1d508706 1791{
5507faeb
JN		 1792 intel_panel_init_backlight_funcs(panel);
1793
dd06f90e 1794 panel->fixed_mode = fixed_mode;
4b6ed685 1795 panel->downclock_mode = downclock_mode;
dd06f90e 1796
1d508706
JN		 1797 return 0;
1798}
1799
1800void intel_panel_fini(struct intel_panel *panel)
1801{
dd06f90e
JN		 1802 struct intel_connector *intel_connector =
1803 container_of(panel, struct intel_connector, panel);
1804
1805 if (panel->fixed_mode)
1806 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK		 1807
1808 if (panel->downclock_mode)
1809 drm_mode_destroy(intel_connector->base.dev,
1810 panel->downclock_mode);
1d508706 1811}
0962c3c9
VS		 1812
1813void intel_backlight_register(struct drm_device *dev)
1814{
1815 struct intel_connector *connector;
1816
1817 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1818 intel_backlight_device_register(connector);
1819}
1820
1821void intel_backlight_unregister(struct drm_device *dev)
1822{
1823 struct intel_connector *connector;
1824
1825 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1826 intel_backlight_device_unregister(connector);
1827}
Linux kernel - Deliverables
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