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drm/i915: Constify adjusted_mode
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW		 1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP		 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
f766093e 33#include <linux/kernel.h>
7bd90909 34#include <linux/moduleparam.h>
b029e66f 35#include <linux/pwm.h>
1d8e1c75
CW		 36#include "intel_drv.h"
37
b029e66f
SK		 38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
1d8e1c75 40void
4c6df4b4 41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW		 42 struct drm_display_mode *adjusted_mode)
43{
4c6df4b4 44 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID		 45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW		 47}
48
525997e0
JN		 49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev: drm device
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
59intel_find_panel_downclock(struct drm_device *dev,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(dev, tmp_mode);
98 else
99 return NULL;
100}
101
1d8e1c75
CW		 102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
b074cec8 104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 105 struct intel_crtc_state *pipe_config,
b074cec8 106 int fitting_mode)
1d8e1c75 107{
7c5f93b0
VS		 108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
1d8e1c75
CW		 110
111 /* Native modes don't need fitting */
aad941d5
VS		 112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW		 114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS		 118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
aad941d5
VS		 120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
1d8e1c75
CW		 122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
aad941d5 127 u32 scaled_width = adjusted_mode->crtc_hdisplay
9084e7d2
DV		 128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
aad941d5 130 * adjusted_mode->crtc_vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
aad941d5 135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
1d8e1c75 136 y = 0;
aad941d5 137 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ		 140 if (height & 1)
141 height++;
aad941d5 142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
1d8e1c75 143 x = 0;
aad941d5 144 width = adjusted_mode->crtc_hdisplay;
1d8e1c75
CW		 145 } else {
146 x = y = 0;
aad941d5
VS		 147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
1d8e1c75
CW		 149 }
150 }
151 break;
152
1d8e1c75
CW		 153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
aad941d5
VS		 155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 157 break;
ab3e67f4
JB		 158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW		 162 }
163
164done:
b074cec8
JB		 165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552 170static void
5e7234c9 171centre_horizontally(struct drm_display_mode *adjusted_mode,
2dd24552
JB		 172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
5e7234c9
VS		 177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
2dd24552
JB		 179 sync_pos = (blank_width - sync_width + 1) / 2;
180
aad941d5 181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
2dd24552
JB		 182 border += border & 1; /* make the border even */
183
5e7234c9
VS		 184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
2dd24552 187
5e7234c9
VS		 188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
2dd24552
JB		 190}
191
192static void
5e7234c9 193centre_vertically(struct drm_display_mode *adjusted_mode,
2dd24552
JB		 194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
5e7234c9
VS		 199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
2dd24552
JB		 201 sync_pos = (blank_width - sync_width + 1) / 2;
202
aad941d5 203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
2dd24552 204
5e7234c9
VS		 205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
2dd24552 208
5e7234c9
VS		 209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
2dd24552
JB		 211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
5cec258b 226static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 227 u32 *pfit_control)
228{
7c5f93b0 229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV		 231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 233 adjusted_mode->crtc_vdisplay;
9084e7d2
DV		 234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
aad941d5 242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
9084e7d2
DV		 243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
5cec258b 246static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
2d112de7 250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV		 252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 254 adjusted_mode->crtc_vdisplay;
9084e7d2
DV		 255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
aad941d5 268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
9084e7d2 269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
aad941d5 270 adjusted_mode->crtc_vdisplay);
9084e7d2
DV		 271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
aad941d5 284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
9084e7d2 285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
aad941d5 286 adjusted_mode->crtc_hdisplay);
9084e7d2
DV		 287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552 303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 304 struct intel_crtc_state *pipe_config,
2dd24552
JB		 305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
7c5f93b0 309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
2dd24552
JB		 310
311 /* Native modes don't need fitting */
aad941d5
VS		 312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
2dd24552
JB		 314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
37327abd
VS		 322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB		 324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
9084e7d2
DV		 328 if (INTEL_INFO(dev)->gen >= 4)
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
2dd24552 333 break;
2dd24552
JB		 334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
aad941d5
VS		 339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
2dd24552
JB		 341 pfit_control |= PFIT_ENABLE;
342 if (INTEL_INFO(dev)->gen >= 4)
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
ab3e67f4
JB		 351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
2dd24552
JB		 354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
358 if (INTEL_INFO(dev)->gen >= 4)
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
6b89cdde
DV		 368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
369 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
2deefda5
DV		 372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 374 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB		 375}
376
525997e0
JN		 377enum drm_connector_status
378intel_panel_detect(struct drm_device *dev)
379{
380 struct drm_i915_private *dev_priv = dev->dev_private;
381
382 /* Assume that the BIOS does not lie through the OpRegion... */
383 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
384 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
385 connector_status_connected :
386 connector_status_disconnected;
387 }
388
389 switch (i915.panel_ignore_lid) {
390 case -2:
391 return connector_status_connected;
392 case -1:
393 return connector_status_disconnected;
394 default:
395 return connector_status_unknown;
396 }
397}
398
6dda730e
JN		 399/**
400 * scale - scale values from one range to another
401 *
402 * @source_val: value in range [@source_min..@source_max]
403 *
404 * Return @source_val in range [@source_min..@source_max] scaled to range
405 * [@target_min..@target_max].
406 */
407static uint32_t scale(uint32_t source_val,
408 uint32_t source_min, uint32_t source_max,
409 uint32_t target_min, uint32_t target_max)
410{
411 uint64_t target_val;
412
413 WARN_ON(source_min > source_max);
414 WARN_ON(target_min > target_max);
415
416 /* defensive */
417 source_val = clamp(source_val, source_min, source_max);
418
419 /* avoid overflows */
673e7bbd
AE		 420 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
421 (target_max - target_min), source_max - source_min);
6dda730e
JN		 422 target_val += target_min;
423
424 return target_val;
425}
426
427/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
428static inline u32 scale_user_to_hw(struct intel_connector *connector,
429 u32 user_level, u32 user_max)
430{
431 struct intel_panel *panel = &connector->panel;
432
433 return scale(user_level, 0, user_max,
434 panel->backlight.min, panel->backlight.max);
435}
436
437/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
438 * to [hw_min..hw_max]. */
439static inline u32 clamp_user_to_hw(struct intel_connector *connector,
440 u32 user_level, u32 user_max)
441{
442 struct intel_panel *panel = &connector->panel;
443 u32 hw_level;
444
445 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
446 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
447
448 return hw_level;
449}
450
451/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
452static inline u32 scale_hw_to_user(struct intel_connector *connector,
453 u32 hw_level, u32 user_max)
454{
455 struct intel_panel *panel = &connector->panel;
456
457 return scale(hw_level, panel->backlight.min, panel->backlight.max,
458 0, user_max);
459}
460
7bd688cd
JN		 461static u32 intel_panel_compute_brightness(struct intel_connector *connector,
462 u32 val)
7bd90909 463{
7bd688cd 464 struct drm_device *dev = connector->base.dev;
4dca20ef 465 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN		 466 struct intel_panel *panel = &connector->panel;
467
468 WARN_ON(panel->backlight.max == 0);
4dca20ef 469
d330a953 470 if (i915.invert_brightness < 0)
4dca20ef
CE		 471 return val;
472
d330a953 473 if (i915.invert_brightness > 0 ||
d6540632 474 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 475 return panel->backlight.max - val;
d6540632 476 }
7bd90909
CE		 477
478 return val;
479}
480
437b15b8 481static u32 lpt_get_backlight(struct intel_connector *connector)
0b0b053a 482{
96ab4c70 483 struct drm_device *dev = connector->base.dev;
bfd7590d 484 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 485
96ab4c70
DV		 486 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
487}
07bf139b 488
7bd688cd 489static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 490{
7bd688cd 491 struct drm_device *dev = connector->base.dev;
a9573556 492 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 493
7bd688cd
JN		 494 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
495}
a9573556 496
7bd688cd
JN		 497static u32 i9xx_get_backlight(struct intel_connector *connector)
498{
499 struct drm_device *dev = connector->base.dev;
500 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 501 struct intel_panel *panel = &connector->panel;
7bd688cd 502 u32 val;
07bf139b 503
7bd688cd
JN		 504 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
505 if (INTEL_INFO(dev)->gen < 4)
506 val >>= 1;
ba3820ad 507
636baebf 508 if (panel->backlight.combination_mode) {
7bd688cd 509 u8 lbpc;
ba3820ad 510
7bd688cd
JN		 511 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
512 val *= lbpc;
a9573556
CW		 513 }
514
7bd688cd
JN		 515 return val;
516}
517
518static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
519{
520 struct drm_i915_private *dev_priv = dev->dev_private;
521
23ec0a88
VS		 522 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
523 return 0;
524
7bd688cd
JN		 525 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
526}
527
528static u32 vlv_get_backlight(struct intel_connector *connector)
529{
530 struct drm_device *dev = connector->base.dev;
531 enum pipe pipe = intel_get_pipe_from_connector(connector);
532
533 return _vlv_get_backlight(dev, pipe);
534}
535
0fb890c0
VK		 536static u32 bxt_get_backlight(struct intel_connector *connector)
537{
538 struct drm_device *dev = connector->base.dev;
539 struct drm_i915_private *dev_priv = dev->dev_private;
540
541 return I915_READ(BXT_BLC_PWM_DUTY1);
542}
543
b029e66f
SK		 544static u32 pwm_get_backlight(struct intel_connector *connector)
545{
546 struct intel_panel *panel = &connector->panel;
547 int duty_ns;
548
549 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
550 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
551}
552
7bd688cd
JN		 553static u32 intel_panel_get_backlight(struct intel_connector *connector)
554{
555 struct drm_device *dev = connector->base.dev;
556 struct drm_i915_private *dev_priv = dev->dev_private;
2d72f6c7
VS		 557 struct intel_panel *panel = &connector->panel;
558 u32 val = 0;
7bd688cd 559
07f11d49 560 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 561
2d72f6c7
VS		 562 if (panel->backlight.enabled) {
563 val = dev_priv->display.get_backlight(connector);
564 val = intel_panel_compute_brightness(connector, val);
565 }
8ba2d185 566
07f11d49 567 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 568
a9573556
CW		 569 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
570 return val;
571}
572
437b15b8 573static void lpt_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 574{
96ab4c70 575 struct drm_device *dev = connector->base.dev;
f8e10062
BW		 576 struct drm_i915_private *dev_priv = dev->dev_private;
577 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
578 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
579}
580
7bd688cd 581static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 582{
7bd688cd 583 struct drm_device *dev = connector->base.dev;
a9573556 584 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN		 585 u32 tmp;
586
587 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
588 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW		 589}
590
7bd688cd 591static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 592{
7bd688cd 593 struct drm_device *dev = connector->base.dev;
a9573556 594 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 595 struct intel_panel *panel = &connector->panel;
b329b328 596 u32 tmp, mask;
ba3820ad 597
f91c15e0
JN		 598 WARN_ON(panel->backlight.max == 0);
599
636baebf 600 if (panel->backlight.combination_mode) {
ba3820ad
TI		 601 u8 lbpc;
602
f91c15e0 603 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI		 604 level /= lbpc;
605 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
606 }
607
b329b328
JN		 608 if (IS_GEN4(dev)) {
609 mask = BACKLIGHT_DUTY_CYCLE_MASK;
610 } else {
a9573556 611 level <<= 1;
b329b328
JN		 612 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
613 }
7bd688cd 614
b329b328 615 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN		 616 I915_WRITE(BLC_PWM_CTL, tmp | level);
617}
618
619static void vlv_set_backlight(struct intel_connector *connector, u32 level)
620{
621 struct drm_device *dev = connector->base.dev;
622 struct drm_i915_private *dev_priv = dev->dev_private;
623 enum pipe pipe = intel_get_pipe_from_connector(connector);
624 u32 tmp;
625
23ec0a88
VS		 626 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
627 return;
628
7bd688cd
JN		 629 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
630 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
631}
632
0fb890c0
VK		 633static void bxt_set_backlight(struct intel_connector *connector, u32 level)
634{
635 struct drm_device *dev = connector->base.dev;
636 struct drm_i915_private *dev_priv = dev->dev_private;
637
638 I915_WRITE(BXT_BLC_PWM_DUTY1, level);
639}
640
b029e66f
SK		 641static void pwm_set_backlight(struct intel_connector *connector, u32 level)
642{
643 struct intel_panel *panel = &connector->panel;
644 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
645
646 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
647}
648
7bd688cd
JN		 649static void
650intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
651{
652 struct drm_device *dev = connector->base.dev;
653 struct drm_i915_private *dev_priv = dev->dev_private;
654
655 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
656
657 level = intel_panel_compute_brightness(connector, level);
658 dev_priv->display.set_backlight(connector, level);
a9573556 659}
47356eb6 660
6dda730e
JN		 661/* set backlight brightness to level in range [0..max], scaling wrt hw min */
662static void intel_panel_set_backlight(struct intel_connector *connector,
663 u32 user_level, u32 user_max)
47356eb6 664{
752aa88a 665 struct drm_device *dev = connector->base.dev;
47356eb6 666 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 667 struct intel_panel *panel = &connector->panel;
6dda730e 668 u32 hw_level;
8ba2d185 669
260d8f98 670 if (!panel->backlight.present)
752aa88a
JB		 671 return;
672
07f11d49 673 mutex_lock(&dev_priv->backlight_lock);
d6540632 674
f91c15e0 675 WARN_ON(panel->backlight.max == 0);
d6540632 676
6dda730e
JN		 677 hw_level = scale_user_to_hw(connector, user_level, user_max);
678 panel->backlight.level = hw_level;
679
680 if (panel->backlight.enabled)
681 intel_panel_actually_set_backlight(connector, hw_level);
682
07f11d49 683 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN		 684}
685
686/* set backlight brightness to level in range [0..max], assuming hw min is
687 * respected.
688 */
689void intel_panel_set_backlight_acpi(struct intel_connector *connector,
690 u32 user_level, u32 user_max)
691{
692 struct drm_device *dev = connector->base.dev;
693 struct drm_i915_private *dev_priv = dev->dev_private;
694 struct intel_panel *panel = &connector->panel;
695 enum pipe pipe = intel_get_pipe_from_connector(connector);
696 u32 hw_level;
6dda730e 697
260d8f98
VS		 698 /*
699 * INVALID_PIPE may occur during driver init because
700 * connection_mutex isn't held across the entire backlight
701 * setup + modeset readout, and the BIOS can issue the
702 * requests at any time.
703 */
6dda730e
JN		 704 if (!panel->backlight.present || pipe == INVALID_PIPE)
705 return;
706
07f11d49 707 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN		 708
709 WARN_ON(panel->backlight.max == 0);
710
711 hw_level = clamp_user_to_hw(connector, user_level, user_max);
712 panel->backlight.level = hw_level;
47356eb6 713
58c68779 714 if (panel->backlight.device)
6dda730e
JN		 715 panel->backlight.device->props.brightness =
716 scale_hw_to_user(connector,
717 panel->backlight.level,
718 panel->backlight.device->props.max_brightness);
b6b3ba5b 719
58c68779 720 if (panel->backlight.enabled)
6dda730e 721 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 722
07f11d49 723 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI		 724}
725
437b15b8
JN		 726static void lpt_disable_backlight(struct intel_connector *connector)
727{
728 struct drm_device *dev = connector->base.dev;
729 struct drm_i915_private *dev_priv = dev->dev_private;
730 u32 tmp;
731
732 intel_panel_actually_set_backlight(connector, 0);
733
734 tmp = I915_READ(BLC_PWM_PCH_CTL1);
735 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
736}
737
7bd688cd
JN		 738static void pch_disable_backlight(struct intel_connector *connector)
739{
740 struct drm_device *dev = connector->base.dev;
741 struct drm_i915_private *dev_priv = dev->dev_private;
742 u32 tmp;
743
3bd712e5
JN		 744 intel_panel_actually_set_backlight(connector, 0);
745
7bd688cd
JN		 746 tmp = I915_READ(BLC_PWM_CPU_CTL2);
747 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
748
749 tmp = I915_READ(BLC_PWM_PCH_CTL1);
750 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
751}
752
3bd712e5
JN		 753static void i9xx_disable_backlight(struct intel_connector *connector)
754{
755 intel_panel_actually_set_backlight(connector, 0);
756}
757
7bd688cd
JN		 758static void i965_disable_backlight(struct intel_connector *connector)
759{
760 struct drm_device *dev = connector->base.dev;
761 struct drm_i915_private *dev_priv = dev->dev_private;
762 u32 tmp;
763
3bd712e5
JN		 764 intel_panel_actually_set_backlight(connector, 0);
765
7bd688cd
JN		 766 tmp = I915_READ(BLC_PWM_CTL2);
767 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
768}
769
770static void vlv_disable_backlight(struct intel_connector *connector)
771{
772 struct drm_device *dev = connector->base.dev;
773 struct drm_i915_private *dev_priv = dev->dev_private;
774 enum pipe pipe = intel_get_pipe_from_connector(connector);
775 u32 tmp;
776
23ec0a88
VS		 777 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
778 return;
779
3bd712e5
JN		 780 intel_panel_actually_set_backlight(connector, 0);
781
7bd688cd
JN		 782 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
783 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
784}
785
0fb890c0
VK		 786static void bxt_disable_backlight(struct intel_connector *connector)
787{
788 struct drm_device *dev = connector->base.dev;
789 struct drm_i915_private *dev_priv = dev->dev_private;
790 u32 tmp;
791
792 intel_panel_actually_set_backlight(connector, 0);
793
794 tmp = I915_READ(BXT_BLC_PWM_CTL1);
795 I915_WRITE(BXT_BLC_PWM_CTL1, tmp & ~BXT_BLC_PWM_ENABLE);
796}
797
b029e66f
SK		 798static void pwm_disable_backlight(struct intel_connector *connector)
799{
800 struct intel_panel *panel = &connector->panel;
801
802 /* Disable the backlight */
803 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
804 usleep_range(2000, 3000);
805 pwm_disable(panel->backlight.pwm);
806}
807
752aa88a 808void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 809{
752aa88a 810 struct drm_device *dev = connector->base.dev;
f52c619a 811 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 812 struct intel_panel *panel = &connector->panel;
8ba2d185 813
260d8f98 814 if (!panel->backlight.present)
752aa88a
JB		 815 return;
816
3f577573 817 /*
5389e916 818 * Do not disable backlight on the vga_switcheroo path. When switching
3f577573
JN		 819 * away from i915, the other client may depend on i915 to handle the
820 * backlight. This will leave the backlight on unnecessarily when
821 * another client is not activated.
822 */
823 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
824 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
825 return;
826 }
827
07f11d49 828 mutex_lock(&dev_priv->backlight_lock);
47356eb6 829
ab656bb9
JN		 830 if (panel->backlight.device)
831 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 832 panel->backlight.enabled = false;
3bd712e5 833 dev_priv->display.disable_backlight(connector);
24ded204 834
07f11d49 835 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 836}
24ded204 837
437b15b8 838static void lpt_enable_backlight(struct intel_connector *connector)
96ab4c70
DV		 839{
840 struct drm_device *dev = connector->base.dev;
841 struct drm_i915_private *dev_priv = dev->dev_private;
842 struct intel_panel *panel = &connector->panel;
843 u32 pch_ctl1, pch_ctl2;
844
845 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
846 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
847 DRM_DEBUG_KMS("pch backlight already enabled\n");
848 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
849 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
850 }
24ded204 851
96ab4c70
DV		 852 pch_ctl2 = panel->backlight.max << 16;
853 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 854
96ab4c70
DV		 855 pch_ctl1 = 0;
856 if (panel->backlight.active_low_pwm)
857 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 858
e6b2627c
JN		 859 /* After LPT, override is the default. */
860 if (HAS_PCH_LPT(dev_priv))
861 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
96ab4c70
DV		 862
863 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
864 POSTING_READ(BLC_PWM_PCH_CTL1);
865 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
866
867 /* This won't stick until the above enable. */
868 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW		 869}
870
7bd688cd
JN		 871static void pch_enable_backlight(struct intel_connector *connector)
872{
873 struct drm_device *dev = connector->base.dev;
874 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 875 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 876 enum pipe pipe = intel_get_pipe_from_connector(connector);
877 enum transcoder cpu_transcoder =
878 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 879 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 880
b35684b8
JN		 881 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
882 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 883 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN		 884 cpu_ctl2 &= ~BLM_PWM_ENABLE;
885 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
886 }
7bd688cd 887
b35684b8
JN		 888 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
889 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
890 DRM_DEBUG_KMS("pch backlight already enabled\n");
891 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
892 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
893 }
7bd688cd
JN		 894
895 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 896 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 897 else
b35684b8
JN		 898 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
899 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 900 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 901 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 902
b35684b8 903 /* This won't stick until the above enable. */
3bd712e5 904 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN		 905
906 pch_ctl2 = panel->backlight.max << 16;
907 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
908
b35684b8
JN		 909 pch_ctl1 = 0;
910 if (panel->backlight.active_low_pwm)
911 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 912
b35684b8
JN		 913 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
914 POSTING_READ(BLC_PWM_PCH_CTL1);
915 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN		 916}
917
918static void i9xx_enable_backlight(struct intel_connector *connector)
919{
b35684b8
JN		 920 struct drm_device *dev = connector->base.dev;
921 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 922 struct intel_panel *panel = &connector->panel;
b35684b8
JN		 923 u32 ctl, freq;
924
925 ctl = I915_READ(BLC_PWM_CTL);
926 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 927 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 928 I915_WRITE(BLC_PWM_CTL, 0);
929 }
3bd712e5 930
b35684b8
JN		 931 freq = panel->backlight.max;
932 if (panel->backlight.combination_mode)
933 freq /= 0xff;
934
935 ctl = freq << 17;
b6ab66aa 936 if (panel->backlight.combination_mode)
b35684b8
JN		 937 ctl |= BLM_LEGACY_MODE;
938 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
939 ctl |= BLM_POLARITY_PNV;
940
941 I915_WRITE(BLC_PWM_CTL, ctl);
942 POSTING_READ(BLC_PWM_CTL);
943
944 /* XXX: combine this into above write? */
3bd712e5 945 intel_panel_actually_set_backlight(connector, panel->backlight.level);
2059ac3b
JN		 946
947 /*
948 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
949 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
950 * that has backlight.
951 */
952 if (IS_GEN2(dev))
953 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
7bd688cd 954}
8ba2d185 955
7bd688cd
JN		 956static void i965_enable_backlight(struct intel_connector *connector)
957{
958 struct drm_device *dev = connector->base.dev;
959 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 960 struct intel_panel *panel = &connector->panel;
7bd688cd 961 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 962 u32 ctl, ctl2, freq;
7bd688cd 963
b35684b8
JN		 964 ctl2 = I915_READ(BLC_PWM_CTL2);
965 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 966 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 967 ctl2 &= ~BLM_PWM_ENABLE;
968 I915_WRITE(BLC_PWM_CTL2, ctl2);
969 }
7bd688cd 970
b35684b8
JN		 971 freq = panel->backlight.max;
972 if (panel->backlight.combination_mode)
973 freq /= 0xff;
7bd688cd 974
b35684b8
JN		 975 ctl = freq << 16;
976 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 977
b35684b8
JN		 978 ctl2 = BLM_PIPE(pipe);
979 if (panel->backlight.combination_mode)
980 ctl2 |= BLM_COMBINATION_MODE;
981 if (panel->backlight.active_low_pwm)
982 ctl2 |= BLM_POLARITY_I965;
983 I915_WRITE(BLC_PWM_CTL2, ctl2);
984 POSTING_READ(BLC_PWM_CTL2);
985 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN		 986
987 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN		 988}
989
990static void vlv_enable_backlight(struct intel_connector *connector)
991{
992 struct drm_device *dev = connector->base.dev;
993 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 994 struct intel_panel *panel = &connector->panel;
7bd688cd 995 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 996 u32 ctl, ctl2;
7bd688cd 997
23ec0a88
VS		 998 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
999 return;
1000
b35684b8
JN		 1001 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1002 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 1003 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 1004 ctl2 &= ~BLM_PWM_ENABLE;
1005 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1006 }
7bd688cd 1007
b35684b8
JN		 1008 ctl = panel->backlight.max << 16;
1009 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 1010
b35684b8
JN		 1011 /* XXX: combine this into above write? */
1012 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 1013
b35684b8
JN		 1014 ctl2 = 0;
1015 if (panel->backlight.active_low_pwm)
1016 ctl2 |= BLM_POLARITY_I965;
1017 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 1018 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 1019 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW		 1020}
1021
0fb890c0
VK		 1022static void bxt_enable_backlight(struct intel_connector *connector)
1023{
1024 struct drm_device *dev = connector->base.dev;
1025 struct drm_i915_private *dev_priv = dev->dev_private;
1026 struct intel_panel *panel = &connector->panel;
1027 u32 pwm_ctl;
1028
1029 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1030 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1031 DRM_DEBUG_KMS("backlight already enabled\n");
1032 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1033 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1034 }
1035
1036 I915_WRITE(BXT_BLC_PWM_FREQ1, panel->backlight.max);
1037
1038 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1039
1040 pwm_ctl = 0;
1041 if (panel->backlight.active_low_pwm)
1042 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1043
1044 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1045 POSTING_READ(BXT_BLC_PWM_CTL1);
1046 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl | BXT_BLC_PWM_ENABLE);
1047}
1048
b029e66f
SK		 1049static void pwm_enable_backlight(struct intel_connector *connector)
1050{
1051 struct intel_panel *panel = &connector->panel;
1052
1053 pwm_enable(panel->backlight.pwm);
1054 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1055}
1056
752aa88a 1057void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 1058{
752aa88a 1059 struct drm_device *dev = connector->base.dev;
47356eb6 1060 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 1061 struct intel_panel *panel = &connector->panel;
752aa88a 1062 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 1063
260d8f98 1064 if (!panel->backlight.present)
752aa88a
JB		 1065 return;
1066
6f2bcceb 1067 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 1068
07f11d49 1069 mutex_lock(&dev_priv->backlight_lock);
47356eb6 1070
f91c15e0
JN		 1071 WARN_ON(panel->backlight.max == 0);
1072
13f3fbe8 1073 if (panel->backlight.level <= panel->backlight.min) {
f91c15e0 1074 panel->backlight.level = panel->backlight.max;
58c68779
JN		 1075 if (panel->backlight.device)
1076 panel->backlight.device->props.brightness =
6dda730e
JN		 1077 scale_hw_to_user(connector,
1078 panel->backlight.level,
1079 panel->backlight.device->props.max_brightness);
b6b3ba5b 1080 }
47356eb6 1081
3bd712e5 1082 dev_priv->display.enable_backlight(connector);
58c68779 1083 panel->backlight.enabled = true;
ab656bb9
JN		 1084 if (panel->backlight.device)
1085 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 1086
07f11d49 1087 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW		 1088}
1089
912e8b12 1090#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 1091static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 1092{
752aa88a 1093 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 1094 struct intel_panel *panel = &connector->panel;
752aa88a
JB		 1095 struct drm_device *dev = connector->base.dev;
1096
51fd371b 1097 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW		 1098 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1099 bd->props.brightness, bd->props.max_brightness);
752aa88a 1100 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 1101 bd->props.max_brightness);
ab656bb9
JN		 1102
1103 /*
1104 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1105 * backlight class device does not make it easy to to differentiate
1106 * between callbacks for brightness and bl_power, so our backlight_power
1107 * callback needs to take this into account.
1108 */
1109 if (panel->backlight.enabled) {
1110 if (panel->backlight_power) {
e6755fb7
JN		 1111 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1112 bd->props.brightness != 0;
ab656bb9
JN		 1113 panel->backlight_power(connector, enable);
1114 }
1115 } else {
1116 bd->props.power = FB_BLANK_POWERDOWN;
1117 }
1118
51fd371b 1119 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG		 1120 return 0;
1121}
1122
db31af1d 1123static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1124{
752aa88a
JB		 1125 struct intel_connector *connector = bl_get_data(bd);
1126 struct drm_device *dev = connector->base.dev;
c8c8fb33 1127 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1128 u32 hw_level;
7bd688cd 1129 int ret;
752aa88a 1130
c8c8fb33 1131 intel_runtime_pm_get(dev_priv);
51fd371b 1132 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN		 1133
1134 hw_level = intel_panel_get_backlight(connector);
1135 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1136
51fd371b 1137 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1138 intel_runtime_pm_put(dev_priv);
752aa88a 1139
7bd688cd 1140 return ret;
aaa6fd2a
MG		 1141}
1142
db31af1d
JN		 1143static const struct backlight_ops intel_backlight_device_ops = {
1144 .update_status = intel_backlight_device_update_status,
1145 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG		 1146};
1147
db31af1d 1148static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1149{
58c68779 1150 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1151 struct backlight_properties props;
aaa6fd2a 1152
58c68779 1153 if (WARN_ON(panel->backlight.device))
dc652f90
JN		 1154 return -ENODEV;
1155
0962c3c9
VS		 1156 if (!panel->backlight.present)
1157 return 0;
1158
6dda730e 1159 WARN_ON(panel->backlight.max == 0);
7bd688cd 1160
af437cfd 1161 memset(&props, 0, sizeof(props));
aaa6fd2a 1162 props.type = BACKLIGHT_RAW;
6dda730e
JN		 1163
1164 /*
1165 * Note: Everything should work even if the backlight device max
1166 * presented to the userspace is arbitrarily chosen.
1167 */
7bd688cd 1168 props.max_brightness = panel->backlight.max;
6dda730e
JN		 1169 props.brightness = scale_hw_to_user(connector,
1170 panel->backlight.level,
1171 props.max_brightness);
58c68779 1172
ab656bb9
JN		 1173 if (panel->backlight.enabled)
1174 props.power = FB_BLANK_UNBLANK;
1175 else
1176 props.power = FB_BLANK_POWERDOWN;
1177
58c68779
JN		 1178 /*
1179 * Note: using the same name independent of the connector prevents
1180 * registration of multiple backlight devices in the driver.
1181 */
1182 panel->backlight.device =
aaa6fd2a 1183 backlight_device_register("intel_backlight",
db31af1d
JN		 1184 connector->base.kdev,
1185 connector,
1186 &intel_backlight_device_ops, &props);
aaa6fd2a 1187
58c68779 1188 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1189 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN		 1190 PTR_ERR(panel->backlight.device));
1191 panel->backlight.device = NULL;
aaa6fd2a
MG		 1192 return -ENODEV;
1193 }
0962c3c9
VS		 1194
1195 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1196 connector->base.name);
1197
aaa6fd2a
MG		 1198 return 0;
1199}
1200
db31af1d 1201static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1202{
58c68779
JN		 1203 struct intel_panel *panel = &connector->panel;
1204
1205 if (panel->backlight.device) {
1206 backlight_device_unregister(panel->backlight.device);
1207 panel->backlight.device = NULL;
dc652f90 1208 }
aaa6fd2a 1209}
db31af1d
JN		 1210#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1211static int intel_backlight_device_register(struct intel_connector *connector)
1212{
1213 return 0;
1214}
1215static void intel_backlight_device_unregister(struct intel_connector *connector)
1216{
1217}
1218#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1219
f91c15e0 1220/*
aa17cdb4
JN		 1221 * SPT: This value represents the period of the PWM stream in clock periods
1222 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1223 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1224 */
1225static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1226{
1227 struct drm_device *dev = connector->base.dev;
1228 struct drm_i915_private *dev_priv = dev->dev_private;
1229 u32 mul, clock;
1230
1231 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1232 mul = 128;
1233 else
1234 mul = 16;
1235
1236 clock = MHz(24);
1237
1238 return clock / (pwm_freq_hz * mul);
1239}
1240
1241/*
1242 * LPT: This value represents the period of the PWM stream in clock periods
1243 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1244 * LPT SOUTH_CHICKEN2 register bit 5).
1245 */
1246static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1247{
1248 struct drm_device *dev = connector->base.dev;
1249 struct drm_i915_private *dev_priv = dev->dev_private;
1250 u32 mul, clock;
1251
1252 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1253 mul = 16;
1254 else
1255 mul = 128;
1256
1257 if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
1258 clock = MHz(135); /* LPT:H */
1259 else
1260 clock = MHz(24); /* LPT:LP */
1261
1262 return clock / (pwm_freq_hz * mul);
1263}
1264
1265/*
1266 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1267 * display raw clocks multiplied by 128.
1268 */
1269static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1270{
1271 struct drm_device *dev = connector->base.dev;
1272 int clock = MHz(intel_pch_rawclk(dev));
1273
1274 return clock / (pwm_freq_hz * 128);
1275}
1276
1277/*
1278 * Gen2: This field determines the number of time base events (display core
1279 * clock frequency/32) in total for a complete cycle of modulated backlight
1280 * control.
f91c15e0 1281 *
aa17cdb4
JN		 1282 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1283 * divided by 32.
1284 */
1285static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1286{
1287 struct drm_device *dev = connector->base.dev;
1288 struct drm_i915_private *dev_priv = dev->dev_private;
1289 int clock;
1290
1291 if (IS_PINEVIEW(dev))
1292 clock = intel_hrawclk(dev);
1293 else
1294 clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1295
1296 return clock / (pwm_freq_hz * 32);
1297}
1298
1299/*
1300 * Gen4: This value represents the period of the PWM stream in display core
1301 * clocks multiplied by 128.
1302 */
1303static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1304{
1305 struct drm_device *dev = connector->base.dev;
1306 struct drm_i915_private *dev_priv = dev->dev_private;
1307 int clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1308
1309 return clock / (pwm_freq_hz * 128);
1310}
1311
1312/*
1313 * VLV: This value represents the period of the PWM stream in display core
1314 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1315 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1316 */
1317static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1318{
1319 struct drm_device *dev = connector->base.dev;
1320 struct drm_i915_private *dev_priv = dev->dev_private;
1321 int clock;
1322
1323 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1324 if (IS_CHERRYVIEW(dev))
1325 return KHz(19200) / (pwm_freq_hz * 16);
1326 else
1327 return MHz(25) / (pwm_freq_hz * 16);
1328 } else {
1329 clock = intel_hrawclk(dev);
1330 return MHz(clock) / (pwm_freq_hz * 128);
1331 }
1332}
1333
1334static u32 get_backlight_max_vbt(struct intel_connector *connector)
1335{
1336 struct drm_device *dev = connector->base.dev;
1337 struct drm_i915_private *dev_priv = dev->dev_private;
1338 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1339 u32 pwm;
1340
1341 if (!pwm_freq_hz) {
1342 DRM_DEBUG_KMS("backlight frequency not specified in VBT\n");
1343 return 0;
1344 }
1345
1346 if (!dev_priv->display.backlight_hz_to_pwm) {
1347 DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n");
1348 return 0;
1349 }
1350
1351 pwm = dev_priv->display.backlight_hz_to_pwm(connector, pwm_freq_hz);
1352 if (!pwm) {
1353 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1354 return 0;
1355 }
1356
1357 DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz);
1358
1359 return pwm;
1360}
1361
1362/*
1363 * Note: The setup hooks can't assume pipe is set!
f91c15e0 1364 */
6dda730e
JN		 1365static u32 get_backlight_min_vbt(struct intel_connector *connector)
1366{
1367 struct drm_device *dev = connector->base.dev;
1368 struct drm_i915_private *dev_priv = dev->dev_private;
1369 struct intel_panel *panel = &connector->panel;
e1c412e7 1370 int min;
6dda730e
JN		 1371
1372 WARN_ON(panel->backlight.max == 0);
1373
e1c412e7
JN		 1374 /*
1375 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1376 * to problems. There are such machines out there. Either our
1377 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1378 * against this by letting the minimum be at most (arbitrarily chosen)
1379 * 25% of the max.
1380 */
1381 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1382 if (min != dev_priv->vbt.backlight.min_brightness) {
1383 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1384 dev_priv->vbt.backlight.min_brightness, min);
1385 }
1386
6dda730e 1387 /* vbt value is a coefficient in range [0..255] */
e1c412e7 1388 return scale(min, 0, 255, 0, panel->backlight.max);
6dda730e
JN		 1389}
1390
437b15b8 1391static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
aaa6fd2a 1392{
96ab4c70 1393 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1394 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV		 1395 struct intel_panel *panel = &connector->panel;
1396 u32 pch_ctl1, pch_ctl2, val;
1397
1398 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1399 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1400
1401 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1402 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN		 1403
1404 if (!panel->backlight.max)
1405 panel->backlight.max = get_backlight_max_vbt(connector);
1406
96ab4c70
DV		 1407 if (!panel->backlight.max)
1408 return -ENODEV;
1409
6dda730e
JN		 1410 panel->backlight.min = get_backlight_min_vbt(connector);
1411
437b15b8 1412 val = lpt_get_backlight(connector);
96ab4c70
DV		 1413 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1414
1415 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1416 panel->backlight.level != 0;
1417
1418 return 0;
1419}
1420
6517d273 1421static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1422{
636baebf
JN		 1423 struct drm_device *dev = connector->base.dev;
1424 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1425 struct intel_panel *panel = &connector->panel;
636baebf 1426 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1427
636baebf
JN		 1428 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1429 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1430
1431 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1432 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN		 1433
1434 if (!panel->backlight.max)
1435 panel->backlight.max = get_backlight_max_vbt(connector);
1436
7bd688cd
JN		 1437 if (!panel->backlight.max)
1438 return -ENODEV;
1439
6dda730e
JN		 1440 panel->backlight.min = get_backlight_min_vbt(connector);
1441
7bd688cd
JN		 1442 val = pch_get_backlight(connector);
1443 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1444
636baebf
JN		 1445 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1446 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1447 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1448
7bd688cd
JN		 1449 return 0;
1450}
1451
6517d273 1452static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1453{
636baebf
JN		 1454 struct drm_device *dev = connector->base.dev;
1455 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1456 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1457 u32 ctl, val;
1458
1459 ctl = I915_READ(BLC_PWM_CTL);
1460
b6ab66aa 1461 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
636baebf
JN		 1462 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1463
1464 if (IS_PINEVIEW(dev))
1465 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1466
1467 panel->backlight.max = ctl >> 17;
aa17cdb4
JN		 1468
1469 if (!panel->backlight.max) {
1470 panel->backlight.max = get_backlight_max_vbt(connector);
1471 panel->backlight.max >>= 1;
1472 }
7bd688cd 1473
7bd688cd
JN		 1474 if (!panel->backlight.max)
1475 return -ENODEV;
1476
aa17cdb4
JN		 1477 if (panel->backlight.combination_mode)
1478 panel->backlight.max *= 0xff;
1479
6dda730e
JN		 1480 panel->backlight.min = get_backlight_min_vbt(connector);
1481
7bd688cd
JN		 1482 val = i9xx_get_backlight(connector);
1483 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1484
636baebf
JN		 1485 panel->backlight.enabled = panel->backlight.level != 0;
1486
7bd688cd
JN		 1487 return 0;
1488}
1489
6517d273 1490static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1491{
636baebf
JN		 1492 struct drm_device *dev = connector->base.dev;
1493 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1494 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1495 u32 ctl, ctl2, val;
1496
1497 ctl2 = I915_READ(BLC_PWM_CTL2);
1498 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1499 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1500
1501 ctl = I915_READ(BLC_PWM_CTL);
1502 panel->backlight.max = ctl >> 16;
aa17cdb4
JN		 1503
1504 if (!panel->backlight.max)
1505 panel->backlight.max = get_backlight_max_vbt(connector);
7bd688cd 1506
7bd688cd
JN		 1507 if (!panel->backlight.max)
1508 return -ENODEV;
1509
aa17cdb4
JN		 1510 if (panel->backlight.combination_mode)
1511 panel->backlight.max *= 0xff;
1512
6dda730e
JN		 1513 panel->backlight.min = get_backlight_min_vbt(connector);
1514
7bd688cd
JN		 1515 val = i9xx_get_backlight(connector);
1516 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1517
636baebf
JN		 1518 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1519 panel->backlight.level != 0;
1520
7bd688cd
JN		 1521 return 0;
1522}
1523
6517d273 1524static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
7bd688cd
JN		 1525{
1526 struct drm_device *dev = connector->base.dev;
1527 struct drm_i915_private *dev_priv = dev->dev_private;
1528 struct intel_panel *panel = &connector->panel;
636baebf 1529 u32 ctl, ctl2, val;
7bd688cd 1530
6517d273
VS		 1531 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1532 return -ENODEV;
1533
1534 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
636baebf
JN		 1535 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1536
6517d273 1537 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
636baebf 1538 panel->backlight.max = ctl >> 16;
aa17cdb4
JN		 1539
1540 if (!panel->backlight.max)
1541 panel->backlight.max = get_backlight_max_vbt(connector);
1542
7bd688cd
JN		 1543 if (!panel->backlight.max)
1544 return -ENODEV;
1545
6dda730e
JN		 1546 panel->backlight.min = get_backlight_min_vbt(connector);
1547
6517d273 1548 val = _vlv_get_backlight(dev, pipe);
7bd688cd
JN		 1549 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1550
636baebf
JN		 1551 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1552 panel->backlight.level != 0;
1553
7bd688cd
JN		 1554 return 0;
1555}
1556
0fb890c0
VK		 1557static int
1558bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1559{
1560 struct drm_device *dev = connector->base.dev;
1561 struct drm_i915_private *dev_priv = dev->dev_private;
1562 struct intel_panel *panel = &connector->panel;
1563 u32 pwm_ctl, val;
1564
1565 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1566 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1567
1568 panel->backlight.max = I915_READ(BXT_BLC_PWM_FREQ1);
aa17cdb4
JN		 1569
1570 if (!panel->backlight.max)
1571 panel->backlight.max = get_backlight_max_vbt(connector);
1572
0fb890c0
VK		 1573 if (!panel->backlight.max)
1574 return -ENODEV;
1575
1576 val = bxt_get_backlight(connector);
1577 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1578
1579 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1580 panel->backlight.level != 0;
1581
1582 return 0;
1583}
1584
b029e66f
SK		 1585static int pwm_setup_backlight(struct intel_connector *connector,
1586 enum pipe pipe)
1587{
1588 struct drm_device *dev = connector->base.dev;
1589 struct intel_panel *panel = &connector->panel;
1590 int retval;
1591
1592 /* Get the PWM chip for backlight control */
1593 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1594 if (IS_ERR(panel->backlight.pwm)) {
1595 DRM_ERROR("Failed to own the pwm chip\n");
1596 panel->backlight.pwm = NULL;
1597 return -ENODEV;
1598 }
1599
1600 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1601 CRC_PMIC_PWM_PERIOD_NS);
1602 if (retval < 0) {
1603 DRM_ERROR("Failed to configure the pwm chip\n");
1604 pwm_put(panel->backlight.pwm);
1605 panel->backlight.pwm = NULL;
1606 return retval;
1607 }
1608
1609 panel->backlight.min = 0; /* 0% */
1610 panel->backlight.max = 100; /* 100% */
1611 panel->backlight.level = DIV_ROUND_UP(
1612 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1613 CRC_PMIC_PWM_PERIOD_NS);
1614 panel->backlight.enabled = panel->backlight.level != 0;
1615
1616 return 0;
1617}
1618
6517d273 1619int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
aaa6fd2a 1620{
db31af1d 1621 struct drm_device *dev = connector->dev;
7bd688cd 1622 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1623 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1624 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1625 int ret;
db31af1d 1626
c675949e 1627 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD		 1628 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1629 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1630 } else {
1631 DRM_DEBUG_KMS("no backlight present per VBT\n");
1632 return 0;
1633 }
c675949e
JN		 1634 }
1635
7bd688cd 1636 /* set level and max in panel struct */
07f11d49 1637 mutex_lock(&dev_priv->backlight_lock);
6517d273 1638 ret = dev_priv->display.setup_backlight(intel_connector, pipe);
07f11d49 1639 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd
JN		 1640
1641 if (ret) {
1642 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1643 connector->name);
7bd688cd
JN		 1644 return ret;
1645 }
db31af1d 1646
c91c9f32
JN		 1647 panel->backlight.present = true;
1648
0962c3c9
VS		 1649 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1650 connector->name,
c445b3b1 1651 panel->backlight.enabled ? "enabled" : "disabled",
0962c3c9 1652 panel->backlight.level, panel->backlight.max);
c445b3b1 1653
aaa6fd2a
MG		 1654 return 0;
1655}
1656
db31af1d 1657void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1658{
db31af1d 1659 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1660 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1661
b029e66f
SK		 1662 /* dispose of the pwm */
1663 if (panel->backlight.pwm)
1664 pwm_put(panel->backlight.pwm);
1665
c91c9f32 1666 panel->backlight.present = false;
aaa6fd2a 1667}
1d508706 1668
7bd688cd
JN		 1669/* Set up chip specific backlight functions */
1670void intel_panel_init_backlight_funcs(struct drm_device *dev)
1671{
1672 struct drm_i915_private *dev_priv = dev->dev_private;
1673
0fb890c0
VK		 1674 if (IS_BROXTON(dev)) {
1675 dev_priv->display.setup_backlight = bxt_setup_backlight;
1676 dev_priv->display.enable_backlight = bxt_enable_backlight;
1677 dev_priv->display.disable_backlight = bxt_disable_backlight;
1678 dev_priv->display.set_backlight = bxt_set_backlight;
1679 dev_priv->display.get_backlight = bxt_get_backlight;
437b15b8
JN		 1680 } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
1681 dev_priv->display.setup_backlight = lpt_setup_backlight;
1682 dev_priv->display.enable_backlight = lpt_enable_backlight;
1683 dev_priv->display.disable_backlight = lpt_disable_backlight;
1684 dev_priv->display.set_backlight = lpt_set_backlight;
1685 dev_priv->display.get_backlight = lpt_get_backlight;
aa17cdb4
JN		 1686 if (HAS_PCH_LPT(dev))
1687 dev_priv->display.backlight_hz_to_pwm = lpt_hz_to_pwm;
1688 else
1689 dev_priv->display.backlight_hz_to_pwm = spt_hz_to_pwm;
96ab4c70 1690 } else if (HAS_PCH_SPLIT(dev)) {
7bd688cd
JN		 1691 dev_priv->display.setup_backlight = pch_setup_backlight;
1692 dev_priv->display.enable_backlight = pch_enable_backlight;
1693 dev_priv->display.disable_backlight = pch_disable_backlight;
1694 dev_priv->display.set_backlight = pch_set_backlight;
1695 dev_priv->display.get_backlight = pch_get_backlight;
aa17cdb4 1696 dev_priv->display.backlight_hz_to_pwm = pch_hz_to_pwm;
7bd688cd 1697 } else if (IS_VALLEYVIEW(dev)) {
b029e66f
SK		 1698 if (dev_priv->vbt.has_mipi) {
1699 dev_priv->display.setup_backlight = pwm_setup_backlight;
1700 dev_priv->display.enable_backlight = pwm_enable_backlight;
1701 dev_priv->display.disable_backlight = pwm_disable_backlight;
1702 dev_priv->display.set_backlight = pwm_set_backlight;
1703 dev_priv->display.get_backlight = pwm_get_backlight;
1704 } else {
1705 dev_priv->display.setup_backlight = vlv_setup_backlight;
1706 dev_priv->display.enable_backlight = vlv_enable_backlight;
1707 dev_priv->display.disable_backlight = vlv_disable_backlight;
1708 dev_priv->display.set_backlight = vlv_set_backlight;
1709 dev_priv->display.get_backlight = vlv_get_backlight;
aa17cdb4 1710 dev_priv->display.backlight_hz_to_pwm = vlv_hz_to_pwm;
b029e66f 1711 }
7bd688cd
JN		 1712 } else if (IS_GEN4(dev)) {
1713 dev_priv->display.setup_backlight = i965_setup_backlight;
1714 dev_priv->display.enable_backlight = i965_enable_backlight;
1715 dev_priv->display.disable_backlight = i965_disable_backlight;
1716 dev_priv->display.set_backlight = i9xx_set_backlight;
1717 dev_priv->display.get_backlight = i9xx_get_backlight;
aa17cdb4 1718 dev_priv->display.backlight_hz_to_pwm = i965_hz_to_pwm;
7bd688cd
JN		 1719 } else {
1720 dev_priv->display.setup_backlight = i9xx_setup_backlight;
3bd712e5
JN		 1721 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1722 dev_priv->display.disable_backlight = i9xx_disable_backlight;
7bd688cd
JN		 1723 dev_priv->display.set_backlight = i9xx_set_backlight;
1724 dev_priv->display.get_backlight = i9xx_get_backlight;
aa17cdb4 1725 dev_priv->display.backlight_hz_to_pwm = i9xx_hz_to_pwm;
7bd688cd
JN		 1726 }
1727}
1728
dd06f90e 1729int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK		 1730 struct drm_display_mode *fixed_mode,
1731 struct drm_display_mode *downclock_mode)
1d508706 1732{
dd06f90e 1733 panel->fixed_mode = fixed_mode;
4b6ed685 1734 panel->downclock_mode = downclock_mode;
dd06f90e 1735
1d508706
JN		 1736 return 0;
1737}
1738
1739void intel_panel_fini(struct intel_panel *panel)
1740{
dd06f90e
JN		 1741 struct intel_connector *intel_connector =
1742 container_of(panel, struct intel_connector, panel);
1743
1744 if (panel->fixed_mode)
1745 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK		 1746
1747 if (panel->downclock_mode)
1748 drm_mode_destroy(intel_connector->base.dev,
1749 panel->downclock_mode);
1d508706 1750}
0962c3c9
VS		 1751
1752void intel_backlight_register(struct drm_device *dev)
1753{
1754 struct intel_connector *connector;
1755
1756 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1757 intel_backlight_device_register(connector);
1758}
1759
1760void intel_backlight_unregister(struct drm_device *dev)
1761{
1762 struct intel_connector *connector;
1763
1764 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1765 intel_backlight_device_unregister(connector);
1766}
Linux kernel - Deliverables
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