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drm/i915/bxt: Clean up bxt_init_clock_gating
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW		 1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP		 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
f766093e 33#include <linux/kernel.h>
7bd90909 34#include <linux/moduleparam.h>
b029e66f 35#include <linux/pwm.h>
1d8e1c75
CW		 36#include "intel_drv.h"
37
b029e66f
SK		 38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
1d8e1c75 40void
4c6df4b4 41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW		 42 struct drm_display_mode *adjusted_mode)
43{
4c6df4b4 44 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID		 45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW		 47}
48
525997e0
JN		 49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev: drm device
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
59intel_find_panel_downclock(struct drm_device *dev,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(dev, tmp_mode);
98 else
99 return NULL;
100}
101
1d8e1c75
CW		 102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
b074cec8 104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 105 struct intel_crtc_state *pipe_config,
b074cec8 106 int fitting_mode)
1d8e1c75 107{
37327abd 108 struct drm_display_mode *adjusted_mode;
1d8e1c75
CW		 109 int x, y, width, height;
110
2d112de7 111 adjusted_mode = &pipe_config->base.adjusted_mode;
b074cec8 112
1d8e1c75
CW		 113 x = y = width = height = 0;
114
115 /* Native modes don't need fitting */
37327abd
VS		 116 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
117 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW		 118 goto done;
119
120 switch (fitting_mode) {
121 case DRM_MODE_SCALE_CENTER:
37327abd
VS		 122 width = pipe_config->pipe_src_w;
123 height = pipe_config->pipe_src_h;
1d8e1c75
CW		 124 x = (adjusted_mode->hdisplay - width + 1)/2;
125 y = (adjusted_mode->vdisplay - height + 1)/2;
126 break;
127
128 case DRM_MODE_SCALE_ASPECT:
129 /* Scale but preserve the aspect ratio */
130 {
9084e7d2
DV		 131 u32 scaled_width = adjusted_mode->hdisplay
132 * pipe_config->pipe_src_h;
133 u32 scaled_height = pipe_config->pipe_src_w
134 * adjusted_mode->vdisplay;
1d8e1c75 135 if (scaled_width > scaled_height) { /* pillar */
37327abd 136 width = scaled_height / pipe_config->pipe_src_h;
302983e9 137 if (width & 1)
0206e353 138 width++;
1d8e1c75
CW		 139 x = (adjusted_mode->hdisplay - width + 1) / 2;
140 y = 0;
141 height = adjusted_mode->vdisplay;
142 } else if (scaled_width < scaled_height) { /* letter */
37327abd 143 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ		 144 if (height & 1)
145 height++;
1d8e1c75
CW		 146 y = (adjusted_mode->vdisplay - height + 1) / 2;
147 x = 0;
148 width = adjusted_mode->hdisplay;
149 } else {
150 x = y = 0;
151 width = adjusted_mode->hdisplay;
152 height = adjusted_mode->vdisplay;
153 }
154 }
155 break;
156
1d8e1c75
CW		 157 case DRM_MODE_SCALE_FULLSCREEN:
158 x = y = 0;
159 width = adjusted_mode->hdisplay;
160 height = adjusted_mode->vdisplay;
161 break;
ab3e67f4
JB		 162
163 default:
164 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
165 return;
1d8e1c75
CW		 166 }
167
168done:
b074cec8
JB		 169 pipe_config->pch_pfit.pos = (x << 16) | y;
170 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 171 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 172}
a9573556 173
2dd24552
JB		 174static void
175centre_horizontally(struct drm_display_mode *mode,
176 int width)
177{
178 u32 border, sync_pos, blank_width, sync_width;
179
180 /* keep the hsync and hblank widths constant */
181 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
182 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
183 sync_pos = (blank_width - sync_width + 1) / 2;
184
185 border = (mode->hdisplay - width + 1) / 2;
186 border += border & 1; /* make the border even */
187
188 mode->crtc_hdisplay = width;
189 mode->crtc_hblank_start = width + border;
190 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
191
192 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
193 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
194}
195
196static void
197centre_vertically(struct drm_display_mode *mode,
198 int height)
199{
200 u32 border, sync_pos, blank_width, sync_width;
201
202 /* keep the vsync and vblank widths constant */
203 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
204 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
205 sync_pos = (blank_width - sync_width + 1) / 2;
206
207 border = (mode->vdisplay - height + 1) / 2;
208
209 mode->crtc_vdisplay = height;
210 mode->crtc_vblank_start = height + border;
211 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
212
213 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
214 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
215}
216
217static inline u32 panel_fitter_scaling(u32 source, u32 target)
218{
219 /*
220 * Floating point operation is not supported. So the FACTOR
221 * is defined, which can avoid the floating point computation
222 * when calculating the panel ratio.
223 */
224#define ACCURACY 12
225#define FACTOR (1 << ACCURACY)
226 u32 ratio = source * FACTOR / target;
227 return (FACTOR * ratio + FACTOR/2) / FACTOR;
228}
229
5cec258b 230static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 231 u32 *pfit_control)
232{
2d112de7 233 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
9084e7d2
DV		 234 u32 scaled_width = adjusted_mode->hdisplay *
235 pipe_config->pipe_src_h;
236 u32 scaled_height = pipe_config->pipe_src_w *
237 adjusted_mode->vdisplay;
238
239 /* 965+ is easy, it does everything in hw */
240 if (scaled_width > scaled_height)
241 *pfit_control |= PFIT_ENABLE |
242 PFIT_SCALING_PILLAR;
243 else if (scaled_width < scaled_height)
244 *pfit_control |= PFIT_ENABLE |
245 PFIT_SCALING_LETTER;
246 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
247 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
248}
249
5cec258b 250static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 251 u32 *pfit_control, u32 *pfit_pgm_ratios,
252 u32 *border)
253{
2d112de7 254 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
9084e7d2
DV		 255 u32 scaled_width = adjusted_mode->hdisplay *
256 pipe_config->pipe_src_h;
257 u32 scaled_height = pipe_config->pipe_src_w *
258 adjusted_mode->vdisplay;
259 u32 bits;
260
261 /*
262 * For earlier chips we have to calculate the scaling
263 * ratio by hand and program it into the
264 * PFIT_PGM_RATIO register
265 */
266 if (scaled_width > scaled_height) { /* pillar */
267 centre_horizontally(adjusted_mode,
268 scaled_height /
269 pipe_config->pipe_src_h);
270
271 *border = LVDS_BORDER_ENABLE;
272 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
273 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
274 adjusted_mode->vdisplay);
275
276 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
277 bits << PFIT_VERT_SCALE_SHIFT);
278 *pfit_control |= (PFIT_ENABLE |
279 VERT_INTERP_BILINEAR |
280 HORIZ_INTERP_BILINEAR);
281 }
282 } else if (scaled_width < scaled_height) { /* letter */
283 centre_vertically(adjusted_mode,
284 scaled_width /
285 pipe_config->pipe_src_w);
286
287 *border = LVDS_BORDER_ENABLE;
288 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
289 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
290 adjusted_mode->hdisplay);
291
292 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
293 bits << PFIT_VERT_SCALE_SHIFT);
294 *pfit_control |= (PFIT_ENABLE |
295 VERT_INTERP_BILINEAR |
296 HORIZ_INTERP_BILINEAR);
297 }
298 } else {
299 /* Aspects match, Let hw scale both directions */
300 *pfit_control |= (PFIT_ENABLE |
301 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
302 VERT_INTERP_BILINEAR |
303 HORIZ_INTERP_BILINEAR);
304 }
305}
306
2dd24552 307void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 308 struct intel_crtc_state *pipe_config,
2dd24552
JB		 309 int fitting_mode)
310{
311 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 312 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
37327abd 313 struct drm_display_mode *adjusted_mode;
2dd24552 314
2d112de7 315 adjusted_mode = &pipe_config->base.adjusted_mode;
2dd24552
JB		 316
317 /* Native modes don't need fitting */
37327abd
VS		 318 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
319 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
2dd24552
JB		 320 goto out;
321
322 switch (fitting_mode) {
323 case DRM_MODE_SCALE_CENTER:
324 /*
325 * For centered modes, we have to calculate border widths &
326 * heights and modify the values programmed into the CRTC.
327 */
37327abd
VS		 328 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
329 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB		 330 border = LVDS_BORDER_ENABLE;
331 break;
332 case DRM_MODE_SCALE_ASPECT:
333 /* Scale but preserve the aspect ratio */
9084e7d2
DV		 334 if (INTEL_INFO(dev)->gen >= 4)
335 i965_scale_aspect(pipe_config, &pfit_control);
336 else
337 i9xx_scale_aspect(pipe_config, &pfit_control,
338 &pfit_pgm_ratios, &border);
2dd24552 339 break;
2dd24552
JB		 340 case DRM_MODE_SCALE_FULLSCREEN:
341 /*
342 * Full scaling, even if it changes the aspect ratio.
343 * Fortunately this is all done for us in hw.
344 */
37327abd
VS		 345 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
346 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
2dd24552
JB		 347 pfit_control |= PFIT_ENABLE;
348 if (INTEL_INFO(dev)->gen >= 4)
349 pfit_control |= PFIT_SCALING_AUTO;
350 else
351 pfit_control |= (VERT_AUTO_SCALE |
352 VERT_INTERP_BILINEAR |
353 HORIZ_AUTO_SCALE |
354 HORIZ_INTERP_BILINEAR);
355 }
356 break;
ab3e67f4
JB		 357 default:
358 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
359 return;
2dd24552
JB		 360 }
361
362 /* 965+ wants fuzzy fitting */
363 /* FIXME: handle multiple panels by failing gracefully */
364 if (INTEL_INFO(dev)->gen >= 4)
365 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
366 PFIT_FILTER_FUZZY);
367
368out:
369 if ((pfit_control & PFIT_ENABLE) == 0) {
370 pfit_control = 0;
371 pfit_pgm_ratios = 0;
372 }
373
6b89cdde
DV		 374 /* Make sure pre-965 set dither correctly for 18bpp panels. */
375 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
376 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
377
2deefda5
DV		 378 pipe_config->gmch_pfit.control = pfit_control;
379 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 380 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB		 381}
382
525997e0
JN		 383enum drm_connector_status
384intel_panel_detect(struct drm_device *dev)
385{
386 struct drm_i915_private *dev_priv = dev->dev_private;
387
388 /* Assume that the BIOS does not lie through the OpRegion... */
389 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
390 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
391 connector_status_connected :
392 connector_status_disconnected;
393 }
394
395 switch (i915.panel_ignore_lid) {
396 case -2:
397 return connector_status_connected;
398 case -1:
399 return connector_status_disconnected;
400 default:
401 return connector_status_unknown;
402 }
403}
404
6dda730e
JN		 405/**
406 * scale - scale values from one range to another
407 *
408 * @source_val: value in range [@source_min..@source_max]
409 *
410 * Return @source_val in range [@source_min..@source_max] scaled to range
411 * [@target_min..@target_max].
412 */
413static uint32_t scale(uint32_t source_val,
414 uint32_t source_min, uint32_t source_max,
415 uint32_t target_min, uint32_t target_max)
416{
417 uint64_t target_val;
418
419 WARN_ON(source_min > source_max);
420 WARN_ON(target_min > target_max);
421
422 /* defensive */
423 source_val = clamp(source_val, source_min, source_max);
424
425 /* avoid overflows */
673e7bbd
AE		 426 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
427 (target_max - target_min), source_max - source_min);
6dda730e
JN		 428 target_val += target_min;
429
430 return target_val;
431}
432
433/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
434static inline u32 scale_user_to_hw(struct intel_connector *connector,
435 u32 user_level, u32 user_max)
436{
437 struct intel_panel *panel = &connector->panel;
438
439 return scale(user_level, 0, user_max,
440 panel->backlight.min, panel->backlight.max);
441}
442
443/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
444 * to [hw_min..hw_max]. */
445static inline u32 clamp_user_to_hw(struct intel_connector *connector,
446 u32 user_level, u32 user_max)
447{
448 struct intel_panel *panel = &connector->panel;
449 u32 hw_level;
450
451 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
452 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
453
454 return hw_level;
455}
456
457/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
458static inline u32 scale_hw_to_user(struct intel_connector *connector,
459 u32 hw_level, u32 user_max)
460{
461 struct intel_panel *panel = &connector->panel;
462
463 return scale(hw_level, panel->backlight.min, panel->backlight.max,
464 0, user_max);
465}
466
7bd688cd
JN		 467static u32 intel_panel_compute_brightness(struct intel_connector *connector,
468 u32 val)
7bd90909 469{
7bd688cd 470 struct drm_device *dev = connector->base.dev;
4dca20ef 471 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN		 472 struct intel_panel *panel = &connector->panel;
473
474 WARN_ON(panel->backlight.max == 0);
4dca20ef 475
d330a953 476 if (i915.invert_brightness < 0)
4dca20ef
CE		 477 return val;
478
d330a953 479 if (i915.invert_brightness > 0 ||
d6540632 480 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 481 return panel->backlight.max - val;
d6540632 482 }
7bd90909
CE		 483
484 return val;
485}
486
96ab4c70 487static u32 bdw_get_backlight(struct intel_connector *connector)
0b0b053a 488{
96ab4c70 489 struct drm_device *dev = connector->base.dev;
bfd7590d 490 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 491
96ab4c70
DV		 492 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
493}
07bf139b 494
7bd688cd 495static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 496{
7bd688cd 497 struct drm_device *dev = connector->base.dev;
a9573556 498 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 499
7bd688cd
JN		 500 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
501}
a9573556 502
7bd688cd
JN		 503static u32 i9xx_get_backlight(struct intel_connector *connector)
504{
505 struct drm_device *dev = connector->base.dev;
506 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 507 struct intel_panel *panel = &connector->panel;
7bd688cd 508 u32 val;
07bf139b 509
7bd688cd
JN		 510 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
511 if (INTEL_INFO(dev)->gen < 4)
512 val >>= 1;
ba3820ad 513
636baebf 514 if (panel->backlight.combination_mode) {
7bd688cd 515 u8 lbpc;
ba3820ad 516
7bd688cd
JN		 517 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
518 val *= lbpc;
a9573556
CW		 519 }
520
7bd688cd
JN		 521 return val;
522}
523
524static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
525{
526 struct drm_i915_private *dev_priv = dev->dev_private;
527
23ec0a88
VS		 528 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
529 return 0;
530
7bd688cd
JN		 531 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
532}
533
534static u32 vlv_get_backlight(struct intel_connector *connector)
535{
536 struct drm_device *dev = connector->base.dev;
537 enum pipe pipe = intel_get_pipe_from_connector(connector);
538
539 return _vlv_get_backlight(dev, pipe);
540}
541
0fb890c0
VK		 542static u32 bxt_get_backlight(struct intel_connector *connector)
543{
544 struct drm_device *dev = connector->base.dev;
545 struct drm_i915_private *dev_priv = dev->dev_private;
546
547 return I915_READ(BXT_BLC_PWM_DUTY1);
548}
549
b029e66f
SK		 550static u32 pwm_get_backlight(struct intel_connector *connector)
551{
552 struct intel_panel *panel = &connector->panel;
553 int duty_ns;
554
555 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
556 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
557}
558
7bd688cd
JN		 559static u32 intel_panel_get_backlight(struct intel_connector *connector)
560{
561 struct drm_device *dev = connector->base.dev;
562 struct drm_i915_private *dev_priv = dev->dev_private;
2d72f6c7
VS		 563 struct intel_panel *panel = &connector->panel;
564 u32 val = 0;
7bd688cd 565
07f11d49 566 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 567
2d72f6c7
VS		 568 if (panel->backlight.enabled) {
569 val = dev_priv->display.get_backlight(connector);
570 val = intel_panel_compute_brightness(connector, val);
571 }
8ba2d185 572
07f11d49 573 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 574
a9573556
CW		 575 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
576 return val;
577}
578
96ab4c70 579static void bdw_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 580{
96ab4c70 581 struct drm_device *dev = connector->base.dev;
f8e10062
BW		 582 struct drm_i915_private *dev_priv = dev->dev_private;
583 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
584 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
585}
586
7bd688cd 587static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 588{
7bd688cd 589 struct drm_device *dev = connector->base.dev;
a9573556 590 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN		 591 u32 tmp;
592
593 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
594 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW		 595}
596
7bd688cd 597static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 598{
7bd688cd 599 struct drm_device *dev = connector->base.dev;
a9573556 600 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 601 struct intel_panel *panel = &connector->panel;
b329b328 602 u32 tmp, mask;
ba3820ad 603
f91c15e0
JN		 604 WARN_ON(panel->backlight.max == 0);
605
636baebf 606 if (panel->backlight.combination_mode) {
ba3820ad
TI		 607 u8 lbpc;
608
f91c15e0 609 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI		 610 level /= lbpc;
611 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
612 }
613
b329b328
JN		 614 if (IS_GEN4(dev)) {
615 mask = BACKLIGHT_DUTY_CYCLE_MASK;
616 } else {
a9573556 617 level <<= 1;
b329b328
JN		 618 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
619 }
7bd688cd 620
b329b328 621 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN		 622 I915_WRITE(BLC_PWM_CTL, tmp | level);
623}
624
625static void vlv_set_backlight(struct intel_connector *connector, u32 level)
626{
627 struct drm_device *dev = connector->base.dev;
628 struct drm_i915_private *dev_priv = dev->dev_private;
629 enum pipe pipe = intel_get_pipe_from_connector(connector);
630 u32 tmp;
631
23ec0a88
VS		 632 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
633 return;
634
7bd688cd
JN		 635 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
636 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
637}
638
0fb890c0
VK		 639static void bxt_set_backlight(struct intel_connector *connector, u32 level)
640{
641 struct drm_device *dev = connector->base.dev;
642 struct drm_i915_private *dev_priv = dev->dev_private;
643
644 I915_WRITE(BXT_BLC_PWM_DUTY1, level);
645}
646
b029e66f
SK		 647static void pwm_set_backlight(struct intel_connector *connector, u32 level)
648{
649 struct intel_panel *panel = &connector->panel;
650 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
651
652 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
653}
654
7bd688cd
JN		 655static void
656intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
657{
658 struct drm_device *dev = connector->base.dev;
659 struct drm_i915_private *dev_priv = dev->dev_private;
660
661 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
662
663 level = intel_panel_compute_brightness(connector, level);
664 dev_priv->display.set_backlight(connector, level);
a9573556 665}
47356eb6 666
6dda730e
JN		 667/* set backlight brightness to level in range [0..max], scaling wrt hw min */
668static void intel_panel_set_backlight(struct intel_connector *connector,
669 u32 user_level, u32 user_max)
47356eb6 670{
752aa88a 671 struct drm_device *dev = connector->base.dev;
47356eb6 672 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 673 struct intel_panel *panel = &connector->panel;
6dda730e 674 u32 hw_level;
8ba2d185 675
260d8f98 676 if (!panel->backlight.present)
752aa88a
JB		 677 return;
678
07f11d49 679 mutex_lock(&dev_priv->backlight_lock);
d6540632 680
f91c15e0 681 WARN_ON(panel->backlight.max == 0);
d6540632 682
6dda730e
JN		 683 hw_level = scale_user_to_hw(connector, user_level, user_max);
684 panel->backlight.level = hw_level;
685
686 if (panel->backlight.enabled)
687 intel_panel_actually_set_backlight(connector, hw_level);
688
07f11d49 689 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN		 690}
691
692/* set backlight brightness to level in range [0..max], assuming hw min is
693 * respected.
694 */
695void intel_panel_set_backlight_acpi(struct intel_connector *connector,
696 u32 user_level, u32 user_max)
697{
698 struct drm_device *dev = connector->base.dev;
699 struct drm_i915_private *dev_priv = dev->dev_private;
700 struct intel_panel *panel = &connector->panel;
701 enum pipe pipe = intel_get_pipe_from_connector(connector);
702 u32 hw_level;
6dda730e 703
260d8f98
VS		 704 /*
705 * INVALID_PIPE may occur during driver init because
706 * connection_mutex isn't held across the entire backlight
707 * setup + modeset readout, and the BIOS can issue the
708 * requests at any time.
709 */
6dda730e
JN		 710 if (!panel->backlight.present || pipe == INVALID_PIPE)
711 return;
712
07f11d49 713 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN		 714
715 WARN_ON(panel->backlight.max == 0);
716
717 hw_level = clamp_user_to_hw(connector, user_level, user_max);
718 panel->backlight.level = hw_level;
47356eb6 719
58c68779 720 if (panel->backlight.device)
6dda730e
JN		 721 panel->backlight.device->props.brightness =
722 scale_hw_to_user(connector,
723 panel->backlight.level,
724 panel->backlight.device->props.max_brightness);
b6b3ba5b 725
58c68779 726 if (panel->backlight.enabled)
6dda730e 727 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 728
07f11d49 729 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI		 730}
731
7bd688cd
JN		 732static void pch_disable_backlight(struct intel_connector *connector)
733{
734 struct drm_device *dev = connector->base.dev;
735 struct drm_i915_private *dev_priv = dev->dev_private;
736 u32 tmp;
737
3bd712e5
JN		 738 intel_panel_actually_set_backlight(connector, 0);
739
7bd688cd
JN		 740 tmp = I915_READ(BLC_PWM_CPU_CTL2);
741 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
742
743 tmp = I915_READ(BLC_PWM_PCH_CTL1);
744 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
745}
746
3bd712e5
JN		 747static void i9xx_disable_backlight(struct intel_connector *connector)
748{
749 intel_panel_actually_set_backlight(connector, 0);
750}
751
7bd688cd
JN		 752static void i965_disable_backlight(struct intel_connector *connector)
753{
754 struct drm_device *dev = connector->base.dev;
755 struct drm_i915_private *dev_priv = dev->dev_private;
756 u32 tmp;
757
3bd712e5
JN		 758 intel_panel_actually_set_backlight(connector, 0);
759
7bd688cd
JN		 760 tmp = I915_READ(BLC_PWM_CTL2);
761 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
762}
763
764static void vlv_disable_backlight(struct intel_connector *connector)
765{
766 struct drm_device *dev = connector->base.dev;
767 struct drm_i915_private *dev_priv = dev->dev_private;
768 enum pipe pipe = intel_get_pipe_from_connector(connector);
769 u32 tmp;
770
23ec0a88
VS		 771 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
772 return;
773
3bd712e5
JN		 774 intel_panel_actually_set_backlight(connector, 0);
775
7bd688cd
JN		 776 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
777 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
778}
779
0fb890c0
VK		 780static void bxt_disable_backlight(struct intel_connector *connector)
781{
782 struct drm_device *dev = connector->base.dev;
783 struct drm_i915_private *dev_priv = dev->dev_private;
784 u32 tmp;
785
786 intel_panel_actually_set_backlight(connector, 0);
787
788 tmp = I915_READ(BXT_BLC_PWM_CTL1);
789 I915_WRITE(BXT_BLC_PWM_CTL1, tmp & ~BXT_BLC_PWM_ENABLE);
790}
791
b029e66f
SK		 792static void pwm_disable_backlight(struct intel_connector *connector)
793{
794 struct intel_panel *panel = &connector->panel;
795
796 /* Disable the backlight */
797 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
798 usleep_range(2000, 3000);
799 pwm_disable(panel->backlight.pwm);
800}
801
752aa88a 802void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 803{
752aa88a 804 struct drm_device *dev = connector->base.dev;
f52c619a 805 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 806 struct intel_panel *panel = &connector->panel;
8ba2d185 807
260d8f98 808 if (!panel->backlight.present)
752aa88a
JB		 809 return;
810
3f577573
JN		 811 /*
812 * Do not disable backlight on the vgaswitcheroo path. When switching
813 * away from i915, the other client may depend on i915 to handle the
814 * backlight. This will leave the backlight on unnecessarily when
815 * another client is not activated.
816 */
817 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
818 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
819 return;
820 }
821
07f11d49 822 mutex_lock(&dev_priv->backlight_lock);
47356eb6 823
ab656bb9
JN		 824 if (panel->backlight.device)
825 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 826 panel->backlight.enabled = false;
3bd712e5 827 dev_priv->display.disable_backlight(connector);
24ded204 828
07f11d49 829 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 830}
24ded204 831
96ab4c70
DV		 832static void bdw_enable_backlight(struct intel_connector *connector)
833{
834 struct drm_device *dev = connector->base.dev;
835 struct drm_i915_private *dev_priv = dev->dev_private;
836 struct intel_panel *panel = &connector->panel;
837 u32 pch_ctl1, pch_ctl2;
838
839 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
840 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
841 DRM_DEBUG_KMS("pch backlight already enabled\n");
842 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
843 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
844 }
24ded204 845
96ab4c70
DV		 846 pch_ctl2 = panel->backlight.max << 16;
847 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 848
96ab4c70
DV		 849 pch_ctl1 = 0;
850 if (panel->backlight.active_low_pwm)
851 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 852
e6b2627c
JN		 853 /* After LPT, override is the default. */
854 if (HAS_PCH_LPT(dev_priv))
855 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
96ab4c70
DV		 856
857 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
858 POSTING_READ(BLC_PWM_PCH_CTL1);
859 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
860
861 /* This won't stick until the above enable. */
862 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW		 863}
864
7bd688cd
JN		 865static void pch_enable_backlight(struct intel_connector *connector)
866{
867 struct drm_device *dev = connector->base.dev;
868 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 869 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 870 enum pipe pipe = intel_get_pipe_from_connector(connector);
871 enum transcoder cpu_transcoder =
872 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 873 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 874
b35684b8
JN		 875 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
876 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 877 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN		 878 cpu_ctl2 &= ~BLM_PWM_ENABLE;
879 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
880 }
7bd688cd 881
b35684b8
JN		 882 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
883 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
884 DRM_DEBUG_KMS("pch backlight already enabled\n");
885 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
886 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
887 }
7bd688cd
JN		 888
889 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 890 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 891 else
b35684b8
JN		 892 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
893 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 894 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 895 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 896
b35684b8 897 /* This won't stick until the above enable. */
3bd712e5 898 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN		 899
900 pch_ctl2 = panel->backlight.max << 16;
901 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
902
b35684b8
JN		 903 pch_ctl1 = 0;
904 if (panel->backlight.active_low_pwm)
905 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 906
b35684b8
JN		 907 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
908 POSTING_READ(BLC_PWM_PCH_CTL1);
909 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN		 910}
911
912static void i9xx_enable_backlight(struct intel_connector *connector)
913{
b35684b8
JN		 914 struct drm_device *dev = connector->base.dev;
915 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 916 struct intel_panel *panel = &connector->panel;
b35684b8
JN		 917 u32 ctl, freq;
918
919 ctl = I915_READ(BLC_PWM_CTL);
920 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 921 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 922 I915_WRITE(BLC_PWM_CTL, 0);
923 }
3bd712e5 924
b35684b8
JN		 925 freq = panel->backlight.max;
926 if (panel->backlight.combination_mode)
927 freq /= 0xff;
928
929 ctl = freq << 17;
b6ab66aa 930 if (panel->backlight.combination_mode)
b35684b8
JN		 931 ctl |= BLM_LEGACY_MODE;
932 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
933 ctl |= BLM_POLARITY_PNV;
934
935 I915_WRITE(BLC_PWM_CTL, ctl);
936 POSTING_READ(BLC_PWM_CTL);
937
938 /* XXX: combine this into above write? */
3bd712e5 939 intel_panel_actually_set_backlight(connector, panel->backlight.level);
2059ac3b
JN		 940
941 /*
942 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
943 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
944 * that has backlight.
945 */
946 if (IS_GEN2(dev))
947 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
7bd688cd 948}
8ba2d185 949
7bd688cd
JN		 950static void i965_enable_backlight(struct intel_connector *connector)
951{
952 struct drm_device *dev = connector->base.dev;
953 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 954 struct intel_panel *panel = &connector->panel;
7bd688cd 955 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 956 u32 ctl, ctl2, freq;
7bd688cd 957
b35684b8
JN		 958 ctl2 = I915_READ(BLC_PWM_CTL2);
959 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 960 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 961 ctl2 &= ~BLM_PWM_ENABLE;
962 I915_WRITE(BLC_PWM_CTL2, ctl2);
963 }
7bd688cd 964
b35684b8
JN		 965 freq = panel->backlight.max;
966 if (panel->backlight.combination_mode)
967 freq /= 0xff;
7bd688cd 968
b35684b8
JN		 969 ctl = freq << 16;
970 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 971
b35684b8
JN		 972 ctl2 = BLM_PIPE(pipe);
973 if (panel->backlight.combination_mode)
974 ctl2 |= BLM_COMBINATION_MODE;
975 if (panel->backlight.active_low_pwm)
976 ctl2 |= BLM_POLARITY_I965;
977 I915_WRITE(BLC_PWM_CTL2, ctl2);
978 POSTING_READ(BLC_PWM_CTL2);
979 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN		 980
981 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN		 982}
983
984static void vlv_enable_backlight(struct intel_connector *connector)
985{
986 struct drm_device *dev = connector->base.dev;
987 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 988 struct intel_panel *panel = &connector->panel;
7bd688cd 989 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 990 u32 ctl, ctl2;
7bd688cd 991
23ec0a88
VS		 992 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
993 return;
994
b35684b8
JN		 995 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
996 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 997 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 998 ctl2 &= ~BLM_PWM_ENABLE;
999 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1000 }
7bd688cd 1001
b35684b8
JN		 1002 ctl = panel->backlight.max << 16;
1003 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 1004
b35684b8
JN		 1005 /* XXX: combine this into above write? */
1006 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 1007
b35684b8
JN		 1008 ctl2 = 0;
1009 if (panel->backlight.active_low_pwm)
1010 ctl2 |= BLM_POLARITY_I965;
1011 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 1012 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 1013 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW		 1014}
1015
0fb890c0
VK		 1016static void bxt_enable_backlight(struct intel_connector *connector)
1017{
1018 struct drm_device *dev = connector->base.dev;
1019 struct drm_i915_private *dev_priv = dev->dev_private;
1020 struct intel_panel *panel = &connector->panel;
1021 u32 pwm_ctl;
1022
1023 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1024 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1025 DRM_DEBUG_KMS("backlight already enabled\n");
1026 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1027 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1028 }
1029
1030 I915_WRITE(BXT_BLC_PWM_FREQ1, panel->backlight.max);
1031
1032 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1033
1034 pwm_ctl = 0;
1035 if (panel->backlight.active_low_pwm)
1036 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1037
1038 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1039 POSTING_READ(BXT_BLC_PWM_CTL1);
1040 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl | BXT_BLC_PWM_ENABLE);
1041}
1042
b029e66f
SK		 1043static void pwm_enable_backlight(struct intel_connector *connector)
1044{
1045 struct intel_panel *panel = &connector->panel;
1046
1047 pwm_enable(panel->backlight.pwm);
1048 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1049}
1050
752aa88a 1051void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 1052{
752aa88a 1053 struct drm_device *dev = connector->base.dev;
47356eb6 1054 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 1055 struct intel_panel *panel = &connector->panel;
752aa88a 1056 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 1057
260d8f98 1058 if (!panel->backlight.present)
752aa88a
JB		 1059 return;
1060
6f2bcceb 1061 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 1062
07f11d49 1063 mutex_lock(&dev_priv->backlight_lock);
47356eb6 1064
f91c15e0
JN		 1065 WARN_ON(panel->backlight.max == 0);
1066
13f3fbe8 1067 if (panel->backlight.level <= panel->backlight.min) {
f91c15e0 1068 panel->backlight.level = panel->backlight.max;
58c68779
JN		 1069 if (panel->backlight.device)
1070 panel->backlight.device->props.brightness =
6dda730e
JN		 1071 scale_hw_to_user(connector,
1072 panel->backlight.level,
1073 panel->backlight.device->props.max_brightness);
b6b3ba5b 1074 }
47356eb6 1075
3bd712e5 1076 dev_priv->display.enable_backlight(connector);
58c68779 1077 panel->backlight.enabled = true;
ab656bb9
JN		 1078 if (panel->backlight.device)
1079 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 1080
07f11d49 1081 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW		 1082}
1083
912e8b12 1084#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 1085static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 1086{
752aa88a 1087 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 1088 struct intel_panel *panel = &connector->panel;
752aa88a
JB		 1089 struct drm_device *dev = connector->base.dev;
1090
51fd371b 1091 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW		 1092 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1093 bd->props.brightness, bd->props.max_brightness);
752aa88a 1094 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 1095 bd->props.max_brightness);
ab656bb9
JN		 1096
1097 /*
1098 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1099 * backlight class device does not make it easy to to differentiate
1100 * between callbacks for brightness and bl_power, so our backlight_power
1101 * callback needs to take this into account.
1102 */
1103 if (panel->backlight.enabled) {
1104 if (panel->backlight_power) {
e6755fb7
JN		 1105 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1106 bd->props.brightness != 0;
ab656bb9
JN		 1107 panel->backlight_power(connector, enable);
1108 }
1109 } else {
1110 bd->props.power = FB_BLANK_POWERDOWN;
1111 }
1112
51fd371b 1113 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG		 1114 return 0;
1115}
1116
db31af1d 1117static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1118{
752aa88a
JB		 1119 struct intel_connector *connector = bl_get_data(bd);
1120 struct drm_device *dev = connector->base.dev;
c8c8fb33 1121 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1122 u32 hw_level;
7bd688cd 1123 int ret;
752aa88a 1124
c8c8fb33 1125 intel_runtime_pm_get(dev_priv);
51fd371b 1126 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN		 1127
1128 hw_level = intel_panel_get_backlight(connector);
1129 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1130
51fd371b 1131 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1132 intel_runtime_pm_put(dev_priv);
752aa88a 1133
7bd688cd 1134 return ret;
aaa6fd2a
MG		 1135}
1136
db31af1d
JN		 1137static const struct backlight_ops intel_backlight_device_ops = {
1138 .update_status = intel_backlight_device_update_status,
1139 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG		 1140};
1141
db31af1d 1142static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1143{
58c68779 1144 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1145 struct backlight_properties props;
aaa6fd2a 1146
58c68779 1147 if (WARN_ON(panel->backlight.device))
dc652f90
JN		 1148 return -ENODEV;
1149
0962c3c9
VS		 1150 if (!panel->backlight.present)
1151 return 0;
1152
6dda730e 1153 WARN_ON(panel->backlight.max == 0);
7bd688cd 1154
af437cfd 1155 memset(&props, 0, sizeof(props));
aaa6fd2a 1156 props.type = BACKLIGHT_RAW;
6dda730e
JN		 1157
1158 /*
1159 * Note: Everything should work even if the backlight device max
1160 * presented to the userspace is arbitrarily chosen.
1161 */
7bd688cd 1162 props.max_brightness = panel->backlight.max;
6dda730e
JN		 1163 props.brightness = scale_hw_to_user(connector,
1164 panel->backlight.level,
1165 props.max_brightness);
58c68779 1166
ab656bb9
JN		 1167 if (panel->backlight.enabled)
1168 props.power = FB_BLANK_UNBLANK;
1169 else
1170 props.power = FB_BLANK_POWERDOWN;
1171
58c68779
JN		 1172 /*
1173 * Note: using the same name independent of the connector prevents
1174 * registration of multiple backlight devices in the driver.
1175 */
1176 panel->backlight.device =
aaa6fd2a 1177 backlight_device_register("intel_backlight",
db31af1d
JN		 1178 connector->base.kdev,
1179 connector,
1180 &intel_backlight_device_ops, &props);
aaa6fd2a 1181
58c68779 1182 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1183 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN		 1184 PTR_ERR(panel->backlight.device));
1185 panel->backlight.device = NULL;
aaa6fd2a
MG		 1186 return -ENODEV;
1187 }
0962c3c9
VS		 1188
1189 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1190 connector->base.name);
1191
aaa6fd2a
MG		 1192 return 0;
1193}
1194
db31af1d 1195static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1196{
58c68779
JN		 1197 struct intel_panel *panel = &connector->panel;
1198
1199 if (panel->backlight.device) {
1200 backlight_device_unregister(panel->backlight.device);
1201 panel->backlight.device = NULL;
dc652f90 1202 }
aaa6fd2a 1203}
db31af1d
JN		 1204#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1205static int intel_backlight_device_register(struct intel_connector *connector)
1206{
1207 return 0;
1208}
1209static void intel_backlight_device_unregister(struct intel_connector *connector)
1210{
1211}
1212#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1213
f91c15e0
JN		 1214/*
1215 * Note: The setup hooks can't assume pipe is set!
1216 *
1217 * XXX: Query mode clock or hardware clock and program PWM modulation frequency
1218 * appropriately when it's 0. Use VBT and/or sane defaults.
1219 */
6dda730e
JN		 1220static u32 get_backlight_min_vbt(struct intel_connector *connector)
1221{
1222 struct drm_device *dev = connector->base.dev;
1223 struct drm_i915_private *dev_priv = dev->dev_private;
1224 struct intel_panel *panel = &connector->panel;
e1c412e7 1225 int min;
6dda730e
JN		 1226
1227 WARN_ON(panel->backlight.max == 0);
1228
e1c412e7
JN		 1229 /*
1230 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1231 * to problems. There are such machines out there. Either our
1232 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1233 * against this by letting the minimum be at most (arbitrarily chosen)
1234 * 25% of the max.
1235 */
1236 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1237 if (min != dev_priv->vbt.backlight.min_brightness) {
1238 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1239 dev_priv->vbt.backlight.min_brightness, min);
1240 }
1241
6dda730e 1242 /* vbt value is a coefficient in range [0..255] */
e1c412e7 1243 return scale(min, 0, 255, 0, panel->backlight.max);
6dda730e
JN		 1244}
1245
6517d273 1246static int bdw_setup_backlight(struct intel_connector *connector, enum pipe unused)
aaa6fd2a 1247{
96ab4c70 1248 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1249 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV		 1250 struct intel_panel *panel = &connector->panel;
1251 u32 pch_ctl1, pch_ctl2, val;
1252
1253 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1254 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1255
1256 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1257 panel->backlight.max = pch_ctl2 >> 16;
1258 if (!panel->backlight.max)
1259 return -ENODEV;
1260
6dda730e
JN		 1261 panel->backlight.min = get_backlight_min_vbt(connector);
1262
96ab4c70
DV		 1263 val = bdw_get_backlight(connector);
1264 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1265
1266 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1267 panel->backlight.level != 0;
1268
1269 return 0;
1270}
1271
6517d273 1272static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1273{
636baebf
JN		 1274 struct drm_device *dev = connector->base.dev;
1275 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1276 struct intel_panel *panel = &connector->panel;
636baebf 1277 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1278
636baebf
JN		 1279 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1280 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1281
1282 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1283 panel->backlight.max = pch_ctl2 >> 16;
7bd688cd
JN		 1284 if (!panel->backlight.max)
1285 return -ENODEV;
1286
6dda730e
JN		 1287 panel->backlight.min = get_backlight_min_vbt(connector);
1288
7bd688cd
JN		 1289 val = pch_get_backlight(connector);
1290 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1291
636baebf
JN		 1292 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1293 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1294 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1295
7bd688cd
JN		 1296 return 0;
1297}
1298
6517d273 1299static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1300{
636baebf
JN		 1301 struct drm_device *dev = connector->base.dev;
1302 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1303 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1304 u32 ctl, val;
1305
1306 ctl = I915_READ(BLC_PWM_CTL);
1307
b6ab66aa 1308 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
636baebf
JN		 1309 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1310
1311 if (IS_PINEVIEW(dev))
1312 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1313
1314 panel->backlight.max = ctl >> 17;
1315 if (panel->backlight.combination_mode)
1316 panel->backlight.max *= 0xff;
7bd688cd 1317
7bd688cd
JN		 1318 if (!panel->backlight.max)
1319 return -ENODEV;
1320
6dda730e
JN		 1321 panel->backlight.min = get_backlight_min_vbt(connector);
1322
7bd688cd
JN		 1323 val = i9xx_get_backlight(connector);
1324 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1325
636baebf
JN		 1326 panel->backlight.enabled = panel->backlight.level != 0;
1327
7bd688cd
JN		 1328 return 0;
1329}
1330
6517d273 1331static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1332{
636baebf
JN		 1333 struct drm_device *dev = connector->base.dev;
1334 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1335 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1336 u32 ctl, ctl2, val;
1337
1338 ctl2 = I915_READ(BLC_PWM_CTL2);
1339 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1340 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1341
1342 ctl = I915_READ(BLC_PWM_CTL);
1343 panel->backlight.max = ctl >> 16;
1344 if (panel->backlight.combination_mode)
1345 panel->backlight.max *= 0xff;
7bd688cd 1346
7bd688cd
JN		 1347 if (!panel->backlight.max)
1348 return -ENODEV;
1349
6dda730e
JN		 1350 panel->backlight.min = get_backlight_min_vbt(connector);
1351
7bd688cd
JN		 1352 val = i9xx_get_backlight(connector);
1353 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1354
636baebf
JN		 1355 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1356 panel->backlight.level != 0;
1357
7bd688cd
JN		 1358 return 0;
1359}
1360
6517d273 1361static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
7bd688cd
JN		 1362{
1363 struct drm_device *dev = connector->base.dev;
1364 struct drm_i915_private *dev_priv = dev->dev_private;
1365 struct intel_panel *panel = &connector->panel;
6517d273 1366 enum pipe p;
636baebf 1367 u32 ctl, ctl2, val;
7bd688cd 1368
6517d273
VS		 1369 for_each_pipe(dev_priv, p) {
1370 u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(p));
7bd688cd
JN		 1371
1372 /* Skip if the modulation freq is already set */
1373 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
1374 continue;
1375
1376 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
6517d273 1377 I915_WRITE(VLV_BLC_PWM_CTL(p), (0xf42 << 16) |
7bd688cd
JN		 1378 cur_val);
1379 }
1380
6517d273
VS		 1381 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1382 return -ENODEV;
1383
1384 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
636baebf
JN		 1385 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1386
6517d273 1387 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
636baebf 1388 panel->backlight.max = ctl >> 16;
7bd688cd
JN		 1389 if (!panel->backlight.max)
1390 return -ENODEV;
1391
6dda730e
JN		 1392 panel->backlight.min = get_backlight_min_vbt(connector);
1393
6517d273 1394 val = _vlv_get_backlight(dev, pipe);
7bd688cd
JN		 1395 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1396
636baebf
JN		 1397 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1398 panel->backlight.level != 0;
1399
7bd688cd
JN		 1400 return 0;
1401}
1402
0fb890c0
VK		 1403static int
1404bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1405{
1406 struct drm_device *dev = connector->base.dev;
1407 struct drm_i915_private *dev_priv = dev->dev_private;
1408 struct intel_panel *panel = &connector->panel;
1409 u32 pwm_ctl, val;
1410
1411 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1412 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1413
1414 panel->backlight.max = I915_READ(BXT_BLC_PWM_FREQ1);
1415 if (!panel->backlight.max)
1416 return -ENODEV;
1417
1418 val = bxt_get_backlight(connector);
1419 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1420
1421 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1422 panel->backlight.level != 0;
1423
1424 return 0;
1425}
1426
b029e66f
SK		 1427static int pwm_setup_backlight(struct intel_connector *connector,
1428 enum pipe pipe)
1429{
1430 struct drm_device *dev = connector->base.dev;
1431 struct intel_panel *panel = &connector->panel;
1432 int retval;
1433
1434 /* Get the PWM chip for backlight control */
1435 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1436 if (IS_ERR(panel->backlight.pwm)) {
1437 DRM_ERROR("Failed to own the pwm chip\n");
1438 panel->backlight.pwm = NULL;
1439 return -ENODEV;
1440 }
1441
1442 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1443 CRC_PMIC_PWM_PERIOD_NS);
1444 if (retval < 0) {
1445 DRM_ERROR("Failed to configure the pwm chip\n");
1446 pwm_put(panel->backlight.pwm);
1447 panel->backlight.pwm = NULL;
1448 return retval;
1449 }
1450
1451 panel->backlight.min = 0; /* 0% */
1452 panel->backlight.max = 100; /* 100% */
1453 panel->backlight.level = DIV_ROUND_UP(
1454 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1455 CRC_PMIC_PWM_PERIOD_NS);
1456 panel->backlight.enabled = panel->backlight.level != 0;
1457
1458 return 0;
1459}
1460
6517d273 1461int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
aaa6fd2a 1462{
db31af1d 1463 struct drm_device *dev = connector->dev;
7bd688cd 1464 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1465 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1466 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1467 int ret;
db31af1d 1468
c675949e 1469 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD		 1470 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1471 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1472 } else {
1473 DRM_DEBUG_KMS("no backlight present per VBT\n");
1474 return 0;
1475 }
c675949e
JN		 1476 }
1477
7bd688cd 1478 /* set level and max in panel struct */
07f11d49 1479 mutex_lock(&dev_priv->backlight_lock);
6517d273 1480 ret = dev_priv->display.setup_backlight(intel_connector, pipe);
07f11d49 1481 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd
JN		 1482
1483 if (ret) {
1484 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1485 connector->name);
7bd688cd
JN		 1486 return ret;
1487 }
db31af1d 1488
c91c9f32
JN		 1489 panel->backlight.present = true;
1490
0962c3c9
VS		 1491 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1492 connector->name,
c445b3b1 1493 panel->backlight.enabled ? "enabled" : "disabled",
0962c3c9 1494 panel->backlight.level, panel->backlight.max);
c445b3b1 1495
aaa6fd2a
MG		 1496 return 0;
1497}
1498
db31af1d 1499void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1500{
db31af1d 1501 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1502 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1503
b029e66f
SK		 1504 /* dispose of the pwm */
1505 if (panel->backlight.pwm)
1506 pwm_put(panel->backlight.pwm);
1507
c91c9f32 1508 panel->backlight.present = false;
aaa6fd2a 1509}
1d508706 1510
7bd688cd
JN		 1511/* Set up chip specific backlight functions */
1512void intel_panel_init_backlight_funcs(struct drm_device *dev)
1513{
1514 struct drm_i915_private *dev_priv = dev->dev_private;
1515
0fb890c0
VK		 1516 if (IS_BROXTON(dev)) {
1517 dev_priv->display.setup_backlight = bxt_setup_backlight;
1518 dev_priv->display.enable_backlight = bxt_enable_backlight;
1519 dev_priv->display.disable_backlight = bxt_disable_backlight;
1520 dev_priv->display.set_backlight = bxt_set_backlight;
1521 dev_priv->display.get_backlight = bxt_get_backlight;
1522 } else if (IS_BROADWELL(dev) || IS_SKYLAKE(dev)) {
96ab4c70
DV		 1523 dev_priv->display.setup_backlight = bdw_setup_backlight;
1524 dev_priv->display.enable_backlight = bdw_enable_backlight;
1525 dev_priv->display.disable_backlight = pch_disable_backlight;
1526 dev_priv->display.set_backlight = bdw_set_backlight;
1527 dev_priv->display.get_backlight = bdw_get_backlight;
1528 } else if (HAS_PCH_SPLIT(dev)) {
7bd688cd
JN		 1529 dev_priv->display.setup_backlight = pch_setup_backlight;
1530 dev_priv->display.enable_backlight = pch_enable_backlight;
1531 dev_priv->display.disable_backlight = pch_disable_backlight;
1532 dev_priv->display.set_backlight = pch_set_backlight;
1533 dev_priv->display.get_backlight = pch_get_backlight;
7bd688cd 1534 } else if (IS_VALLEYVIEW(dev)) {
b029e66f
SK		 1535 if (dev_priv->vbt.has_mipi) {
1536 dev_priv->display.setup_backlight = pwm_setup_backlight;
1537 dev_priv->display.enable_backlight = pwm_enable_backlight;
1538 dev_priv->display.disable_backlight = pwm_disable_backlight;
1539 dev_priv->display.set_backlight = pwm_set_backlight;
1540 dev_priv->display.get_backlight = pwm_get_backlight;
1541 } else {
1542 dev_priv->display.setup_backlight = vlv_setup_backlight;
1543 dev_priv->display.enable_backlight = vlv_enable_backlight;
1544 dev_priv->display.disable_backlight = vlv_disable_backlight;
1545 dev_priv->display.set_backlight = vlv_set_backlight;
1546 dev_priv->display.get_backlight = vlv_get_backlight;
1547 }
7bd688cd
JN		 1548 } else if (IS_GEN4(dev)) {
1549 dev_priv->display.setup_backlight = i965_setup_backlight;
1550 dev_priv->display.enable_backlight = i965_enable_backlight;
1551 dev_priv->display.disable_backlight = i965_disable_backlight;
1552 dev_priv->display.set_backlight = i9xx_set_backlight;
1553 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN		 1554 } else {
1555 dev_priv->display.setup_backlight = i9xx_setup_backlight;
3bd712e5
JN		 1556 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1557 dev_priv->display.disable_backlight = i9xx_disable_backlight;
7bd688cd
JN		 1558 dev_priv->display.set_backlight = i9xx_set_backlight;
1559 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN		 1560 }
1561}
1562
dd06f90e 1563int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK		 1564 struct drm_display_mode *fixed_mode,
1565 struct drm_display_mode *downclock_mode)
1d508706 1566{
dd06f90e 1567 panel->fixed_mode = fixed_mode;
4b6ed685 1568 panel->downclock_mode = downclock_mode;
dd06f90e 1569
1d508706
JN		 1570 return 0;
1571}
1572
1573void intel_panel_fini(struct intel_panel *panel)
1574{
dd06f90e
JN		 1575 struct intel_connector *intel_connector =
1576 container_of(panel, struct intel_connector, panel);
1577
1578 if (panel->fixed_mode)
1579 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK		 1580
1581 if (panel->downclock_mode)
1582 drm_mode_destroy(intel_connector->base.dev,
1583 panel->downclock_mode);
1d508706 1584}
0962c3c9
VS		 1585
1586void intel_backlight_register(struct drm_device *dev)
1587{
1588 struct intel_connector *connector;
1589
1590 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1591 intel_backlight_device_register(connector);
1592}
1593
1594void intel_backlight_unregister(struct drm_device *dev)
1595{
1596 struct intel_connector *connector;
1597
1598 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1599 intel_backlight_device_unregister(connector);
1600}
Linux kernel - Deliverables
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