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drm/i915/bxt: get DSI pixelclock
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW		 1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP		 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
f766093e 33#include <linux/kernel.h>
7bd90909 34#include <linux/moduleparam.h>
b029e66f 35#include <linux/pwm.h>
1d8e1c75
CW		 36#include "intel_drv.h"
37
b029e66f
SK		 38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
1d8e1c75 40void
4c6df4b4 41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW		 42 struct drm_display_mode *adjusted_mode)
43{
4c6df4b4 44 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID		 45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW		 47}
48
525997e0
JN		 49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev: drm device
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
59intel_find_panel_downclock(struct drm_device *dev,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(dev, tmp_mode);
98 else
99 return NULL;
100}
101
1d8e1c75
CW		 102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
b074cec8 104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 105 struct intel_crtc_state *pipe_config,
b074cec8 106 int fitting_mode)
1d8e1c75 107{
7c5f93b0
VS		 108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
1d8e1c75
CW		 110
111 /* Native modes don't need fitting */
aad941d5
VS		 112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW		 114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
37327abd
VS		 118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
aad941d5
VS		 120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
1d8e1c75
CW		 122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
aad941d5 127 u32 scaled_width = adjusted_mode->crtc_hdisplay
9084e7d2
DV		 128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
aad941d5 130 * adjusted_mode->crtc_vdisplay;
1d8e1c75 131 if (scaled_width > scaled_height) { /* pillar */
37327abd 132 width = scaled_height / pipe_config->pipe_src_h;
302983e9 133 if (width & 1)
0206e353 134 width++;
aad941d5 135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
1d8e1c75 136 y = 0;
aad941d5 137 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 138 } else if (scaled_width < scaled_height) { /* letter */
37327abd 139 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ		 140 if (height & 1)
141 height++;
aad941d5 142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
1d8e1c75 143 x = 0;
aad941d5 144 width = adjusted_mode->crtc_hdisplay;
1d8e1c75
CW		 145 } else {
146 x = y = 0;
aad941d5
VS		 147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
1d8e1c75
CW		 149 }
150 }
151 break;
152
1d8e1c75
CW		 153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
aad941d5
VS		 155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
1d8e1c75 157 break;
ab3e67f4
JB		 158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
1d8e1c75
CW		 162 }
163
164done:
b074cec8
JB		 165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 168}
a9573556 169
2dd24552 170static void
5e7234c9 171centre_horizontally(struct drm_display_mode *adjusted_mode,
2dd24552
JB		 172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
5e7234c9
VS		 177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
2dd24552
JB		 179 sync_pos = (blank_width - sync_width + 1) / 2;
180
aad941d5 181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
2dd24552
JB		 182 border += border & 1; /* make the border even */
183
5e7234c9
VS		 184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
2dd24552 187
5e7234c9
VS		 188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
2dd24552
JB		 190}
191
192static void
5e7234c9 193centre_vertically(struct drm_display_mode *adjusted_mode,
2dd24552
JB		 194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
5e7234c9
VS		 199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
2dd24552
JB		 201 sync_pos = (blank_width - sync_width + 1) / 2;
202
aad941d5 203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
2dd24552 204
5e7234c9
VS		 205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
2dd24552 208
5e7234c9
VS		 209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
2dd24552
JB		 211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
5cec258b 226static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 227 u32 *pfit_control)
228{
7c5f93b0 229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV		 231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 233 adjusted_mode->crtc_vdisplay;
9084e7d2
DV		 234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
aad941d5 242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
9084e7d2
DV		 243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
5cec258b 246static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
2d112de7 250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
aad941d5 251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
9084e7d2
DV		 252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
aad941d5 254 adjusted_mode->crtc_vdisplay;
9084e7d2
DV		 255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
aad941d5 268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
9084e7d2 269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
aad941d5 270 adjusted_mode->crtc_vdisplay);
9084e7d2
DV		 271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
aad941d5 284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
9084e7d2 285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
aad941d5 286 adjusted_mode->crtc_hdisplay);
9084e7d2
DV		 287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
2dd24552 303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 304 struct intel_crtc_state *pipe_config,
2dd24552
JB		 305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
7c5f93b0 309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
2dd24552
JB		 310
311 /* Native modes don't need fitting */
aad941d5
VS		 312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
2dd24552
JB		 314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
37327abd
VS		 322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB		 324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
9084e7d2
DV		 328 if (INTEL_INFO(dev)->gen >= 4)
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
2dd24552 333 break;
2dd24552
JB		 334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
aad941d5
VS		 339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
2dd24552
JB		 341 pfit_control |= PFIT_ENABLE;
342 if (INTEL_INFO(dev)->gen >= 4)
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
ab3e67f4
JB		 351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
2dd24552
JB		 354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
358 if (INTEL_INFO(dev)->gen >= 4)
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
6b89cdde
DV		 368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
369 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
2deefda5
DV		 372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 374 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB		 375}
376
525997e0
JN		 377enum drm_connector_status
378intel_panel_detect(struct drm_device *dev)
379{
380 struct drm_i915_private *dev_priv = dev->dev_private;
381
382 /* Assume that the BIOS does not lie through the OpRegion... */
383 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
384 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
385 connector_status_connected :
386 connector_status_disconnected;
387 }
388
389 switch (i915.panel_ignore_lid) {
390 case -2:
391 return connector_status_connected;
392 case -1:
393 return connector_status_disconnected;
394 default:
395 return connector_status_unknown;
396 }
397}
398
6dda730e
JN		 399/**
400 * scale - scale values from one range to another
401 *
402 * @source_val: value in range [@source_min..@source_max]
403 *
404 * Return @source_val in range [@source_min..@source_max] scaled to range
405 * [@target_min..@target_max].
406 */
407static uint32_t scale(uint32_t source_val,
408 uint32_t source_min, uint32_t source_max,
409 uint32_t target_min, uint32_t target_max)
410{
411 uint64_t target_val;
412
413 WARN_ON(source_min > source_max);
414 WARN_ON(target_min > target_max);
415
416 /* defensive */
417 source_val = clamp(source_val, source_min, source_max);
418
419 /* avoid overflows */
673e7bbd
AE		 420 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
421 (target_max - target_min), source_max - source_min);
6dda730e
JN		 422 target_val += target_min;
423
424 return target_val;
425}
426
427/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
428static inline u32 scale_user_to_hw(struct intel_connector *connector,
429 u32 user_level, u32 user_max)
430{
431 struct intel_panel *panel = &connector->panel;
432
433 return scale(user_level, 0, user_max,
434 panel->backlight.min, panel->backlight.max);
435}
436
437/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
438 * to [hw_min..hw_max]. */
439static inline u32 clamp_user_to_hw(struct intel_connector *connector,
440 u32 user_level, u32 user_max)
441{
442 struct intel_panel *panel = &connector->panel;
443 u32 hw_level;
444
445 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
446 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
447
448 return hw_level;
449}
450
451/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
452static inline u32 scale_hw_to_user(struct intel_connector *connector,
453 u32 hw_level, u32 user_max)
454{
455 struct intel_panel *panel = &connector->panel;
456
457 return scale(hw_level, panel->backlight.min, panel->backlight.max,
458 0, user_max);
459}
460
7bd688cd
JN		 461static u32 intel_panel_compute_brightness(struct intel_connector *connector,
462 u32 val)
7bd90909 463{
7bd688cd 464 struct drm_device *dev = connector->base.dev;
4dca20ef 465 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN		 466 struct intel_panel *panel = &connector->panel;
467
468 WARN_ON(panel->backlight.max == 0);
4dca20ef 469
d330a953 470 if (i915.invert_brightness < 0)
4dca20ef
CE		 471 return val;
472
d330a953 473 if (i915.invert_brightness > 0 ||
d6540632 474 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 475 return panel->backlight.max - val;
d6540632 476 }
7bd90909
CE		 477
478 return val;
479}
480
437b15b8 481static u32 lpt_get_backlight(struct intel_connector *connector)
0b0b053a 482{
96ab4c70 483 struct drm_device *dev = connector->base.dev;
bfd7590d 484 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 485
96ab4c70
DV		 486 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
487}
07bf139b 488
7bd688cd 489static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 490{
7bd688cd 491 struct drm_device *dev = connector->base.dev;
a9573556 492 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 493
7bd688cd
JN		 494 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
495}
a9573556 496
7bd688cd
JN		 497static u32 i9xx_get_backlight(struct intel_connector *connector)
498{
499 struct drm_device *dev = connector->base.dev;
500 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 501 struct intel_panel *panel = &connector->panel;
7bd688cd 502 u32 val;
07bf139b 503
7bd688cd
JN		 504 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
505 if (INTEL_INFO(dev)->gen < 4)
506 val >>= 1;
ba3820ad 507
636baebf 508 if (panel->backlight.combination_mode) {
7bd688cd 509 u8 lbpc;
ba3820ad 510
7bd688cd
JN		 511 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
512 val *= lbpc;
a9573556
CW		 513 }
514
7bd688cd
JN		 515 return val;
516}
517
518static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
519{
520 struct drm_i915_private *dev_priv = dev->dev_private;
521
23ec0a88
VS		 522 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
523 return 0;
524
7bd688cd
JN		 525 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
526}
527
528static u32 vlv_get_backlight(struct intel_connector *connector)
529{
530 struct drm_device *dev = connector->base.dev;
531 enum pipe pipe = intel_get_pipe_from_connector(connector);
532
533 return _vlv_get_backlight(dev, pipe);
534}
535
0fb890c0
VK		 536static u32 bxt_get_backlight(struct intel_connector *connector)
537{
538 struct drm_device *dev = connector->base.dev;
539 struct drm_i915_private *dev_priv = dev->dev_private;
540
541 return I915_READ(BXT_BLC_PWM_DUTY1);
542}
543
b029e66f
SK		 544static u32 pwm_get_backlight(struct intel_connector *connector)
545{
546 struct intel_panel *panel = &connector->panel;
547 int duty_ns;
548
549 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
550 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
551}
552
7bd688cd
JN		 553static u32 intel_panel_get_backlight(struct intel_connector *connector)
554{
555 struct drm_device *dev = connector->base.dev;
556 struct drm_i915_private *dev_priv = dev->dev_private;
2d72f6c7
VS		 557 struct intel_panel *panel = &connector->panel;
558 u32 val = 0;
7bd688cd 559
07f11d49 560 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 561
2d72f6c7 562 if (panel->backlight.enabled) {
5507faeb 563 val = panel->backlight.get(connector);
2d72f6c7
VS		 564 val = intel_panel_compute_brightness(connector, val);
565 }
8ba2d185 566
07f11d49 567 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 568
a9573556
CW		 569 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
570 return val;
571}
572
437b15b8 573static void lpt_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 574{
96ab4c70 575 struct drm_device *dev = connector->base.dev;
f8e10062
BW		 576 struct drm_i915_private *dev_priv = dev->dev_private;
577 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
578 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
579}
580
7bd688cd 581static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 582{
7bd688cd 583 struct drm_device *dev = connector->base.dev;
a9573556 584 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN		 585 u32 tmp;
586
587 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
588 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW		 589}
590
7bd688cd 591static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 592{
7bd688cd 593 struct drm_device *dev = connector->base.dev;
a9573556 594 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 595 struct intel_panel *panel = &connector->panel;
b329b328 596 u32 tmp, mask;
ba3820ad 597
f91c15e0
JN		 598 WARN_ON(panel->backlight.max == 0);
599
636baebf 600 if (panel->backlight.combination_mode) {
ba3820ad
TI		 601 u8 lbpc;
602
f91c15e0 603 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI		 604 level /= lbpc;
605 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
606 }
607
b329b328
JN		 608 if (IS_GEN4(dev)) {
609 mask = BACKLIGHT_DUTY_CYCLE_MASK;
610 } else {
a9573556 611 level <<= 1;
b329b328
JN		 612 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
613 }
7bd688cd 614
b329b328 615 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN		 616 I915_WRITE(BLC_PWM_CTL, tmp | level);
617}
618
619static void vlv_set_backlight(struct intel_connector *connector, u32 level)
620{
621 struct drm_device *dev = connector->base.dev;
622 struct drm_i915_private *dev_priv = dev->dev_private;
623 enum pipe pipe = intel_get_pipe_from_connector(connector);
624 u32 tmp;
625
23ec0a88
VS		 626 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
627 return;
628
7bd688cd
JN		 629 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
630 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
631}
632
0fb890c0
VK		 633static void bxt_set_backlight(struct intel_connector *connector, u32 level)
634{
635 struct drm_device *dev = connector->base.dev;
636 struct drm_i915_private *dev_priv = dev->dev_private;
637
638 I915_WRITE(BXT_BLC_PWM_DUTY1, level);
639}
640
b029e66f
SK		 641static void pwm_set_backlight(struct intel_connector *connector, u32 level)
642{
643 struct intel_panel *panel = &connector->panel;
644 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
645
646 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
647}
648
7bd688cd
JN		 649static void
650intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
651{
5507faeb 652 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 653
654 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
655
656 level = intel_panel_compute_brightness(connector, level);
5507faeb 657 panel->backlight.set(connector, level);
a9573556 658}
47356eb6 659
6dda730e
JN		 660/* set backlight brightness to level in range [0..max], scaling wrt hw min */
661static void intel_panel_set_backlight(struct intel_connector *connector,
662 u32 user_level, u32 user_max)
47356eb6 663{
752aa88a 664 struct drm_device *dev = connector->base.dev;
47356eb6 665 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 666 struct intel_panel *panel = &connector->panel;
6dda730e 667 u32 hw_level;
8ba2d185 668
260d8f98 669 if (!panel->backlight.present)
752aa88a
JB		 670 return;
671
07f11d49 672 mutex_lock(&dev_priv->backlight_lock);
d6540632 673
f91c15e0 674 WARN_ON(panel->backlight.max == 0);
d6540632 675
6dda730e
JN		 676 hw_level = scale_user_to_hw(connector, user_level, user_max);
677 panel->backlight.level = hw_level;
678
679 if (panel->backlight.enabled)
680 intel_panel_actually_set_backlight(connector, hw_level);
681
07f11d49 682 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN		 683}
684
685/* set backlight brightness to level in range [0..max], assuming hw min is
686 * respected.
687 */
688void intel_panel_set_backlight_acpi(struct intel_connector *connector,
689 u32 user_level, u32 user_max)
690{
691 struct drm_device *dev = connector->base.dev;
692 struct drm_i915_private *dev_priv = dev->dev_private;
693 struct intel_panel *panel = &connector->panel;
694 enum pipe pipe = intel_get_pipe_from_connector(connector);
695 u32 hw_level;
6dda730e 696
260d8f98
VS		 697 /*
698 * INVALID_PIPE may occur during driver init because
699 * connection_mutex isn't held across the entire backlight
700 * setup + modeset readout, and the BIOS can issue the
701 * requests at any time.
702 */
6dda730e
JN		 703 if (!panel->backlight.present || pipe == INVALID_PIPE)
704 return;
705
07f11d49 706 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN		 707
708 WARN_ON(panel->backlight.max == 0);
709
710 hw_level = clamp_user_to_hw(connector, user_level, user_max);
711 panel->backlight.level = hw_level;
47356eb6 712
58c68779 713 if (panel->backlight.device)
6dda730e
JN		 714 panel->backlight.device->props.brightness =
715 scale_hw_to_user(connector,
716 panel->backlight.level,
717 panel->backlight.device->props.max_brightness);
b6b3ba5b 718
58c68779 719 if (panel->backlight.enabled)
6dda730e 720 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 721
07f11d49 722 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI		 723}
724
437b15b8
JN		 725static void lpt_disable_backlight(struct intel_connector *connector)
726{
727 struct drm_device *dev = connector->base.dev;
728 struct drm_i915_private *dev_priv = dev->dev_private;
729 u32 tmp;
730
731 intel_panel_actually_set_backlight(connector, 0);
732
733 tmp = I915_READ(BLC_PWM_PCH_CTL1);
734 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
735}
736
7bd688cd
JN		 737static void pch_disable_backlight(struct intel_connector *connector)
738{
739 struct drm_device *dev = connector->base.dev;
740 struct drm_i915_private *dev_priv = dev->dev_private;
741 u32 tmp;
742
3bd712e5
JN		 743 intel_panel_actually_set_backlight(connector, 0);
744
7bd688cd
JN		 745 tmp = I915_READ(BLC_PWM_CPU_CTL2);
746 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
747
748 tmp = I915_READ(BLC_PWM_PCH_CTL1);
749 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
750}
751
3bd712e5
JN		 752static void i9xx_disable_backlight(struct intel_connector *connector)
753{
754 intel_panel_actually_set_backlight(connector, 0);
755}
756
7bd688cd
JN		 757static void i965_disable_backlight(struct intel_connector *connector)
758{
759 struct drm_device *dev = connector->base.dev;
760 struct drm_i915_private *dev_priv = dev->dev_private;
761 u32 tmp;
762
3bd712e5
JN		 763 intel_panel_actually_set_backlight(connector, 0);
764
7bd688cd
JN		 765 tmp = I915_READ(BLC_PWM_CTL2);
766 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
767}
768
769static void vlv_disable_backlight(struct intel_connector *connector)
770{
771 struct drm_device *dev = connector->base.dev;
772 struct drm_i915_private *dev_priv = dev->dev_private;
773 enum pipe pipe = intel_get_pipe_from_connector(connector);
774 u32 tmp;
775
23ec0a88
VS		 776 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
777 return;
778
3bd712e5
JN		 779 intel_panel_actually_set_backlight(connector, 0);
780
7bd688cd
JN		 781 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
782 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
783}
784
0fb890c0
VK		 785static void bxt_disable_backlight(struct intel_connector *connector)
786{
787 struct drm_device *dev = connector->base.dev;
788 struct drm_i915_private *dev_priv = dev->dev_private;
789 u32 tmp;
790
791 intel_panel_actually_set_backlight(connector, 0);
792
793 tmp = I915_READ(BXT_BLC_PWM_CTL1);
794 I915_WRITE(BXT_BLC_PWM_CTL1, tmp & ~BXT_BLC_PWM_ENABLE);
795}
796
b029e66f
SK		 797static void pwm_disable_backlight(struct intel_connector *connector)
798{
799 struct intel_panel *panel = &connector->panel;
800
801 /* Disable the backlight */
802 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
803 usleep_range(2000, 3000);
804 pwm_disable(panel->backlight.pwm);
805}
806
752aa88a 807void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 808{
752aa88a 809 struct drm_device *dev = connector->base.dev;
f52c619a 810 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 811 struct intel_panel *panel = &connector->panel;
8ba2d185 812
260d8f98 813 if (!panel->backlight.present)
752aa88a
JB		 814 return;
815
3f577573 816 /*
5389e916 817 * Do not disable backlight on the vga_switcheroo path. When switching
3f577573
JN		 818 * away from i915, the other client may depend on i915 to handle the
819 * backlight. This will leave the backlight on unnecessarily when
820 * another client is not activated.
821 */
822 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
823 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
824 return;
825 }
826
07f11d49 827 mutex_lock(&dev_priv->backlight_lock);
47356eb6 828
ab656bb9
JN		 829 if (panel->backlight.device)
830 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 831 panel->backlight.enabled = false;
5507faeb 832 panel->backlight.disable(connector);
24ded204 833
07f11d49 834 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 835}
24ded204 836
437b15b8 837static void lpt_enable_backlight(struct intel_connector *connector)
96ab4c70
DV		 838{
839 struct drm_device *dev = connector->base.dev;
840 struct drm_i915_private *dev_priv = dev->dev_private;
841 struct intel_panel *panel = &connector->panel;
842 u32 pch_ctl1, pch_ctl2;
843
844 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
845 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
846 DRM_DEBUG_KMS("pch backlight already enabled\n");
847 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
848 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
849 }
24ded204 850
96ab4c70
DV		 851 pch_ctl2 = panel->backlight.max << 16;
852 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 853
96ab4c70
DV		 854 pch_ctl1 = 0;
855 if (panel->backlight.active_low_pwm)
856 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 857
e6b2627c
JN		 858 /* After LPT, override is the default. */
859 if (HAS_PCH_LPT(dev_priv))
860 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
96ab4c70
DV		 861
862 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
863 POSTING_READ(BLC_PWM_PCH_CTL1);
864 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
865
866 /* This won't stick until the above enable. */
867 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW		 868}
869
7bd688cd
JN		 870static void pch_enable_backlight(struct intel_connector *connector)
871{
872 struct drm_device *dev = connector->base.dev;
873 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 874 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 875 enum pipe pipe = intel_get_pipe_from_connector(connector);
876 enum transcoder cpu_transcoder =
877 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 878 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 879
b35684b8
JN		 880 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
881 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 882 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN		 883 cpu_ctl2 &= ~BLM_PWM_ENABLE;
884 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
885 }
7bd688cd 886
b35684b8
JN		 887 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
888 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
889 DRM_DEBUG_KMS("pch backlight already enabled\n");
890 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
891 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
892 }
7bd688cd
JN		 893
894 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 895 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 896 else
b35684b8
JN		 897 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
898 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 899 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 900 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 901
b35684b8 902 /* This won't stick until the above enable. */
3bd712e5 903 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN		 904
905 pch_ctl2 = panel->backlight.max << 16;
906 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
907
b35684b8
JN		 908 pch_ctl1 = 0;
909 if (panel->backlight.active_low_pwm)
910 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 911
b35684b8
JN		 912 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
913 POSTING_READ(BLC_PWM_PCH_CTL1);
914 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN		 915}
916
917static void i9xx_enable_backlight(struct intel_connector *connector)
918{
b35684b8
JN		 919 struct drm_device *dev = connector->base.dev;
920 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 921 struct intel_panel *panel = &connector->panel;
b35684b8
JN		 922 u32 ctl, freq;
923
924 ctl = I915_READ(BLC_PWM_CTL);
925 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 926 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 927 I915_WRITE(BLC_PWM_CTL, 0);
928 }
3bd712e5 929
b35684b8
JN		 930 freq = panel->backlight.max;
931 if (panel->backlight.combination_mode)
932 freq /= 0xff;
933
934 ctl = freq << 17;
b6ab66aa 935 if (panel->backlight.combination_mode)
b35684b8
JN		 936 ctl |= BLM_LEGACY_MODE;
937 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
938 ctl |= BLM_POLARITY_PNV;
939
940 I915_WRITE(BLC_PWM_CTL, ctl);
941 POSTING_READ(BLC_PWM_CTL);
942
943 /* XXX: combine this into above write? */
3bd712e5 944 intel_panel_actually_set_backlight(connector, panel->backlight.level);
2059ac3b
JN		 945
946 /*
947 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
948 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
949 * that has backlight.
950 */
951 if (IS_GEN2(dev))
952 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
7bd688cd 953}
8ba2d185 954
7bd688cd
JN		 955static void i965_enable_backlight(struct intel_connector *connector)
956{
957 struct drm_device *dev = connector->base.dev;
958 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 959 struct intel_panel *panel = &connector->panel;
7bd688cd 960 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 961 u32 ctl, ctl2, freq;
7bd688cd 962
b35684b8
JN		 963 ctl2 = I915_READ(BLC_PWM_CTL2);
964 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 965 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 966 ctl2 &= ~BLM_PWM_ENABLE;
967 I915_WRITE(BLC_PWM_CTL2, ctl2);
968 }
7bd688cd 969
b35684b8
JN		 970 freq = panel->backlight.max;
971 if (panel->backlight.combination_mode)
972 freq /= 0xff;
7bd688cd 973
b35684b8
JN		 974 ctl = freq << 16;
975 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 976
b35684b8
JN		 977 ctl2 = BLM_PIPE(pipe);
978 if (panel->backlight.combination_mode)
979 ctl2 |= BLM_COMBINATION_MODE;
980 if (panel->backlight.active_low_pwm)
981 ctl2 |= BLM_POLARITY_I965;
982 I915_WRITE(BLC_PWM_CTL2, ctl2);
983 POSTING_READ(BLC_PWM_CTL2);
984 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN		 985
986 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN		 987}
988
989static void vlv_enable_backlight(struct intel_connector *connector)
990{
991 struct drm_device *dev = connector->base.dev;
992 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 993 struct intel_panel *panel = &connector->panel;
7bd688cd 994 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 995 u32 ctl, ctl2;
7bd688cd 996
23ec0a88
VS		 997 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
998 return;
999
b35684b8
JN		 1000 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1001 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 1002 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 1003 ctl2 &= ~BLM_PWM_ENABLE;
1004 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1005 }
7bd688cd 1006
b35684b8
JN		 1007 ctl = panel->backlight.max << 16;
1008 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 1009
b35684b8
JN		 1010 /* XXX: combine this into above write? */
1011 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 1012
b35684b8
JN		 1013 ctl2 = 0;
1014 if (panel->backlight.active_low_pwm)
1015 ctl2 |= BLM_POLARITY_I965;
1016 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 1017 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 1018 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW		 1019}
1020
0fb890c0
VK		 1021static void bxt_enable_backlight(struct intel_connector *connector)
1022{
1023 struct drm_device *dev = connector->base.dev;
1024 struct drm_i915_private *dev_priv = dev->dev_private;
1025 struct intel_panel *panel = &connector->panel;
1026 u32 pwm_ctl;
1027
1028 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1029 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1030 DRM_DEBUG_KMS("backlight already enabled\n");
1031 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1032 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1033 }
1034
1035 I915_WRITE(BXT_BLC_PWM_FREQ1, panel->backlight.max);
1036
1037 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1038
1039 pwm_ctl = 0;
1040 if (panel->backlight.active_low_pwm)
1041 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1042
1043 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1044 POSTING_READ(BXT_BLC_PWM_CTL1);
1045 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl | BXT_BLC_PWM_ENABLE);
1046}
1047
b029e66f
SK		 1048static void pwm_enable_backlight(struct intel_connector *connector)
1049{
1050 struct intel_panel *panel = &connector->panel;
1051
1052 pwm_enable(panel->backlight.pwm);
1053 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1054}
1055
752aa88a 1056void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 1057{
752aa88a 1058 struct drm_device *dev = connector->base.dev;
47356eb6 1059 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 1060 struct intel_panel *panel = &connector->panel;
752aa88a 1061 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 1062
260d8f98 1063 if (!panel->backlight.present)
752aa88a
JB		 1064 return;
1065
6f2bcceb 1066 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 1067
07f11d49 1068 mutex_lock(&dev_priv->backlight_lock);
47356eb6 1069
f91c15e0
JN		 1070 WARN_ON(panel->backlight.max == 0);
1071
13f3fbe8 1072 if (panel->backlight.level <= panel->backlight.min) {
f91c15e0 1073 panel->backlight.level = panel->backlight.max;
58c68779
JN		 1074 if (panel->backlight.device)
1075 panel->backlight.device->props.brightness =
6dda730e
JN		 1076 scale_hw_to_user(connector,
1077 panel->backlight.level,
1078 panel->backlight.device->props.max_brightness);
b6b3ba5b 1079 }
47356eb6 1080
5507faeb 1081 panel->backlight.enable(connector);
58c68779 1082 panel->backlight.enabled = true;
ab656bb9
JN		 1083 if (panel->backlight.device)
1084 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 1085
07f11d49 1086 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW		 1087}
1088
912e8b12 1089#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 1090static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 1091{
752aa88a 1092 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 1093 struct intel_panel *panel = &connector->panel;
752aa88a
JB		 1094 struct drm_device *dev = connector->base.dev;
1095
51fd371b 1096 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW		 1097 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1098 bd->props.brightness, bd->props.max_brightness);
752aa88a 1099 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 1100 bd->props.max_brightness);
ab656bb9
JN		 1101
1102 /*
1103 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1104 * backlight class device does not make it easy to to differentiate
1105 * between callbacks for brightness and bl_power, so our backlight_power
1106 * callback needs to take this into account.
1107 */
1108 if (panel->backlight.enabled) {
5507faeb 1109 if (panel->backlight.power) {
e6755fb7
JN		 1110 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1111 bd->props.brightness != 0;
5507faeb 1112 panel->backlight.power(connector, enable);
ab656bb9
JN		 1113 }
1114 } else {
1115 bd->props.power = FB_BLANK_POWERDOWN;
1116 }
1117
51fd371b 1118 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG		 1119 return 0;
1120}
1121
db31af1d 1122static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1123{
752aa88a
JB		 1124 struct intel_connector *connector = bl_get_data(bd);
1125 struct drm_device *dev = connector->base.dev;
c8c8fb33 1126 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1127 u32 hw_level;
7bd688cd 1128 int ret;
752aa88a 1129
c8c8fb33 1130 intel_runtime_pm_get(dev_priv);
51fd371b 1131 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN		 1132
1133 hw_level = intel_panel_get_backlight(connector);
1134 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1135
51fd371b 1136 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1137 intel_runtime_pm_put(dev_priv);
752aa88a 1138
7bd688cd 1139 return ret;
aaa6fd2a
MG		 1140}
1141
db31af1d
JN		 1142static const struct backlight_ops intel_backlight_device_ops = {
1143 .update_status = intel_backlight_device_update_status,
1144 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG		 1145};
1146
db31af1d 1147static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1148{
58c68779 1149 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1150 struct backlight_properties props;
aaa6fd2a 1151
58c68779 1152 if (WARN_ON(panel->backlight.device))
dc652f90
JN		 1153 return -ENODEV;
1154
0962c3c9
VS		 1155 if (!panel->backlight.present)
1156 return 0;
1157
6dda730e 1158 WARN_ON(panel->backlight.max == 0);
7bd688cd 1159
af437cfd 1160 memset(&props, 0, sizeof(props));
aaa6fd2a 1161 props.type = BACKLIGHT_RAW;
6dda730e
JN		 1162
1163 /*
1164 * Note: Everything should work even if the backlight device max
1165 * presented to the userspace is arbitrarily chosen.
1166 */
7bd688cd 1167 props.max_brightness = panel->backlight.max;
6dda730e
JN		 1168 props.brightness = scale_hw_to_user(connector,
1169 panel->backlight.level,
1170 props.max_brightness);
58c68779 1171
ab656bb9
JN		 1172 if (panel->backlight.enabled)
1173 props.power = FB_BLANK_UNBLANK;
1174 else
1175 props.power = FB_BLANK_POWERDOWN;
1176
58c68779
JN		 1177 /*
1178 * Note: using the same name independent of the connector prevents
1179 * registration of multiple backlight devices in the driver.
1180 */
1181 panel->backlight.device =
aaa6fd2a 1182 backlight_device_register("intel_backlight",
db31af1d
JN		 1183 connector->base.kdev,
1184 connector,
1185 &intel_backlight_device_ops, &props);
aaa6fd2a 1186
58c68779 1187 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1188 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN		 1189 PTR_ERR(panel->backlight.device));
1190 panel->backlight.device = NULL;
aaa6fd2a
MG		 1191 return -ENODEV;
1192 }
0962c3c9
VS		 1193
1194 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1195 connector->base.name);
1196
aaa6fd2a
MG		 1197 return 0;
1198}
1199
db31af1d 1200static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1201{
58c68779
JN		 1202 struct intel_panel *panel = &connector->panel;
1203
1204 if (panel->backlight.device) {
1205 backlight_device_unregister(panel->backlight.device);
1206 panel->backlight.device = NULL;
dc652f90 1207 }
aaa6fd2a 1208}
db31af1d
JN		 1209#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1210static int intel_backlight_device_register(struct intel_connector *connector)
1211{
1212 return 0;
1213}
1214static void intel_backlight_device_unregister(struct intel_connector *connector)
1215{
1216}
1217#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1218
f91c15e0 1219/*
aa17cdb4
JN		 1220 * SPT: This value represents the period of the PWM stream in clock periods
1221 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1222 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1223 */
1224static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1225{
1226 struct drm_device *dev = connector->base.dev;
1227 struct drm_i915_private *dev_priv = dev->dev_private;
1228 u32 mul, clock;
1229
1230 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1231 mul = 128;
1232 else
1233 mul = 16;
1234
1235 clock = MHz(24);
1236
1237 return clock / (pwm_freq_hz * mul);
1238}
1239
1240/*
1241 * LPT: This value represents the period of the PWM stream in clock periods
1242 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1243 * LPT SOUTH_CHICKEN2 register bit 5).
1244 */
1245static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1246{
1247 struct drm_device *dev = connector->base.dev;
1248 struct drm_i915_private *dev_priv = dev->dev_private;
1249 u32 mul, clock;
1250
1251 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1252 mul = 16;
1253 else
1254 mul = 128;
1255
1256 if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
1257 clock = MHz(135); /* LPT:H */
1258 else
1259 clock = MHz(24); /* LPT:LP */
1260
1261 return clock / (pwm_freq_hz * mul);
1262}
1263
1264/*
1265 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1266 * display raw clocks multiplied by 128.
1267 */
1268static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1269{
1270 struct drm_device *dev = connector->base.dev;
1271 int clock = MHz(intel_pch_rawclk(dev));
1272
1273 return clock / (pwm_freq_hz * 128);
1274}
1275
1276/*
1277 * Gen2: This field determines the number of time base events (display core
1278 * clock frequency/32) in total for a complete cycle of modulated backlight
1279 * control.
f91c15e0 1280 *
aa17cdb4
JN		 1281 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1282 * divided by 32.
1283 */
1284static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1285{
1286 struct drm_device *dev = connector->base.dev;
1287 struct drm_i915_private *dev_priv = dev->dev_private;
1288 int clock;
1289
1290 if (IS_PINEVIEW(dev))
1291 clock = intel_hrawclk(dev);
1292 else
1293 clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1294
1295 return clock / (pwm_freq_hz * 32);
1296}
1297
1298/*
1299 * Gen4: This value represents the period of the PWM stream in display core
1300 * clocks multiplied by 128.
1301 */
1302static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1303{
1304 struct drm_device *dev = connector->base.dev;
1305 struct drm_i915_private *dev_priv = dev->dev_private;
1306 int clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1307
1308 return clock / (pwm_freq_hz * 128);
1309}
1310
1311/*
1312 * VLV: This value represents the period of the PWM stream in display core
1313 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1314 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1315 */
1316static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1317{
1318 struct drm_device *dev = connector->base.dev;
1319 struct drm_i915_private *dev_priv = dev->dev_private;
1320 int clock;
1321
1322 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1323 if (IS_CHERRYVIEW(dev))
1324 return KHz(19200) / (pwm_freq_hz * 16);
1325 else
1326 return MHz(25) / (pwm_freq_hz * 16);
1327 } else {
1328 clock = intel_hrawclk(dev);
1329 return MHz(clock) / (pwm_freq_hz * 128);
1330 }
1331}
1332
1333static u32 get_backlight_max_vbt(struct intel_connector *connector)
1334{
1335 struct drm_device *dev = connector->base.dev;
1336 struct drm_i915_private *dev_priv = dev->dev_private;
5507faeb 1337 struct intel_panel *panel = &connector->panel;
aa17cdb4
JN		 1338 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1339 u32 pwm;
1340
1341 if (!pwm_freq_hz) {
1342 DRM_DEBUG_KMS("backlight frequency not specified in VBT\n");
1343 return 0;
1344 }
1345
5507faeb 1346 if (!panel->backlight.hz_to_pwm) {
aa17cdb4
JN		 1347 DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n");
1348 return 0;
1349 }
1350
5507faeb 1351 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
aa17cdb4
JN		 1352 if (!pwm) {
1353 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1354 return 0;
1355 }
1356
1357 DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz);
1358
1359 return pwm;
1360}
1361
1362/*
1363 * Note: The setup hooks can't assume pipe is set!
f91c15e0 1364 */
6dda730e
JN		 1365static u32 get_backlight_min_vbt(struct intel_connector *connector)
1366{
1367 struct drm_device *dev = connector->base.dev;
1368 struct drm_i915_private *dev_priv = dev->dev_private;
1369 struct intel_panel *panel = &connector->panel;
e1c412e7 1370 int min;
6dda730e
JN		 1371
1372 WARN_ON(panel->backlight.max == 0);
1373
e1c412e7
JN		 1374 /*
1375 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1376 * to problems. There are such machines out there. Either our
1377 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1378 * against this by letting the minimum be at most (arbitrarily chosen)
1379 * 25% of the max.
1380 */
1381 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1382 if (min != dev_priv->vbt.backlight.min_brightness) {
1383 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1384 dev_priv->vbt.backlight.min_brightness, min);
1385 }
1386
6dda730e 1387 /* vbt value is a coefficient in range [0..255] */
e1c412e7 1388 return scale(min, 0, 255, 0, panel->backlight.max);
6dda730e
JN		 1389}
1390
437b15b8 1391static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
aaa6fd2a 1392{
96ab4c70 1393 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1394 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV		 1395 struct intel_panel *panel = &connector->panel;
1396 u32 pch_ctl1, pch_ctl2, val;
1397
1398 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1399 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1400
1401 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1402 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN		 1403
1404 if (!panel->backlight.max)
1405 panel->backlight.max = get_backlight_max_vbt(connector);
1406
96ab4c70
DV		 1407 if (!panel->backlight.max)
1408 return -ENODEV;
1409
6dda730e
JN		 1410 panel->backlight.min = get_backlight_min_vbt(connector);
1411
437b15b8 1412 val = lpt_get_backlight(connector);
96ab4c70
DV		 1413 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1414
1415 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1416 panel->backlight.level != 0;
1417
1418 return 0;
1419}
1420
6517d273 1421static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1422{
636baebf
JN		 1423 struct drm_device *dev = connector->base.dev;
1424 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1425 struct intel_panel *panel = &connector->panel;
636baebf 1426 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1427
636baebf
JN		 1428 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1429 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1430
1431 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1432 panel->backlight.max = pch_ctl2 >> 16;
aa17cdb4
JN		 1433
1434 if (!panel->backlight.max)
1435 panel->backlight.max = get_backlight_max_vbt(connector);
1436
7bd688cd
JN		 1437 if (!panel->backlight.max)
1438 return -ENODEV;
1439
6dda730e
JN		 1440 panel->backlight.min = get_backlight_min_vbt(connector);
1441
7bd688cd
JN		 1442 val = pch_get_backlight(connector);
1443 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1444
636baebf
JN		 1445 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1446 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1447 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1448
7bd688cd
JN		 1449 return 0;
1450}
1451
6517d273 1452static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1453{
636baebf
JN		 1454 struct drm_device *dev = connector->base.dev;
1455 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1456 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1457 u32 ctl, val;
1458
1459 ctl = I915_READ(BLC_PWM_CTL);
1460
b6ab66aa 1461 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
636baebf
JN		 1462 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1463
1464 if (IS_PINEVIEW(dev))
1465 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1466
1467 panel->backlight.max = ctl >> 17;
aa17cdb4
JN		 1468
1469 if (!panel->backlight.max) {
1470 panel->backlight.max = get_backlight_max_vbt(connector);
1471 panel->backlight.max >>= 1;
1472 }
7bd688cd 1473
7bd688cd
JN		 1474 if (!panel->backlight.max)
1475 return -ENODEV;
1476
aa17cdb4
JN		 1477 if (panel->backlight.combination_mode)
1478 panel->backlight.max *= 0xff;
1479
6dda730e
JN		 1480 panel->backlight.min = get_backlight_min_vbt(connector);
1481
7bd688cd
JN		 1482 val = i9xx_get_backlight(connector);
1483 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1484
636baebf
JN		 1485 panel->backlight.enabled = panel->backlight.level != 0;
1486
7bd688cd
JN		 1487 return 0;
1488}
1489
6517d273 1490static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1491{
636baebf
JN		 1492 struct drm_device *dev = connector->base.dev;
1493 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1494 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1495 u32 ctl, ctl2, val;
1496
1497 ctl2 = I915_READ(BLC_PWM_CTL2);
1498 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1499 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1500
1501 ctl = I915_READ(BLC_PWM_CTL);
1502 panel->backlight.max = ctl >> 16;
aa17cdb4
JN		 1503
1504 if (!panel->backlight.max)
1505 panel->backlight.max = get_backlight_max_vbt(connector);
7bd688cd 1506
7bd688cd
JN		 1507 if (!panel->backlight.max)
1508 return -ENODEV;
1509
aa17cdb4
JN		 1510 if (panel->backlight.combination_mode)
1511 panel->backlight.max *= 0xff;
1512
6dda730e
JN		 1513 panel->backlight.min = get_backlight_min_vbt(connector);
1514
7bd688cd
JN		 1515 val = i9xx_get_backlight(connector);
1516 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1517
636baebf
JN		 1518 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1519 panel->backlight.level != 0;
1520
7bd688cd
JN		 1521 return 0;
1522}
1523
6517d273 1524static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
7bd688cd
JN		 1525{
1526 struct drm_device *dev = connector->base.dev;
1527 struct drm_i915_private *dev_priv = dev->dev_private;
1528 struct intel_panel *panel = &connector->panel;
636baebf 1529 u32 ctl, ctl2, val;
7bd688cd 1530
6517d273
VS		 1531 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1532 return -ENODEV;
1533
1534 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
636baebf
JN		 1535 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1536
6517d273 1537 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
636baebf 1538 panel->backlight.max = ctl >> 16;
aa17cdb4
JN		 1539
1540 if (!panel->backlight.max)
1541 panel->backlight.max = get_backlight_max_vbt(connector);
1542
7bd688cd
JN		 1543 if (!panel->backlight.max)
1544 return -ENODEV;
1545
6dda730e
JN		 1546 panel->backlight.min = get_backlight_min_vbt(connector);
1547
6517d273 1548 val = _vlv_get_backlight(dev, pipe);
7bd688cd
JN		 1549 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1550
636baebf
JN		 1551 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1552 panel->backlight.level != 0;
1553
7bd688cd
JN		 1554 return 0;
1555}
1556
0fb890c0
VK		 1557static int
1558bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1559{
1560 struct drm_device *dev = connector->base.dev;
1561 struct drm_i915_private *dev_priv = dev->dev_private;
1562 struct intel_panel *panel = &connector->panel;
1563 u32 pwm_ctl, val;
1564
1565 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1566 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1567
1568 panel->backlight.max = I915_READ(BXT_BLC_PWM_FREQ1);
aa17cdb4
JN		 1569
1570 if (!panel->backlight.max)
1571 panel->backlight.max = get_backlight_max_vbt(connector);
1572
0fb890c0
VK		 1573 if (!panel->backlight.max)
1574 return -ENODEV;
1575
1576 val = bxt_get_backlight(connector);
1577 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1578
1579 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1580 panel->backlight.level != 0;
1581
1582 return 0;
1583}
1584
b029e66f
SK		 1585static int pwm_setup_backlight(struct intel_connector *connector,
1586 enum pipe pipe)
1587{
1588 struct drm_device *dev = connector->base.dev;
1589 struct intel_panel *panel = &connector->panel;
1590 int retval;
1591
1592 /* Get the PWM chip for backlight control */
1593 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1594 if (IS_ERR(panel->backlight.pwm)) {
1595 DRM_ERROR("Failed to own the pwm chip\n");
1596 panel->backlight.pwm = NULL;
1597 return -ENODEV;
1598 }
1599
1600 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1601 CRC_PMIC_PWM_PERIOD_NS);
1602 if (retval < 0) {
1603 DRM_ERROR("Failed to configure the pwm chip\n");
1604 pwm_put(panel->backlight.pwm);
1605 panel->backlight.pwm = NULL;
1606 return retval;
1607 }
1608
1609 panel->backlight.min = 0; /* 0% */
1610 panel->backlight.max = 100; /* 100% */
1611 panel->backlight.level = DIV_ROUND_UP(
1612 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1613 CRC_PMIC_PWM_PERIOD_NS);
1614 panel->backlight.enabled = panel->backlight.level != 0;
1615
1616 return 0;
1617}
1618
6517d273 1619int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
aaa6fd2a 1620{
db31af1d 1621 struct drm_device *dev = connector->dev;
7bd688cd 1622 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1623 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1624 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1625 int ret;
db31af1d 1626
c675949e 1627 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD		 1628 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1629 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1630 } else {
1631 DRM_DEBUG_KMS("no backlight present per VBT\n");
1632 return 0;
1633 }
c675949e
JN		 1634 }
1635
5507faeb
JN		 1636 /* ensure intel_panel has been initialized first */
1637 if (WARN_ON(!panel->backlight.setup))
1638 return -ENODEV;
1639
7bd688cd 1640 /* set level and max in panel struct */
07f11d49 1641 mutex_lock(&dev_priv->backlight_lock);
5507faeb 1642 ret = panel->backlight.setup(intel_connector, pipe);
07f11d49 1643 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd
JN		 1644
1645 if (ret) {
1646 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1647 connector->name);
7bd688cd
JN		 1648 return ret;
1649 }
db31af1d 1650
c91c9f32
JN		 1651 panel->backlight.present = true;
1652
0962c3c9
VS		 1653 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1654 connector->name,
c445b3b1 1655 panel->backlight.enabled ? "enabled" : "disabled",
0962c3c9 1656 panel->backlight.level, panel->backlight.max);
c445b3b1 1657
aaa6fd2a
MG		 1658 return 0;
1659}
1660
db31af1d 1661void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1662{
db31af1d 1663 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1664 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1665
b029e66f
SK		 1666 /* dispose of the pwm */
1667 if (panel->backlight.pwm)
1668 pwm_put(panel->backlight.pwm);
1669
c91c9f32 1670 panel->backlight.present = false;
aaa6fd2a 1671}
1d508706 1672
7bd688cd 1673/* Set up chip specific backlight functions */
5507faeb
JN		 1674static void
1675intel_panel_init_backlight_funcs(struct intel_panel *panel)
7bd688cd 1676{
5507faeb
JN		 1677 struct intel_connector *intel_connector =
1678 container_of(panel, struct intel_connector, panel);
1679 struct drm_device *dev = intel_connector->base.dev;
7bd688cd
JN		 1680 struct drm_i915_private *dev_priv = dev->dev_private;
1681
0fb890c0 1682 if (IS_BROXTON(dev)) {
5507faeb
JN		 1683 panel->backlight.setup = bxt_setup_backlight;
1684 panel->backlight.enable = bxt_enable_backlight;
1685 panel->backlight.disable = bxt_disable_backlight;
1686 panel->backlight.set = bxt_set_backlight;
1687 panel->backlight.get = bxt_get_backlight;
437b15b8 1688 } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
5507faeb
JN		 1689 panel->backlight.setup = lpt_setup_backlight;
1690 panel->backlight.enable = lpt_enable_backlight;
1691 panel->backlight.disable = lpt_disable_backlight;
1692 panel->backlight.set = lpt_set_backlight;
1693 panel->backlight.get = lpt_get_backlight;
aa17cdb4 1694 if (HAS_PCH_LPT(dev))
5507faeb 1695 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
aa17cdb4 1696 else
5507faeb 1697 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
96ab4c70 1698 } else if (HAS_PCH_SPLIT(dev)) {
5507faeb
JN		 1699 panel->backlight.setup = pch_setup_backlight;
1700 panel->backlight.enable = pch_enable_backlight;
1701 panel->backlight.disable = pch_disable_backlight;
1702 panel->backlight.set = pch_set_backlight;
1703 panel->backlight.get = pch_get_backlight;
1704 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
7bd688cd 1705 } else if (IS_VALLEYVIEW(dev)) {
b029e66f 1706 if (dev_priv->vbt.has_mipi) {
5507faeb
JN		 1707 panel->backlight.setup = pwm_setup_backlight;
1708 panel->backlight.enable = pwm_enable_backlight;
1709 panel->backlight.disable = pwm_disable_backlight;
1710 panel->backlight.set = pwm_set_backlight;
1711 panel->backlight.get = pwm_get_backlight;
b029e66f 1712 } else {
5507faeb
JN		 1713 panel->backlight.setup = vlv_setup_backlight;
1714 panel->backlight.enable = vlv_enable_backlight;
1715 panel->backlight.disable = vlv_disable_backlight;
1716 panel->backlight.set = vlv_set_backlight;
1717 panel->backlight.get = vlv_get_backlight;
1718 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
b029e66f 1719 }
7bd688cd 1720 } else if (IS_GEN4(dev)) {
5507faeb
JN		 1721 panel->backlight.setup = i965_setup_backlight;
1722 panel->backlight.enable = i965_enable_backlight;
1723 panel->backlight.disable = i965_disable_backlight;
1724 panel->backlight.set = i9xx_set_backlight;
1725 panel->backlight.get = i9xx_get_backlight;
1726 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
7bd688cd 1727 } else {
5507faeb
JN		 1728 panel->backlight.setup = i9xx_setup_backlight;
1729 panel->backlight.enable = i9xx_enable_backlight;
1730 panel->backlight.disable = i9xx_disable_backlight;
1731 panel->backlight.set = i9xx_set_backlight;
1732 panel->backlight.get = i9xx_get_backlight;
1733 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
7bd688cd
JN		 1734 }
1735}
1736
dd06f90e 1737int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK		 1738 struct drm_display_mode *fixed_mode,
1739 struct drm_display_mode *downclock_mode)
1d508706 1740{
5507faeb
JN		 1741 intel_panel_init_backlight_funcs(panel);
1742
dd06f90e 1743 panel->fixed_mode = fixed_mode;
4b6ed685 1744 panel->downclock_mode = downclock_mode;
dd06f90e 1745
1d508706
JN		 1746 return 0;
1747}
1748
1749void intel_panel_fini(struct intel_panel *panel)
1750{
dd06f90e
JN		 1751 struct intel_connector *intel_connector =
1752 container_of(panel, struct intel_connector, panel);
1753
1754 if (panel->fixed_mode)
1755 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK		 1756
1757 if (panel->downclock_mode)
1758 drm_mode_destroy(intel_connector->base.dev,
1759 panel->downclock_mode);
1d508706 1760}
0962c3c9
VS		 1761
1762void intel_backlight_register(struct drm_device *dev)
1763{
1764 struct intel_connector *connector;
1765
1766 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1767 intel_backlight_device_register(connector);
1768}
1769
1770void intel_backlight_unregister(struct drm_device *dev)
1771{
1772 struct intel_connector *connector;
1773
1774 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1775 intel_backlight_device_unregister(connector);
1776}
Linux kernel - Deliverables
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