[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_ringbuffer.h

#ifndef _INTEL_RINGBUFFER_H_
#define _INTEL_RINGBUFFER_H_

struct  intel_hw_status_page {
	void		*page_addr;
	unsigned int	gfx_addr;
	struct		drm_gem_object *obj;
};

struct drm_i915_gem_execbuffer2;
struct  intel_ring_buffer {
	const char	*name;
	struct		ring_regs {
			u32 ctl;
			u32 head;
			u32 tail;
			u32 start;
	} regs;
	unsigned long	size;
	unsigned int	alignment;
	void		*virtual_start;
	struct		drm_device *dev;
	struct		drm_gem_object *gem_object;

	unsigned int	head;
	unsigned int	tail;
	unsigned int	space;
	struct intel_hw_status_page status_page;

	u32		irq_gem_seqno;		/* last seq seem at irq time */
	u32		waiting_gem_seqno;
	int		user_irq_refcount;
	void		(*user_irq_get)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*user_irq_put)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*setup_status_page)(struct drm_device *dev,
			struct	intel_ring_buffer *ring);

	int		(*init)(struct drm_device *dev,
			struct intel_ring_buffer *ring);

	unsigned int	(*get_head)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	unsigned int	(*get_tail)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	unsigned int	(*get_active_head)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*advance_ring)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*flush)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			u32	invalidate_domains,
			u32	flush_domains);
	u32		(*add_request)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			struct drm_file *file_priv,
			u32 flush_domains);
	u32		(*get_gem_seqno)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	int		(*dispatch_gem_execbuffer)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			struct drm_i915_gem_execbuffer2 *exec,
			struct drm_clip_rect *cliprects,
			uint64_t exec_offset);

	/**
	 * List of objects currently involved in rendering from the
	 * ringbuffer.
	 *
	 * Includes buffers having the contents of their GPU caches
	 * flushed, not necessarily primitives.  last_rendering_seqno
	 * represents when the rendering involved will be completed.
	 *
	 * A reference is held on the buffer while on this list.
	 */
	struct list_head active_list;

	/**
	 * List of breadcrumbs associated with GPU requests currently
	 * outstanding.
	 */
	struct list_head request_list;

	/**
	 * Do we have some not yet emitted requests outstanding?
	 */
	bool outstanding_lazy_request;

	wait_queue_head_t irq_queue;
	drm_local_map_t map;
};

static inline u32
intel_read_status_page(struct intel_ring_buffer *ring,
		int reg)
{
	u32 *regs = ring->status_page.page_addr;
	return regs[reg];
}

int intel_init_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
void intel_cleanup_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
int intel_wait_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring, int n);
int intel_wrap_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
void intel_ring_begin(struct drm_device *dev,
		struct intel_ring_buffer *ring, int n);

static inline void intel_ring_emit(struct drm_device *dev,
				   struct intel_ring_buffer *ring,
				   unsigned int data)
{
	unsigned int *virt = ring->virtual_start + ring->tail;
	*virt = data;
	ring->tail += 4;
}

void intel_fill_struct(struct drm_device *dev,
		struct intel_ring_buffer *ring,
		void *data,
		unsigned int len);
void intel_ring_advance(struct drm_device *dev,
		struct intel_ring_buffer *ring);

u32 intel_ring_get_seqno(struct drm_device *dev,
		struct intel_ring_buffer *ring);

extern struct intel_ring_buffer render_ring;
extern struct intel_ring_buffer bsd_ring;

#endif /* _INTEL_RINGBUFFER_H_ */
Commit	Line	Data
8187a2b7 ZN	1	#ifndef _INTEL_RINGBUFFER_H_
	2	#define _INTEL_RINGBUFFER_H_
	3
	4	struct intel_hw_status_page {
	5	void *page_addr;
	6	unsigned int gfx_addr;
	7	struct drm_gem_object *obj;
	8	};
	9
	10	struct drm_i915_gem_execbuffer2;
	11	struct intel_ring_buffer {
	12	const char *name;
	13	struct ring_regs {
	14	u32 ctl;
	15	u32 head;
	16	u32 tail;
	17	u32 start;
	18	} regs;
8187a2b7 ZN	19	unsigned long size;
	20	unsigned int alignment;
	21	void *virtual_start;
	22	struct drm_device *dev;
	23	struct drm_gem_object *gem_object;
	24
	25	unsigned int head;
	26	unsigned int tail;
	27	unsigned int space;
8187a2b7 ZN	28	struct intel_hw_status_page status_page;
	29
	30	u32 irq_gem_seqno; /* last seq seem at irq time */
	31	u32 waiting_gem_seqno;
	32	int user_irq_refcount;
	33	void (user_irq_get)(struct drm_device dev,
	34	struct intel_ring_buffer *ring);
	35	void (user_irq_put)(struct drm_device dev,
	36	struct intel_ring_buffer *ring);
	37	void (setup_status_page)(struct drm_device dev,
	38	struct intel_ring_buffer *ring);
	39
	40	int (init)(struct drm_device dev,
	41	struct intel_ring_buffer *ring);
	42
	43	unsigned int (get_head)(struct drm_device dev,
	44	struct intel_ring_buffer *ring);
	45	unsigned int (get_tail)(struct drm_device dev,
	46	struct intel_ring_buffer *ring);
	47	unsigned int (get_active_head)(struct drm_device dev,
	48	struct intel_ring_buffer *ring);
	49	void (advance_ring)(struct drm_device dev,
	50	struct intel_ring_buffer *ring);
	51	void (flush)(struct drm_device dev,
	52	struct intel_ring_buffer *ring,
	53	u32 invalidate_domains,
	54	u32 flush_domains);
	55	u32 (add_request)(struct drm_device dev,
	56	struct intel_ring_buffer *ring,
	57	struct drm_file *file_priv,
	58	u32 flush_domains);
	59	u32 (get_gem_seqno)(struct drm_device dev,
	60	struct intel_ring_buffer *ring);
	61	int (dispatch_gem_execbuffer)(struct drm_device dev,
	62	struct intel_ring_buffer *ring,
	63	struct drm_i915_gem_execbuffer2 *exec,
	64	struct drm_clip_rect *cliprects,
	65	uint64_t exec_offset);
	66
	67	/**
	68	* List of objects currently involved in rendering from the
	69	* ringbuffer.
	70	*
	71	* Includes buffers having the contents of their GPU caches
	72	* flushed, not necessarily primitives. last_rendering_seqno
	73	* represents when the rendering involved will be completed.
	74	*
	75	* A reference is held on the buffer while on this list.
	76	*/
	77	struct list_head active_list;
	78
	79	/**
	80	* List of breadcrumbs associated with GPU requests currently
	81	* outstanding.
	82	*/
	83	struct list_head request_list;
	84
a6910434 DV	85	/**
	86	* Do we have some not yet emitted requests outstanding?
	87	*/
	88	bool outstanding_lazy_request;
	89
8187a2b7 ZN	90	wait_queue_head_t irq_queue;
	91	drm_local_map_t map;
	92	};
	93
	94	static inline u32
	95	intel_read_status_page(struct intel_ring_buffer *ring,
	96	int reg)
	97	{
	98	u32 *regs = ring->status_page.page_addr;
	99	return regs[reg];
	100	}
	101
	102	int intel_init_ring_buffer(struct drm_device *dev,
	103	struct intel_ring_buffer *ring);
	104	void intel_cleanup_ring_buffer(struct drm_device *dev,
	105	struct intel_ring_buffer *ring);
	106	int intel_wait_ring_buffer(struct drm_device *dev,
	107	struct intel_ring_buffer *ring, int n);
	108	int intel_wrap_ring_buffer(struct drm_device *dev,
	109	struct intel_ring_buffer *ring);
	110	void intel_ring_begin(struct drm_device *dev,
	111	struct intel_ring_buffer *ring, int n);
e898cd22 CW	112
	113	static inline void intel_ring_emit(struct drm_device *dev,
	114	struct intel_ring_buffer *ring,
	115	unsigned int data)
	116	{
	117	unsigned int *virt = ring->virtual_start + ring->tail;
	118	*virt = data;
	119	ring->tail += 4;
	120	}
	121
8187a2b7 ZN	122	void intel_fill_struct(struct drm_device *dev,
	123	struct intel_ring_buffer *ring,
	124	void *data,
	125	unsigned int len);
	126	void intel_ring_advance(struct drm_device *dev,
	127	struct intel_ring_buffer *ring);
	128
	129	u32 intel_ring_get_seqno(struct drm_device *dev,
	130	struct intel_ring_buffer *ring);
	131
	132	extern struct intel_ring_buffer render_ring;
	133	extern struct intel_ring_buffer bsd_ring;
	134
	135	#endif /* _INTEL_RINGBUFFER_H_ */