[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_ringbuffer.h

#ifndef _INTEL_RINGBUFFER_H_
#define _INTEL_RINGBUFFER_H_

struct  intel_hw_status_page {
	void		*page_addr;
	unsigned int	gfx_addr;
	struct		drm_gem_object *obj;
};

#define I915_READ_TAIL(ring) I915_READ(RING_TAIL(ring->mmio_base))
#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)

struct drm_i915_gem_execbuffer2;
struct  intel_ring_buffer {
	const char	*name;
	enum intel_ring_id {
		RING_RENDER = 0x1,
		RING_BSD = 0x2,
	} id;
	struct		ring_regs {
			u32 ctl;
			u32 head;
			u32 start;
	} regs;
	u32		mmio_base;
	unsigned long	size;
	unsigned int	alignment;
	void		*virtual_start;
	struct		drm_device *dev;
	struct		drm_gem_object *gem_object;

	unsigned int	head;
	unsigned int	tail;
	unsigned int	space;
	struct intel_hw_status_page status_page;

	u32		irq_gem_seqno;		/* last seq seem at irq time */
	u32		waiting_gem_seqno;
	int		user_irq_refcount;
	void		(*user_irq_get)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*user_irq_put)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*setup_status_page)(struct drm_device *dev,
			struct	intel_ring_buffer *ring);

	int		(*init)(struct drm_device *dev,
			struct intel_ring_buffer *ring);

	unsigned int	(*get_head)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*set_tail)(struct drm_device *dev,
				    struct intel_ring_buffer *ring,
				    u32 value);
	unsigned int	(*get_active_head)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*flush)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			u32	invalidate_domains,
			u32	flush_domains);
	u32		(*add_request)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			struct drm_file *file_priv,
			u32 flush_domains);
	u32		(*get_gem_seqno)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	int		(*dispatch_gem_execbuffer)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			struct drm_i915_gem_execbuffer2 *exec,
			struct drm_clip_rect *cliprects,
			uint64_t exec_offset);

	/**
	 * List of objects currently involved in rendering from the
	 * ringbuffer.
	 *
	 * Includes buffers having the contents of their GPU caches
	 * flushed, not necessarily primitives.  last_rendering_seqno
	 * represents when the rendering involved will be completed.
	 *
	 * A reference is held on the buffer while on this list.
	 */
	struct list_head active_list;

	/**
	 * List of breadcrumbs associated with GPU requests currently
	 * outstanding.
	 */
	struct list_head request_list;

	/**
	 * Do we have some not yet emitted requests outstanding?
	 */
	bool outstanding_lazy_request;

	wait_queue_head_t irq_queue;
	drm_local_map_t map;
};

static inline u32
intel_read_status_page(struct intel_ring_buffer *ring,
		int reg)
{
	u32 *regs = ring->status_page.page_addr;
	return regs[reg];
}

int intel_init_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
void intel_cleanup_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
int intel_wait_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring, int n);
int intel_wrap_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
void intel_ring_begin(struct drm_device *dev,
		struct intel_ring_buffer *ring, int n);

static inline void intel_ring_emit(struct drm_device *dev,
				   struct intel_ring_buffer *ring,
				   unsigned int data)
{
	unsigned int *virt = ring->virtual_start + ring->tail;
	*virt = data;
	ring->tail += 4;
}

void intel_fill_struct(struct drm_device *dev,
		struct intel_ring_buffer *ring,
		void *data,
		unsigned int len);
void intel_ring_advance(struct drm_device *dev,
		struct intel_ring_buffer *ring);

u32 intel_ring_get_seqno(struct drm_device *dev,
		struct intel_ring_buffer *ring);

int intel_init_render_ring_buffer(struct drm_device *dev);
int intel_init_bsd_ring_buffer(struct drm_device *dev);

#endif /* _INTEL_RINGBUFFER_H_ */
Commit	Line	Data
8187a2b7 ZN	1	#ifndef _INTEL_RINGBUFFER_H_
	2	#define _INTEL_RINGBUFFER_H_
	3
	4	struct intel_hw_status_page {
	5	void *page_addr;
	6	unsigned int gfx_addr;
	7	struct drm_gem_object *obj;
	8	};
	9
870e86dd DV	10	#define I915_READ_TAIL(ring) I915_READ(RING_TAIL(ring->mmio_base))
	11	#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)
	12
8187a2b7 ZN	13	struct drm_i915_gem_execbuffer2;
	14	struct intel_ring_buffer {
	15	const char *name;
9220434a CW	16	enum intel_ring_id {
	17	RING_RENDER = 0x1,
	18	RING_BSD = 0x2,
	19	} id;
8187a2b7 ZN	20	struct ring_regs {
	21	u32 ctl;
	22	u32 head;
8187a2b7 ZN	23	u32 start;
8187a2b7 ZN	24	} regs;
333e9fe9	25	u32 mmio_base;
8187a2b7 ZN	26	unsigned long size;
	27	unsigned int alignment;
	28	void *virtual_start;
	29	struct drm_device *dev;
	30	struct drm_gem_object *gem_object;
	31
	32	unsigned int head;
	33	unsigned int tail;
	34	unsigned int space;
8187a2b7 ZN	35	struct intel_hw_status_page status_page;
	36
	37	u32 irq_gem_seqno; /* last seq seem at irq time */
	38	u32 waiting_gem_seqno;
	39	int user_irq_refcount;
	40	void (user_irq_get)(struct drm_device dev,
	41	struct intel_ring_buffer *ring);
	42	void (user_irq_put)(struct drm_device dev,
	43	struct intel_ring_buffer *ring);
	44	void (setup_status_page)(struct drm_device dev,
	45	struct intel_ring_buffer *ring);
	46
	47	int (init)(struct drm_device dev,
	48	struct intel_ring_buffer *ring);
	49
	50	unsigned int (get_head)(struct drm_device dev,
	51	struct intel_ring_buffer *ring);
d46eefa2	52	void (set_tail)(struct drm_device dev,
870e86dd DV	53	struct intel_ring_buffer *ring,
870e86dd DV	54	u32 value);
8187a2b7 ZN	55	unsigned int (get_active_head)(struct drm_device dev,
8187a2b7 ZN	56	struct intel_ring_buffer *ring);
8187a2b7 ZN	57	void (flush)(struct drm_device dev,
	58	struct intel_ring_buffer *ring,
	59	u32 invalidate_domains,
	60	u32 flush_domains);
	61	u32 (add_request)(struct drm_device dev,
	62	struct intel_ring_buffer *ring,
	63	struct drm_file *file_priv,
	64	u32 flush_domains);
	65	u32 (get_gem_seqno)(struct drm_device dev,
	66	struct intel_ring_buffer *ring);
	67	int (dispatch_gem_execbuffer)(struct drm_device dev,
	68	struct intel_ring_buffer *ring,
	69	struct drm_i915_gem_execbuffer2 *exec,
	70	struct drm_clip_rect *cliprects,
	71	uint64_t exec_offset);
	72
	73	/**
	74	* List of objects currently involved in rendering from the
	75	* ringbuffer.
	76	*
	77	* Includes buffers having the contents of their GPU caches
	78	* flushed, not necessarily primitives. last_rendering_seqno
	79	* represents when the rendering involved will be completed.
	80	*
	81	* A reference is held on the buffer while on this list.
	82	*/
	83	struct list_head active_list;
	84
	85	/**
	86	* List of breadcrumbs associated with GPU requests currently
	87	* outstanding.
	88	*/
	89	struct list_head request_list;
	90
a6910434 DV	91	/**
	92	* Do we have some not yet emitted requests outstanding?
	93	*/
	94	bool outstanding_lazy_request;
	95
8187a2b7 ZN	96	wait_queue_head_t irq_queue;
	97	drm_local_map_t map;
	98	};
	99
	100	static inline u32
	101	intel_read_status_page(struct intel_ring_buffer *ring,
	102	int reg)
	103	{
	104	u32 *regs = ring->status_page.page_addr;
	105	return regs[reg];
	106	}
	107
	108	int intel_init_ring_buffer(struct drm_device *dev,
	109	struct intel_ring_buffer *ring);
	110	void intel_cleanup_ring_buffer(struct drm_device *dev,
	111	struct intel_ring_buffer *ring);
	112	int intel_wait_ring_buffer(struct drm_device *dev,
	113	struct intel_ring_buffer *ring, int n);
	114	int intel_wrap_ring_buffer(struct drm_device *dev,
	115	struct intel_ring_buffer *ring);
	116	void intel_ring_begin(struct drm_device *dev,
	117	struct intel_ring_buffer *ring, int n);
e898cd22 CW	118
	119	static inline void intel_ring_emit(struct drm_device *dev,
	120	struct intel_ring_buffer *ring,
	121	unsigned int data)
	122	{
	123	unsigned int *virt = ring->virtual_start + ring->tail;
	124	*virt = data;
	125	ring->tail += 4;
	126	}
	127
8187a2b7 ZN	128	void intel_fill_struct(struct drm_device *dev,
	129	struct intel_ring_buffer *ring,
	130	void *data,
	131	unsigned int len);
	132	void intel_ring_advance(struct drm_device *dev,
	133	struct intel_ring_buffer *ring);
	134
	135	u32 intel_ring_get_seqno(struct drm_device *dev,
	136	struct intel_ring_buffer *ring);
	137
5c1143bb XH	138	int intel_init_render_ring_buffer(struct drm_device *dev);
5c1143bb XH	139	int intel_init_bsd_ring_buffer(struct drm_device *dev);
8187a2b7 ZN	140
8187a2b7 ZN	141	#endif /* _INTEL_RINGBUFFER_H_ */