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3d1b35a3 AY |
1 | /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. |
2 | * | |
b21f4b65 | 3 | * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now) |
3d1b35a3 AY |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | #include <linux/module.h> | |
10 | #include <linux/platform_device.h> | |
11 | #include <linux/component.h> | |
12 | #include <linux/mfd/syscon.h> | |
13 | #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> | |
b21f4b65 | 14 | #include <drm/bridge/dw_hdmi.h> |
3d1b35a3 AY |
15 | #include <video/imx-ipu-v3.h> |
16 | #include <linux/regmap.h> | |
17 | #include <drm/drm_of.h> | |
18 | #include <drm/drmP.h> | |
19 | #include <drm/drm_crtc_helper.h> | |
20 | #include <drm/drm_edid.h> | |
21 | #include <drm/drm_encoder_slave.h> | |
22 | ||
23 | #include "imx-drm.h" | |
3d1b35a3 | 24 | |
b21f4b65 | 25 | struct imx_hdmi { |
3d1b35a3 AY |
26 | struct device *dev; |
27 | struct drm_encoder encoder; | |
28 | struct regmap *regmap; | |
29 | }; | |
30 | ||
b21f4b65 | 31 | static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = { |
aaa757a0 AY |
32 | { |
33 | 45250000, { | |
34 | { 0x01e0, 0x0000 }, | |
35 | { 0x21e1, 0x0000 }, | |
36 | { 0x41e2, 0x0000 } | |
37 | }, | |
38 | }, { | |
39 | 92500000, { | |
40 | { 0x0140, 0x0005 }, | |
41 | { 0x2141, 0x0005 }, | |
42 | { 0x4142, 0x0005 }, | |
43 | }, | |
44 | }, { | |
45 | 148500000, { | |
46 | { 0x00a0, 0x000a }, | |
47 | { 0x20a1, 0x000a }, | |
48 | { 0x40a2, 0x000a }, | |
49 | }, | |
50 | }, { | |
51 | ~0UL, { | |
52 | { 0x00a0, 0x000a }, | |
53 | { 0x2001, 0x000f }, | |
54 | { 0x4002, 0x000f }, | |
55 | }, | |
56 | } | |
57 | }; | |
58 | ||
b21f4b65 | 59 | static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = { |
aaa757a0 AY |
60 | /* pixelclk bpp8 bpp10 bpp12 */ |
61 | { | |
62 | 54000000, { 0x091c, 0x091c, 0x06dc }, | |
63 | }, { | |
64 | 58400000, { 0x091c, 0x06dc, 0x06dc }, | |
65 | }, { | |
66 | 72000000, { 0x06dc, 0x06dc, 0x091c }, | |
67 | }, { | |
68 | 74250000, { 0x06dc, 0x0b5c, 0x091c }, | |
69 | }, { | |
70 | 118800000, { 0x091c, 0x091c, 0x06dc }, | |
71 | }, { | |
72 | 216000000, { 0x06dc, 0x0b5c, 0x091c }, | |
6e8958ec PZ |
73 | }, { |
74 | ~0UL, { 0x0000, 0x0000, 0x0000 }, | |
75 | }, | |
aaa757a0 AY |
76 | }; |
77 | ||
034705a4 YY |
78 | static const struct dw_hdmi_phy_config imx_phy_config[] = { |
79 | /*pixelclk symbol term vlev */ | |
80 | { 148500000, 0x800d, 0x0005, 0x01ad}, | |
81 | { ~0UL, 0x0000, 0x0000, 0x0000} | |
aaa757a0 AY |
82 | }; |
83 | ||
b21f4b65 | 84 | static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi) |
3d1b35a3 AY |
85 | { |
86 | struct device_node *np = hdmi->dev->of_node; | |
87 | ||
88 | hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr"); | |
89 | if (IS_ERR(hdmi->regmap)) { | |
90 | dev_err(hdmi->dev, "Unable to get gpr\n"); | |
91 | return PTR_ERR(hdmi->regmap); | |
92 | } | |
93 | ||
94 | return 0; | |
95 | } | |
96 | ||
b21f4b65 | 97 | static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder) |
3d1b35a3 AY |
98 | { |
99 | } | |
100 | ||
b21f4b65 AY |
101 | static bool dw_hdmi_imx_encoder_mode_fixup(struct drm_encoder *encoder, |
102 | const struct drm_display_mode *mode, | |
103 | struct drm_display_mode *adj_mode) | |
3d1b35a3 AY |
104 | { |
105 | return true; | |
106 | } | |
107 | ||
b21f4b65 AY |
108 | static void dw_hdmi_imx_encoder_mode_set(struct drm_encoder *encoder, |
109 | struct drm_display_mode *mode, | |
110 | struct drm_display_mode *adj_mode) | |
3d1b35a3 AY |
111 | { |
112 | } | |
113 | ||
b21f4b65 | 114 | static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder) |
3d1b35a3 | 115 | { |
b21f4b65 | 116 | struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder); |
3d1b35a3 AY |
117 | int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); |
118 | ||
119 | regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, | |
120 | IMX6Q_GPR3_HDMI_MUX_CTL_MASK, | |
121 | mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT); | |
122 | } | |
123 | ||
b21f4b65 | 124 | static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder) |
3d1b35a3 | 125 | { |
2872c807 | 126 | imx_drm_set_bus_format(encoder, MEDIA_BUS_FMT_RGB888_1X24); |
3d1b35a3 AY |
127 | } |
128 | ||
b21f4b65 AY |
129 | static struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = { |
130 | .mode_fixup = dw_hdmi_imx_encoder_mode_fixup, | |
131 | .mode_set = dw_hdmi_imx_encoder_mode_set, | |
132 | .prepare = dw_hdmi_imx_encoder_prepare, | |
133 | .commit = dw_hdmi_imx_encoder_commit, | |
134 | .disable = dw_hdmi_imx_encoder_disable, | |
3d1b35a3 AY |
135 | }; |
136 | ||
b21f4b65 | 137 | static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = { |
3d1b35a3 AY |
138 | .destroy = drm_encoder_cleanup, |
139 | }; | |
140 | ||
081c80e8 PZ |
141 | static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con, |
142 | struct drm_display_mode *mode) | |
143 | { | |
144 | if (mode->clock < 13500) | |
145 | return MODE_CLOCK_LOW; | |
146 | if (mode->clock > 266000) | |
147 | return MODE_CLOCK_HIGH; | |
148 | ||
149 | return MODE_OK; | |
150 | } | |
151 | ||
152 | static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con, | |
153 | struct drm_display_mode *mode) | |
154 | { | |
155 | if (mode->clock < 13500) | |
156 | return MODE_CLOCK_LOW; | |
157 | if (mode->clock > 270000) | |
158 | return MODE_CLOCK_HIGH; | |
159 | ||
160 | return MODE_OK; | |
161 | } | |
162 | ||
b21f4b65 | 163 | static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = { |
081c80e8 PZ |
164 | .mpll_cfg = imx_mpll_cfg, |
165 | .cur_ctr = imx_cur_ctr, | |
034705a4 | 166 | .phy_config = imx_phy_config, |
081c80e8 PZ |
167 | .dev_type = IMX6Q_HDMI, |
168 | .mode_valid = imx6q_hdmi_mode_valid, | |
3d1b35a3 AY |
169 | }; |
170 | ||
b21f4b65 | 171 | static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = { |
aaa757a0 AY |
172 | .mpll_cfg = imx_mpll_cfg, |
173 | .cur_ctr = imx_cur_ctr, | |
034705a4 | 174 | .phy_config = imx_phy_config, |
3d1b35a3 | 175 | .dev_type = IMX6DL_HDMI, |
081c80e8 | 176 | .mode_valid = imx6dl_hdmi_mode_valid, |
3d1b35a3 AY |
177 | }; |
178 | ||
b21f4b65 | 179 | static const struct of_device_id dw_hdmi_imx_dt_ids[] = { |
3d1b35a3 AY |
180 | { .compatible = "fsl,imx6q-hdmi", |
181 | .data = &imx6q_hdmi_drv_data | |
182 | }, { | |
183 | .compatible = "fsl,imx6dl-hdmi", | |
184 | .data = &imx6dl_hdmi_drv_data | |
185 | }, | |
186 | {}, | |
187 | }; | |
b21f4b65 | 188 | MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids); |
3d1b35a3 | 189 | |
b21f4b65 AY |
190 | static int dw_hdmi_imx_bind(struct device *dev, struct device *master, |
191 | void *data) | |
3d1b35a3 AY |
192 | { |
193 | struct platform_device *pdev = to_platform_device(dev); | |
b21f4b65 | 194 | const struct dw_hdmi_plat_data *plat_data; |
3d1b35a3 AY |
195 | const struct of_device_id *match; |
196 | struct drm_device *drm = data; | |
197 | struct drm_encoder *encoder; | |
b21f4b65 | 198 | struct imx_hdmi *hdmi; |
3d1b35a3 AY |
199 | struct resource *iores; |
200 | int irq; | |
201 | int ret; | |
202 | ||
203 | if (!pdev->dev.of_node) | |
204 | return -ENODEV; | |
205 | ||
206 | hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); | |
207 | if (!hdmi) | |
208 | return -ENOMEM; | |
209 | ||
b21f4b65 | 210 | match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node); |
3d1b35a3 AY |
211 | plat_data = match->data; |
212 | hdmi->dev = &pdev->dev; | |
213 | encoder = &hdmi->encoder; | |
214 | ||
215 | irq = platform_get_irq(pdev, 0); | |
216 | if (irq < 0) | |
217 | return irq; | |
218 | ||
219 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
220 | if (!iores) | |
221 | return -ENXIO; | |
222 | ||
223 | platform_set_drvdata(pdev, hdmi); | |
224 | ||
225 | encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); | |
226 | /* | |
227 | * If we failed to find the CRTC(s) which this encoder is | |
228 | * supposed to be connected to, it's because the CRTC has | |
229 | * not been registered yet. Defer probing, and hope that | |
230 | * the required CRTC is added later. | |
231 | */ | |
232 | if (encoder->possible_crtcs == 0) | |
233 | return -EPROBE_DEFER; | |
234 | ||
b21f4b65 | 235 | ret = dw_hdmi_imx_parse_dt(hdmi); |
3d1b35a3 AY |
236 | if (ret < 0) |
237 | return ret; | |
238 | ||
b21f4b65 AY |
239 | drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs); |
240 | drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs, | |
3d1b35a3 AY |
241 | DRM_MODE_ENCODER_TMDS); |
242 | ||
b21f4b65 | 243 | return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data); |
3d1b35a3 AY |
244 | } |
245 | ||
b21f4b65 AY |
246 | static void dw_hdmi_imx_unbind(struct device *dev, struct device *master, |
247 | void *data) | |
3d1b35a3 | 248 | { |
b21f4b65 | 249 | return dw_hdmi_unbind(dev, master, data); |
3d1b35a3 AY |
250 | } |
251 | ||
b21f4b65 AY |
252 | static const struct component_ops dw_hdmi_imx_ops = { |
253 | .bind = dw_hdmi_imx_bind, | |
254 | .unbind = dw_hdmi_imx_unbind, | |
3d1b35a3 AY |
255 | }; |
256 | ||
b21f4b65 | 257 | static int dw_hdmi_imx_probe(struct platform_device *pdev) |
3d1b35a3 | 258 | { |
b21f4b65 | 259 | return component_add(&pdev->dev, &dw_hdmi_imx_ops); |
3d1b35a3 AY |
260 | } |
261 | ||
b21f4b65 | 262 | static int dw_hdmi_imx_remove(struct platform_device *pdev) |
3d1b35a3 | 263 | { |
b21f4b65 | 264 | component_del(&pdev->dev, &dw_hdmi_imx_ops); |
3d1b35a3 AY |
265 | |
266 | return 0; | |
267 | } | |
268 | ||
b21f4b65 AY |
269 | static struct platform_driver dw_hdmi_imx_platform_driver = { |
270 | .probe = dw_hdmi_imx_probe, | |
271 | .remove = dw_hdmi_imx_remove, | |
3d1b35a3 | 272 | .driver = { |
b21f4b65 AY |
273 | .name = "dwhdmi-imx", |
274 | .of_match_table = dw_hdmi_imx_dt_ids, | |
3d1b35a3 AY |
275 | }, |
276 | }; | |
277 | ||
b21f4b65 | 278 | module_platform_driver(dw_hdmi_imx_platform_driver); |
3d1b35a3 AY |
279 | |
280 | MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>"); | |
281 | MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>"); | |
282 | MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension"); | |
283 | MODULE_LICENSE("GPL"); | |
b21f4b65 | 284 | MODULE_ALIAS("platform:dwhdmi-imx"); |