Commit | Line | Data |
---|---|---|
b8d181e4 PZ |
1 | #ifndef __IPUV3_PLANE_H__ |
2 | #define __IPUV3_PLANE_H__ | |
3 | ||
4 | #include <drm/drm_crtc.h> /* drm_plane */ | |
5 | ||
6 | struct drm_plane; | |
7 | struct drm_device; | |
8 | struct ipu_soc; | |
9 | struct drm_crtc; | |
10 | struct drm_framebuffer; | |
11 | ||
12 | struct ipuv3_channel; | |
13 | struct dmfc_channel; | |
14 | struct ipu_dp; | |
15 | ||
16 | struct ipu_plane { | |
17 | struct drm_plane base; | |
18 | ||
19 | struct ipu_soc *ipu; | |
20 | struct ipuv3_channel *ipu_ch; | |
21 | struct dmfc_channel *dmfc; | |
22 | struct ipu_dp *dp; | |
23 | ||
24 | int dma; | |
25 | int dp_flow; | |
26 | ||
27 | int x; | |
28 | int y; | |
9a666030 PZ |
29 | int w; |
30 | int h; | |
b8d181e4 | 31 | |
67ca6b60 PZ |
32 | unsigned int u_offset; |
33 | unsigned int v_offset; | |
34 | unsigned int stride[2]; | |
35 | ||
b8d181e4 PZ |
36 | bool enabled; |
37 | }; | |
38 | ||
39 | struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, | |
40 | int dma, int dp, unsigned int possible_crtcs, | |
43895599 | 41 | enum drm_plane_type type); |
b8d181e4 PZ |
42 | |
43 | /* Init IDMAC, DMFC, DP */ | |
44 | int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc, | |
45 | struct drm_display_mode *mode, | |
46 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, | |
47 | unsigned int crtc_w, unsigned int crtc_h, | |
48 | uint32_t src_x, uint32_t src_y, uint32_t src_w, | |
dd7fa6d8 | 49 | uint32_t src_h, bool interlaced); |
b8d181e4 PZ |
50 | |
51 | void ipu_plane_enable(struct ipu_plane *plane); | |
52 | void ipu_plane_disable(struct ipu_plane *plane); | |
53 | int ipu_plane_set_base(struct ipu_plane *plane, struct drm_framebuffer *fb, | |
54 | int x, int y); | |
55 | ||
56 | int ipu_plane_get_resources(struct ipu_plane *plane); | |
57 | void ipu_plane_put_resources(struct ipu_plane *plane); | |
58 | ||
59 | int ipu_plane_irq(struct ipu_plane *plane); | |
60 | ||
61 | #endif |