[deliverable/linux.git] / drivers / gpu / drm / mediatek / mtk_drm_drv.c

/*
 * Copyright (c) 2015 MediaTek Inc.
 * Author: YT SHEN <yt.shen@mediatek.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_gem.h>
#include <drm/drm_gem_cma_helper.h>
#include <linux/component.h>
#include <linux/iommu.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/pm_runtime.h>

#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#include "mtk_drm_fb.h"
#include "mtk_drm_gem.h"

#define DRIVER_NAME "mediatek"
#define DRIVER_DESC "Mediatek SoC DRM"
#define DRIVER_DATE "20150513"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 0

static void mtk_atomic_schedule(struct mtk_drm_private *private,
				struct drm_atomic_state *state)
{
	private->commit.state = state;
	schedule_work(&private->commit.work);
}

static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
{
	struct drm_plane *plane;
	struct drm_plane_state *plane_state;
	int i;

	for_each_plane_in_state(state, plane, plane_state, i)
		mtk_fb_wait(plane->state->fb);
}

static void mtk_atomic_complete(struct mtk_drm_private *private,
				struct drm_atomic_state *state)
{
	struct drm_device *drm = private->drm;

	mtk_atomic_wait_for_fences(state);

	/*
	 * Mediatek drm supports runtime PM, so plane registers cannot be
	 * written when their crtc is disabled.
	 *
	 * The comment for drm_atomic_helper_commit states:
	 *     For drivers supporting runtime PM the recommended sequence is
	 *
	 *     drm_atomic_helper_commit_modeset_disables(dev, state);
	 *     drm_atomic_helper_commit_modeset_enables(dev, state);
	 *     drm_atomic_helper_commit_planes(dev, state,
	 *                                     DRM_PLANE_COMMIT_ACTIVE_ONLY);
	 *
	 * See the kerneldoc entries for these three functions for more details.
	 */
	drm_atomic_helper_commit_modeset_disables(drm, state);
	drm_atomic_helper_commit_modeset_enables(drm, state);
	drm_atomic_helper_commit_planes(drm, state,
					DRM_PLANE_COMMIT_ACTIVE_ONLY);

	drm_atomic_helper_wait_for_vblanks(drm, state);

	drm_atomic_helper_cleanup_planes(drm, state);
	drm_atomic_state_free(state);
}

static void mtk_atomic_work(struct work_struct *work)
{
	struct mtk_drm_private *private = container_of(work,
			struct mtk_drm_private, commit.work);

	mtk_atomic_complete(private, private->commit.state);
}

static int mtk_atomic_commit(struct drm_device *drm,
			     struct drm_atomic_state *state,
			     bool async)
{
	struct mtk_drm_private *private = drm->dev_private;
	int ret;

	ret = drm_atomic_helper_prepare_planes(drm, state);
	if (ret)
		return ret;

	mutex_lock(&private->commit.lock);
	flush_work(&private->commit.work);

	drm_atomic_helper_swap_state(state, true);

	if (async)
		mtk_atomic_schedule(private, state);
	else
		mtk_atomic_complete(private, state);

	mutex_unlock(&private->commit.lock);

	return 0;
}

static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
	.fb_create = mtk_drm_mode_fb_create,
	.atomic_check = drm_atomic_helper_check,
	.atomic_commit = mtk_atomic_commit,
};

static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
	DDP_COMPONENT_OVL0,
	DDP_COMPONENT_COLOR0,
	DDP_COMPONENT_AAL,
	DDP_COMPONENT_OD,
	DDP_COMPONENT_RDMA0,
	DDP_COMPONENT_UFOE,
	DDP_COMPONENT_DSI0,
	DDP_COMPONENT_PWM0,
};

static const enum mtk_ddp_comp_id mtk_ddp_ext[] = {
	DDP_COMPONENT_OVL1,
	DDP_COMPONENT_COLOR1,
	DDP_COMPONENT_GAMMA,
	DDP_COMPONENT_RDMA1,
	DDP_COMPONENT_DPI0,
};

static int mtk_drm_kms_init(struct drm_device *drm)
{
	struct mtk_drm_private *private = drm->dev_private;
	struct platform_device *pdev;
	struct device_node *np;
	int ret;

	if (!iommu_present(&platform_bus_type))
		return -EPROBE_DEFER;

	pdev = of_find_device_by_node(private->mutex_node);
	if (!pdev) {
		dev_err(drm->dev, "Waiting for disp-mutex device %s\n",
			private->mutex_node->full_name);
		of_node_put(private->mutex_node);
		return -EPROBE_DEFER;
	}
	private->mutex_dev = &pdev->dev;

	drm_mode_config_init(drm);

	drm->mode_config.min_width = 64;
	drm->mode_config.min_height = 64;

	/*
	 * set max width and height as default value(4096x4096).
	 * this value would be used to check framebuffer size limitation
	 * at drm_mode_addfb().
	 */
	drm->mode_config.max_width = 4096;
	drm->mode_config.max_height = 4096;
	drm->mode_config.funcs = &mtk_drm_mode_config_funcs;

	ret = component_bind_all(drm->dev, drm);
	if (ret)
		goto err_config_cleanup;

	/*
	 * We currently support two fixed data streams, each optional,
	 * and each statically assigned to a crtc:
	 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
	 */
	ret = mtk_drm_crtc_create(drm, mtk_ddp_main, ARRAY_SIZE(mtk_ddp_main));
	if (ret < 0)
		goto err_component_unbind;
	/* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
	ret = mtk_drm_crtc_create(drm, mtk_ddp_ext, ARRAY_SIZE(mtk_ddp_ext));
	if (ret < 0)
		goto err_component_unbind;

	/* Use OVL device for all DMA memory allocations */
	np = private->comp_node[mtk_ddp_main[0]] ?:
	     private->comp_node[mtk_ddp_ext[0]];
	pdev = of_find_device_by_node(np);
	if (!pdev) {
		ret = -ENODEV;
		dev_err(drm->dev, "Need at least one OVL device\n");
		goto err_component_unbind;
	}

	private->dma_dev = &pdev->dev;

	/*
	 * We don't use the drm_irq_install() helpers provided by the DRM
	 * core, so we need to set this manually in order to allow the
	 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
	 */
	drm->irq_enabled = true;
	ret = drm_vblank_init(drm, MAX_CRTC);
	if (ret < 0)
		goto err_component_unbind;

	drm_kms_helper_poll_init(drm);
	drm_mode_config_reset(drm);

	return 0;

err_component_unbind:
	component_unbind_all(drm->dev, drm);
err_config_cleanup:
	drm_mode_config_cleanup(drm);

	return ret;
}

static void mtk_drm_kms_deinit(struct drm_device *drm)
{
	drm_kms_helper_poll_fini(drm);

	drm_vblank_cleanup(drm);
	component_unbind_all(drm->dev, drm);
	drm_mode_config_cleanup(drm);
}

static const struct file_operations mtk_drm_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = mtk_drm_gem_mmap,
	.poll = drm_poll,
	.read = drm_read,
#ifdef CONFIG_COMPAT
	.compat_ioctl = drm_compat_ioctl,
#endif
};

static struct drm_driver mtk_drm_driver = {
	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
			   DRIVER_ATOMIC,

	.get_vblank_counter = drm_vblank_count,
	.enable_vblank = mtk_drm_crtc_enable_vblank,
	.disable_vblank = mtk_drm_crtc_disable_vblank,

	.gem_free_object_unlocked = mtk_drm_gem_free_object,
	.gem_vm_ops = &drm_gem_cma_vm_ops,
	.dumb_create = mtk_drm_gem_dumb_create,
	.dumb_map_offset = mtk_drm_gem_dumb_map_offset,
	.dumb_destroy = drm_gem_dumb_destroy,

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = drm_gem_prime_export,
	.gem_prime_import = drm_gem_prime_import,
	.gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
	.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
	.gem_prime_mmap = mtk_drm_gem_mmap_buf,
	.fops = &mtk_drm_fops,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
};

static int compare_of(struct device *dev, void *data)
{
	return dev->of_node == data;
}

static int mtk_drm_bind(struct device *dev)
{
	struct mtk_drm_private *private = dev_get_drvdata(dev);
	struct drm_device *drm;
	int ret;

	drm = drm_dev_alloc(&mtk_drm_driver, dev);
	if (!drm)
		return -ENOMEM;

	drm->dev_private = private;
	private->drm = drm;

	ret = mtk_drm_kms_init(drm);
	if (ret < 0)
		goto err_free;

	ret = drm_dev_register(drm, 0);
	if (ret < 0)
		goto err_deinit;

	return 0;

err_deinit:
	mtk_drm_kms_deinit(drm);
err_free:
	drm_dev_unref(drm);
	return ret;
}

static void mtk_drm_unbind(struct device *dev)
{
	struct mtk_drm_private *private = dev_get_drvdata(dev);

	drm_put_dev(private->drm);
	private->drm = NULL;
}

static const struct component_master_ops mtk_drm_ops = {
	.bind		= mtk_drm_bind,
	.unbind		= mtk_drm_unbind,
};

static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
	{ .compatible = "mediatek,mt8173-disp-ovl",   .data = (void *)MTK_DISP_OVL },
	{ .compatible = "mediatek,mt8173-disp-rdma",  .data = (void *)MTK_DISP_RDMA },
	{ .compatible = "mediatek,mt8173-disp-wdma",  .data = (void *)MTK_DISP_WDMA },
	{ .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
	{ .compatible = "mediatek,mt8173-disp-aal",   .data = (void *)MTK_DISP_AAL},
	{ .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
	{ .compatible = "mediatek,mt8173-disp-ufoe",  .data = (void *)MTK_DISP_UFOE },
	{ .compatible = "mediatek,mt8173-dsi",        .data = (void *)MTK_DSI },
	{ .compatible = "mediatek,mt8173-dpi",        .data = (void *)MTK_DPI },
	{ .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
	{ .compatible = "mediatek,mt8173-disp-pwm",   .data = (void *)MTK_DISP_PWM },
	{ .compatible = "mediatek,mt8173-disp-od",    .data = (void *)MTK_DISP_OD },
	{ }
};

static int mtk_drm_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct mtk_drm_private *private;
	struct resource *mem;
	struct device_node *node;
	struct component_match *match = NULL;
	int ret;
	int i;

	private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
	if (!private)
		return -ENOMEM;

	mutex_init(&private->commit.lock);
	INIT_WORK(&private->commit.work, mtk_atomic_work);

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	private->config_regs = devm_ioremap_resource(dev, mem);
	if (IS_ERR(private->config_regs)) {
		ret = PTR_ERR(private->config_regs);
		dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
			ret);
		return ret;
	}

	/* Iterate over sibling DISP function blocks */
	for_each_child_of_node(dev->of_node->parent, node) {
		const struct of_device_id *of_id;
		enum mtk_ddp_comp_type comp_type;
		int comp_id;

		of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
		if (!of_id)
			continue;

		if (!of_device_is_available(node)) {
			dev_dbg(dev, "Skipping disabled component %s\n",
				node->full_name);
			continue;
		}

		comp_type = (enum mtk_ddp_comp_type)of_id->data;

		if (comp_type == MTK_DISP_MUTEX) {
			private->mutex_node = of_node_get(node);
			continue;
		}

		comp_id = mtk_ddp_comp_get_id(node, comp_type);
		if (comp_id < 0) {
			dev_warn(dev, "Skipping unknown component %s\n",
				 node->full_name);
			continue;
		}

		private->comp_node[comp_id] = of_node_get(node);

		/*
		 * Currently only the OVL, RDMA, DSI, and DPI blocks have
		 * separate component platform drivers and initialize their own
		 * DDP component structure. The others are initialized here.
		 */
		if (comp_type == MTK_DISP_OVL ||
		    comp_type == MTK_DISP_RDMA ||
		    comp_type == MTK_DSI ||
		    comp_type == MTK_DPI) {
			dev_info(dev, "Adding component match for %s\n",
				 node->full_name);
			component_match_add(dev, &match, compare_of, node);
		} else {
			struct mtk_ddp_comp *comp;

			comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
			if (!comp) {
				ret = -ENOMEM;
				goto err_node;
			}

			ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
			if (ret)
				goto err_node;

			private->ddp_comp[comp_id] = comp;
		}
	}

	if (!private->mutex_node) {
		dev_err(dev, "Failed to find disp-mutex node\n");
		ret = -ENODEV;
		goto err_node;
	}

	pm_runtime_enable(dev);

	platform_set_drvdata(pdev, private);

	ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
	if (ret)
		goto err_pm;

	return 0;

err_pm:
	pm_runtime_disable(dev);
err_node:
	of_node_put(private->mutex_node);
	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
		of_node_put(private->comp_node[i]);
	return ret;
}

static int mtk_drm_remove(struct platform_device *pdev)
{
	struct mtk_drm_private *private = platform_get_drvdata(pdev);
	struct drm_device *drm = private->drm;
	int i;

	drm_dev_unregister(drm);
	mtk_drm_kms_deinit(drm);
	drm_dev_unref(drm);

	component_master_del(&pdev->dev, &mtk_drm_ops);
	pm_runtime_disable(&pdev->dev);
	of_node_put(private->mutex_node);
	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
		of_node_put(private->comp_node[i]);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int mtk_drm_sys_suspend(struct device *dev)
{
	struct mtk_drm_private *private = dev_get_drvdata(dev);
	struct drm_device *drm = private->drm;

	drm_kms_helper_poll_disable(drm);

	private->suspend_state = drm_atomic_helper_suspend(drm);
	if (IS_ERR(private->suspend_state)) {
		drm_kms_helper_poll_enable(drm);
		return PTR_ERR(private->suspend_state);
	}

	DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
	return 0;
}

static int mtk_drm_sys_resume(struct device *dev)
{
	struct mtk_drm_private *private = dev_get_drvdata(dev);
	struct drm_device *drm = private->drm;

	drm_atomic_helper_resume(drm, private->suspend_state);
	drm_kms_helper_poll_enable(drm);

	DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
			 mtk_drm_sys_resume);

static const struct of_device_id mtk_drm_of_ids[] = {
	{ .compatible = "mediatek,mt8173-mmsys", },
	{ }
};

static struct platform_driver mtk_drm_platform_driver = {
	.probe	= mtk_drm_probe,
	.remove	= mtk_drm_remove,
	.driver	= {
		.name	= "mediatek-drm",
		.of_match_table = mtk_drm_of_ids,
		.pm     = &mtk_drm_pm_ops,
	},
};

static struct platform_driver * const mtk_drm_drivers[] = {
	&mtk_ddp_driver,
	&mtk_disp_ovl_driver,
	&mtk_disp_rdma_driver,
	&mtk_dpi_driver,
	&mtk_drm_platform_driver,
	&mtk_dsi_driver,
	&mtk_mipi_tx_driver,
};

static int __init mtk_drm_init(void)
{
	int ret;
	int i;

	for (i = 0; i < ARRAY_SIZE(mtk_drm_drivers); i++) {
		ret = platform_driver_register(mtk_drm_drivers[i]);
		if (ret < 0) {
			pr_err("Failed to register %s driver: %d\n",
			       mtk_drm_drivers[i]->driver.name, ret);
			goto err;
		}
	}

	return 0;

err:
	while (--i >= 0)
		platform_driver_unregister(mtk_drm_drivers[i]);

	return ret;
}

static void __exit mtk_drm_exit(void)
{
	int i;

	for (i = ARRAY_SIZE(mtk_drm_drivers) - 1; i >= 0; i--)
		platform_driver_unregister(mtk_drm_drivers[i]);
}

module_init(mtk_drm_init);
module_exit(mtk_drm_exit);

MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
MODULE_DESCRIPTION("Mediatek SoC DRM driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
119f5173 CH	1	/*
	2	* Copyright (c) 2015 MediaTek Inc.
	3	* Author: YT SHEN <yt.shen@mediatek.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*/
	14
	15	#include <drm/drmP.h>
	16	#include <drm/drm_atomic.h>
	17	#include <drm/drm_atomic_helper.h>
	18	#include <drm/drm_crtc_helper.h>
	19	#include <drm/drm_gem.h>
	20	#include <drm/drm_gem_cma_helper.h>
	21	#include <linux/component.h>
	22	#include <linux/iommu.h>
	23	#include <linux/of_address.h>
	24	#include <linux/of_platform.h>
	25	#include <linux/pm_runtime.h>
	26
	27	#include "mtk_drm_crtc.h"
	28	#include "mtk_drm_ddp.h"
	29	#include "mtk_drm_ddp_comp.h"
	30	#include "mtk_drm_drv.h"
	31	#include "mtk_drm_fb.h"
	32	#include "mtk_drm_gem.h"
	33
	34	#define DRIVER_NAME "mediatek"
	35	#define DRIVER_DESC "Mediatek SoC DRM"
	36	#define DRIVER_DATE "20150513"
	37	#define DRIVER_MAJOR 1
	38	#define DRIVER_MINOR 0
	39
	40	static void mtk_atomic_schedule(struct mtk_drm_private *private,
	41	struct drm_atomic_state *state)
	42	{
	43	private->commit.state = state;
	44	schedule_work(&private->commit.work);
	45	}
	46
	47	static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
	48	{
	49	struct drm_plane *plane;
	50	struct drm_plane_state *plane_state;
	51	int i;
	52
	53	for_each_plane_in_state(state, plane, plane_state, i)
	54	mtk_fb_wait(plane->state->fb);
	55	}
	56
	57	static void mtk_atomic_complete(struct mtk_drm_private *private,
	58	struct drm_atomic_state *state)
	59	{
	60	struct drm_device *drm = private->drm;
	61
	62	mtk_atomic_wait_for_fences(state);
	63
ac08500c BH	64	/*
	65	* Mediatek drm supports runtime PM, so plane registers cannot be
	66	* written when their crtc is disabled.
	67	*
	68	* The comment for drm_atomic_helper_commit states:
	69	* For drivers supporting runtime PM the recommended sequence is
	70	*
	71	* drm_atomic_helper_commit_modeset_disables(dev, state);
	72	* drm_atomic_helper_commit_modeset_enables(dev, state);
2b58e98d LY	73	* drm_atomic_helper_commit_planes(dev, state,
2b58e98d LY	74	* DRM_PLANE_COMMIT_ACTIVE_ONLY);
ac08500c BH	75	*
	76	* See the kerneldoc entries for these three functions for more details.
	77	*/
119f5173	78	drm_atomic_helper_commit_modeset_disables(drm, state);
119f5173	79	drm_atomic_helper_commit_modeset_enables(drm, state);
2b58e98d LY	80	drm_atomic_helper_commit_planes(drm, state,
2b58e98d LY	81	DRM_PLANE_COMMIT_ACTIVE_ONLY);
ac08500c	82
119f5173	83	drm_atomic_helper_wait_for_vblanks(drm, state);
ac08500c	84
119f5173 CH	85	drm_atomic_helper_cleanup_planes(drm, state);
	86	drm_atomic_state_free(state);
	87	}
	88
	89	static void mtk_atomic_work(struct work_struct *work)
	90	{
	91	struct mtk_drm_private *private = container_of(work,
	92	struct mtk_drm_private, commit.work);
	93
	94	mtk_atomic_complete(private, private->commit.state);
	95	}
	96
	97	static int mtk_atomic_commit(struct drm_device *drm,
	98	struct drm_atomic_state *state,
	99	bool async)
	100	{
	101	struct mtk_drm_private *private = drm->dev_private;
	102	int ret;
	103
	104	ret = drm_atomic_helper_prepare_planes(drm, state);
	105	if (ret)
	106	return ret;
	107
	108	mutex_lock(&private->commit.lock);
	109	flush_work(&private->commit.work);
	110
5e84c269	111	drm_atomic_helper_swap_state(state, true);
119f5173 CH	112
	113	if (async)
	114	mtk_atomic_schedule(private, state);
	115	else
	116	mtk_atomic_complete(private, state);
	117
	118	mutex_unlock(&private->commit.lock);
	119
	120	return 0;
	121	}
	122
	123	static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
	124	.fb_create = mtk_drm_mode_fb_create,
	125	.atomic_check = drm_atomic_helper_check,
	126	.atomic_commit = mtk_atomic_commit,
	127	};
	128
	129	static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
	130	DDP_COMPONENT_OVL0,
	131	DDP_COMPONENT_COLOR0,
	132	DDP_COMPONENT_AAL,
	133	DDP_COMPONENT_OD,
	134	DDP_COMPONENT_RDMA0,
	135	DDP_COMPONENT_UFOE,
	136	DDP_COMPONENT_DSI0,
	137	DDP_COMPONENT_PWM0,
	138	};
	139
	140	static const enum mtk_ddp_comp_id mtk_ddp_ext[] = {
	141	DDP_COMPONENT_OVL1,
	142	DDP_COMPONENT_COLOR1,
	143	DDP_COMPONENT_GAMMA,
	144	DDP_COMPONENT_RDMA1,
	145	DDP_COMPONENT_DPI0,
	146	};
	147
	148	static int mtk_drm_kms_init(struct drm_device *drm)
	149	{
	150	struct mtk_drm_private *private = drm->dev_private;
	151	struct platform_device *pdev;
	152	struct device_node *np;
	153	int ret;
	154
	155	if (!iommu_present(&platform_bus_type))
	156	return -EPROBE_DEFER;
	157
	158	pdev = of_find_device_by_node(private->mutex_node);
	159	if (!pdev) {
	160	dev_err(drm->dev, "Waiting for disp-mutex device %s\n",
	161	private->mutex_node->full_name);
	162	of_node_put(private->mutex_node);
	163	return -EPROBE_DEFER;
	164	}
	165	private->mutex_dev = &pdev->dev;
	166
	167	drm_mode_config_init(drm);
	168
	169	drm->mode_config.min_width = 64;
	170	drm->mode_config.min_height = 64;
	171
	172	/*
	173	* set max width and height as default value(4096x4096).
	174	* this value would be used to check framebuffer size limitation
	175	* at drm_mode_addfb().
176	*/
177	drm->mode_config.max_width = 4096;
178	drm->mode_config.max_height = 4096;
179	drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
180
181	ret = component_bind_all(drm->dev, drm);
182	if (ret)
183	goto err_config_cleanup;
184
185	/*
186	* We currently support two fixed data streams, each optional,
187	* and each statically assigned to a crtc:
188	* OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
189	*/
190	ret = mtk_drm_crtc_create(drm, mtk_ddp_main, ARRAY_SIZE(mtk_ddp_main));
191	if (ret < 0)
192	goto err_component_unbind;
193	/* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
194	ret = mtk_drm_crtc_create(drm, mtk_ddp_ext, ARRAY_SIZE(mtk_ddp_ext));
195	if (ret < 0)
196	goto err_component_unbind;
197
198	/* Use OVL device for all DMA memory allocations */
199	np = private->comp_node[mtk_ddp_main[0]] ?:
200	private->comp_node[mtk_ddp_ext[0]];
201	pdev = of_find_device_by_node(np);
202	if (!pdev) {
203	ret = -ENODEV;
204	dev_err(drm->dev, "Need at least one OVL device\n");
205	goto err_component_unbind;
206	}
207
208	private->dma_dev = &pdev->dev;
209
210	/*
211	* We don't use the drm_irq_install() helpers provided by the DRM
212	* core, so we need to set this manually in order to allow the
213	* DRM_IOCTL_WAIT_VBLANK to operate correctly.
214	*/
215	drm->irq_enabled = true;
216	ret = drm_vblank_init(drm, MAX_CRTC);
217	if (ret < 0)
218	goto err_component_unbind;
219
220	drm_kms_helper_poll_init(drm);
221	drm_mode_config_reset(drm);
222
223	return 0;
224
225	err_component_unbind:
226	component_unbind_all(drm->dev, drm);
227	err_config_cleanup:
228	drm_mode_config_cleanup(drm);
229
230	return ret;
231	}
232
233	static void mtk_drm_kms_deinit(struct drm_device *drm)
234	{
235	drm_kms_helper_poll_fini(drm);
236
237	drm_vblank_cleanup(drm);
238	component_unbind_all(drm->dev, drm);
239	drm_mode_config_cleanup(drm);
240	}
241
242	static const struct file_operations mtk_drm_fops = {
243	.owner = THIS_MODULE,
244	.open = drm_open,
245	.release = drm_release,
246	.unlocked_ioctl = drm_ioctl,
247	.mmap = mtk_drm_gem_mmap,
248	.poll = drm_poll,
249	.read = drm_read,
250	#ifdef CONFIG_COMPAT
251	.compat_ioctl = drm_compat_ioctl,
252	#endif
253	};
254
255	static struct drm_driver mtk_drm_driver = {
256	.driver_features = DRIVER_MODESET \| DRIVER_GEM \| DRIVER_PRIME \|
257	DRIVER_ATOMIC,
258
259	.get_vblank_counter = drm_vblank_count,
260	.enable_vblank = mtk_drm_crtc_enable_vblank,
261	.disable_vblank = mtk_drm_crtc_disable_vblank,
262
564dd27e	263	.gem_free_object_unlocked = mtk_drm_gem_free_object,
119f5173 CH	264	.gem_vm_ops = &drm_gem_cma_vm_ops,
	265	.dumb_create = mtk_drm_gem_dumb_create,
	266	.dumb_map_offset = mtk_drm_gem_dumb_map_offset,
	267	.dumb_destroy = drm_gem_dumb_destroy,
	268
	269	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	270	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	271	.gem_prime_export = drm_gem_prime_export,
	272	.gem_prime_import = drm_gem_prime_import,
	273	.gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
	274	.gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
	275	.gem_prime_mmap = mtk_drm_gem_mmap_buf,
	276	.fops = &mtk_drm_fops,
	277
	278	.name = DRIVER_NAME,
	279	.desc = DRIVER_DESC,
	280	.date = DRIVER_DATE,
	281	.major = DRIVER_MAJOR,
	282	.minor = DRIVER_MINOR,
	283	};
	284
	285	static int compare_of(struct device dev, void data)
	286	{
	287	return dev->of_node == data;
	288	}
	289
	290	static int mtk_drm_bind(struct device *dev)
	291	{
	292	struct mtk_drm_private *private = dev_get_drvdata(dev);
	293	struct drm_device *drm;
	294	int ret;
	295
	296	drm = drm_dev_alloc(&mtk_drm_driver, dev);
	297	if (!drm)
	298	return -ENOMEM;
	299
119f5173 CH	300	drm->dev_private = private;
	301	private->drm = drm;
	302
	303	ret = mtk_drm_kms_init(drm);
	304	if (ret < 0)
	305	goto err_free;
	306
	307	ret = drm_dev_register(drm, 0);
	308	if (ret < 0)
	309	goto err_deinit;
	310
119f5173 CH	311	return 0;
119f5173 CH	312
119f5173 CH	313	err_deinit:
	314	mtk_drm_kms_deinit(drm);
	315	err_free:
	316	drm_dev_unref(drm);
	317	return ret;
	318	}
	319
	320	static void mtk_drm_unbind(struct device *dev)
	321	{
	322	struct mtk_drm_private *private = dev_get_drvdata(dev);
	323
	324	drm_put_dev(private->drm);
	325	private->drm = NULL;
	326	}
	327
	328	static const struct component_master_ops mtk_drm_ops = {
	329	.bind = mtk_drm_bind,
	330	.unbind = mtk_drm_unbind,
	331	};
	332
	333	static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
	334	{ .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL },
	335	{ .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA },
	336	{ .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA },
	337	{ .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
	338	{ .compatible = "mediatek,mt8173-disp-aal", .data = (void *)MTK_DISP_AAL},
	339	{ .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
	340	{ .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE },
	341	{ .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI },
	342	{ .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI },
	343	{ .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
	344	{ .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM },
	345	{ .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD },
	346	{ }
	347	};
	348
	349	static int mtk_drm_probe(struct platform_device *pdev)
	350	{
	351	struct device *dev = &pdev->dev;
	352	struct mtk_drm_private *private;
	353	struct resource *mem;
	354	struct device_node *node;
	355	struct component_match *match = NULL;
	356	int ret;
	357	int i;
	358
	359	private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
	360	if (!private)
	361	return -ENOMEM;
	362
	363	mutex_init(&private->commit.lock);
	364	INIT_WORK(&private->commit.work, mtk_atomic_work);
	365
	366	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	367	private->config_regs = devm_ioremap_resource(dev, mem);
	368	if (IS_ERR(private->config_regs)) {
	369	ret = PTR_ERR(private->config_regs);
	370	dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
	371	ret);
	372	return ret;
	373	}
	374
	375	/* Iterate over sibling DISP function blocks */
	376	for_each_child_of_node(dev->of_node->parent, node) {
377	const struct of_device_id *of_id;
378	enum mtk_ddp_comp_type comp_type;
379	int comp_id;
380
381	of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
382	if (!of_id)
383	continue;
384
385	if (!of_device_is_available(node)) {
386	dev_dbg(dev, "Skipping disabled component %s\n",
387	node->full_name);
388	continue;
389	}
390
391	comp_type = (enum mtk_ddp_comp_type)of_id->data;
392
393	if (comp_type == MTK_DISP_MUTEX) {
394	private->mutex_node = of_node_get(node);
395	continue;
396	}
397
398	comp_id = mtk_ddp_comp_get_id(node, comp_type);
399	if (comp_id < 0) {
400	dev_warn(dev, "Skipping unknown component %s\n",
401	node->full_name);
402	continue;
403	}
404
405	private->comp_node[comp_id] = of_node_get(node);
406
407	/*
408	* Currently only the OVL, RDMA, DSI, and DPI blocks have
409	* separate component platform drivers and initialize their own
410	* DDP component structure. The others are initialized here.
411	*/
412	if (comp_type == MTK_DISP_OVL \|\|
413	comp_type == MTK_DISP_RDMA \|\|
414	comp_type == MTK_DSI \|\|
415	comp_type == MTK_DPI) {
416	dev_info(dev, "Adding component match for %s\n",
417	node->full_name);
418	component_match_add(dev, &match, compare_of, node);
419	} else {
420	struct mtk_ddp_comp *comp;
421
422	comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
423	if (!comp) {
424	ret = -ENOMEM;
425	goto err_node;
426	}
427
428	ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
429	if (ret)
430	goto err_node;
431
432	private->ddp_comp[comp_id] = comp;
433	}
434	}
435
436	if (!private->mutex_node) {
437	dev_err(dev, "Failed to find disp-mutex node\n");
438	ret = -ENODEV;
439	goto err_node;
440	}
441
442	pm_runtime_enable(dev);
443
444	platform_set_drvdata(pdev, private);
445
446	ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
447	if (ret)
448	goto err_pm;
449
450	return 0;
451
452	err_pm:
453	pm_runtime_disable(dev);
454	err_node:
455	of_node_put(private->mutex_node);
456	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
457	of_node_put(private->comp_node[i]);
458	return ret;
459	}
460
461	static int mtk_drm_remove(struct platform_device *pdev)
462	{
463	struct mtk_drm_private *private = platform_get_drvdata(pdev);
464	struct drm_device *drm = private->drm;
465	int i;
466
119f5173 CH	467	drm_dev_unregister(drm);
	468	mtk_drm_kms_deinit(drm);
	469	drm_dev_unref(drm);
	470
	471	component_master_del(&pdev->dev, &mtk_drm_ops);
	472	pm_runtime_disable(&pdev->dev);
	473	of_node_put(private->mutex_node);
	474	for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
	475	of_node_put(private->comp_node[i]);
	476
	477	return 0;
	478	}
	479
	480	#ifdef CONFIG_PM_SLEEP
	481	static int mtk_drm_sys_suspend(struct device *dev)
	482	{
	483	struct mtk_drm_private *private = dev_get_drvdata(dev);
	484	struct drm_device *drm = private->drm;
	485
	486	drm_kms_helper_poll_disable(drm);
	487
	488	private->suspend_state = drm_atomic_helper_suspend(drm);
	489	if (IS_ERR(private->suspend_state)) {
	490	drm_kms_helper_poll_enable(drm);
	491	return PTR_ERR(private->suspend_state);
	492	}
	493
	494	DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
	495	return 0;
	496	}
	497
	498	static int mtk_drm_sys_resume(struct device *dev)
	499	{
	500	struct mtk_drm_private *private = dev_get_drvdata(dev);
	501	struct drm_device *drm = private->drm;
	502
	503	drm_atomic_helper_resume(drm, private->suspend_state);
	504	drm_kms_helper_poll_enable(drm);
	505
	506	DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
	507	return 0;
	508	}
	509	#endif
	510
	511	static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
	512	mtk_drm_sys_resume);
	513
	514	static const struct of_device_id mtk_drm_of_ids[] = {
	515	{ .compatible = "mediatek,mt8173-mmsys", },
	516	{ }
	517	};
	518
	519	static struct platform_driver mtk_drm_platform_driver = {
	520	.probe = mtk_drm_probe,
	521	.remove = mtk_drm_remove,
	522	.driver = {
	523	.name = "mediatek-drm",
	524	.of_match_table = mtk_drm_of_ids,
	525	.pm = &mtk_drm_pm_ops,
	526	},
	527	};
	528
	529	static struct platform_driver * const mtk_drm_drivers[] = {
	530	&mtk_ddp_driver,
531	&mtk_disp_ovl_driver,
532	&mtk_disp_rdma_driver,
9e629c17	533	&mtk_dpi_driver,
119f5173	534	&mtk_drm_platform_driver,
2e54c14e CH	535	&mtk_dsi_driver,
2e54c14e CH	536	&mtk_mipi_tx_driver,
119f5173 CH	537	};
	538
	539	static int __init mtk_drm_init(void)
	540	{
	541	int ret;
	542	int i;
	543
	544	for (i = 0; i < ARRAY_SIZE(mtk_drm_drivers); i++) {
	545	ret = platform_driver_register(mtk_drm_drivers[i]);
	546	if (ret < 0) {
	547	pr_err("Failed to register %s driver: %d\n",
	548	mtk_drm_drivers[i]->driver.name, ret);
	549	goto err;
	550	}
	551	}
	552
	553	return 0;
	554
	555	err:
	556	while (--i >= 0)
	557	platform_driver_unregister(mtk_drm_drivers[i]);
	558
	559	return ret;
	560	}
	561
	562	static void __exit mtk_drm_exit(void)
	563	{
	564	int i;
	565
	566	for (i = ARRAY_SIZE(mtk_drm_drivers) - 1; i >= 0; i--)
	567	platform_driver_unregister(mtk_drm_drivers[i]);
	568	}
	569
	570	module_init(mtk_drm_init);
	571	module_exit(mtk_drm_exit);
	572
	573	MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
	574	MODULE_DESCRIPTION("Mediatek SoC DRM driver");
	575	MODULE_LICENSE("GPL v2");