[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / copy / nvc0.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */

#include <core/os.h>
#include <core/enum.h>
#include <core/class.h>
#include <core/engctx.h>

#include <engine/fifo.h>
#include <engine/copy.h>

#include "fuc/nvc0.fuc.h"

struct nvc0_copy_priv {
	struct nouveau_copy base;
};

struct nvc0_copy_chan {
	struct nouveau_copy_chan base;
};

/*******************************************************************************
 * Copy object classes
 ******************************************************************************/

static struct nouveau_oclass
nvc0_copy0_sclass[] = {
	{ 0x90b5, &nouveau_object_ofuncs },
	{},
};

static struct nouveau_oclass
nvc0_copy1_sclass[] = {
	{ 0x90b8, &nouveau_object_ofuncs },
	{},
};

/*******************************************************************************
 * PCOPY context
 ******************************************************************************/

static int
nvc0_copy_context_ctor(struct nouveau_object *parent,
		       struct nouveau_object *engine,
		       struct nouveau_oclass *oclass, void *data, u32 size,
		       struct nouveau_object **pobject)
{
	struct nvc0_copy_chan *priv;
	int ret;

	ret = nouveau_copy_context_create(parent, engine, oclass, NULL, 256,
					  256, NVOBJ_FLAG_ZERO_ALLOC, &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	return 0;
}

static struct nouveau_ofuncs
nvc0_copy_context_ofuncs = {
	.ctor = nvc0_copy_context_ctor,
	.dtor = _nouveau_copy_context_dtor,
	.init = _nouveau_copy_context_init,
	.fini = _nouveau_copy_context_fini,
	.rd32 = _nouveau_copy_context_rd32,
	.wr32 = _nouveau_copy_context_wr32,
};

static struct nouveau_oclass
nvc0_copy0_cclass = {
	.handle = NV_ENGCTX(COPY0, 0xc0),
	.ofuncs = &nvc0_copy_context_ofuncs,
};

static struct nouveau_oclass
nvc0_copy1_cclass = {
	.handle = NV_ENGCTX(COPY1, 0xc0),
	.ofuncs = &nvc0_copy_context_ofuncs,
};

/*******************************************************************************
 * PCOPY engine/subdev functions
 ******************************************************************************/

static const struct nouveau_enum nvc0_copy_isr_error_name[] = {
	{ 0x0001, "ILLEGAL_MTHD" },
	{ 0x0002, "INVALID_ENUM" },
	{ 0x0003, "INVALID_BITFIELD" },
	{}
};

static void
nvc0_copy_intr(struct nouveau_subdev *subdev)
{
	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
	struct nouveau_engine *engine = nv_engine(subdev);
	struct nouveau_object *engctx;
	int idx = nv_engidx(nv_object(subdev)) - NVDEV_ENGINE_COPY0;
	struct nvc0_copy_priv *priv = (void *)subdev;
	u32 disp = nv_rd32(priv, 0x10401c + (idx * 0x1000));
	u32 intr = nv_rd32(priv, 0x104008 + (idx * 0x1000));
	u32 stat = intr & disp & ~(disp >> 16);
	u64 inst = nv_rd32(priv, 0x104050 + (idx * 0x1000)) & 0x0fffffff;
	u32 ssta = nv_rd32(priv, 0x104040 + (idx * 0x1000)) & 0x0000ffff;
	u32 addr = nv_rd32(priv, 0x104040 + (idx * 0x1000)) >> 16;
	u32 mthd = (addr & 0x07ff) << 2;
	u32 subc = (addr & 0x3800) >> 11;
	u32 data = nv_rd32(priv, 0x104044 + (idx * 0x1000));
	int chid;

	engctx = nouveau_engctx_get(engine, inst);
	chid   = pfifo->chid(pfifo, engctx);

	if (stat & 0x00000040) {
		nv_error(priv, "DISPATCH_ERROR [");
		nouveau_enum_print(nvc0_copy_isr_error_name, ssta);
		printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
		       chid, (u64)inst << 12, subc, mthd, data);
		nv_wr32(priv, 0x104004 + (idx * 0x1000), 0x00000040);
		stat &= ~0x00000040;
	}

	if (stat) {
		nv_error(priv, "unhandled intr 0x%08x\n", stat);
		nv_wr32(priv, 0x104004 + (idx * 0x1000), stat);
	}

	nouveau_engctx_put(engctx);
}

static int
nvc0_copy0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
		struct nouveau_oclass *oclass, void *data, u32 size,
		struct nouveau_object **pobject)
{
	struct nvc0_copy_priv *priv;
	int ret;

	if (nv_rd32(parent, 0x022500) & 0x00000100)
		return -ENODEV;

	ret = nouveau_copy_create(parent, engine, oclass, true, 0, &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	nv_subdev(priv)->unit = 0x00000040;
	nv_subdev(priv)->intr = nvc0_copy_intr;
	nv_engine(priv)->cclass = &nvc0_copy0_cclass;
	nv_engine(priv)->sclass = nvc0_copy0_sclass;
	return 0;
}

static int
nvc0_copy1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
		struct nouveau_oclass *oclass, void *data, u32 size,
		struct nouveau_object **pobject)
{
	struct nvc0_copy_priv *priv;
	int ret;

	if (nv_rd32(parent, 0x022500) & 0x00000200)
		return -ENODEV;

	ret = nouveau_copy_create(parent, engine, oclass, true, 1, &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	nv_subdev(priv)->unit = 0x00000080;
	nv_subdev(priv)->intr = nvc0_copy_intr;
	nv_engine(priv)->cclass = &nvc0_copy1_cclass;
	nv_engine(priv)->sclass = nvc0_copy1_sclass;
	return 0;
}

static int
nvc0_copy_init(struct nouveau_object *object)
{
	int idx = nv_engidx(object) - NVDEV_ENGINE_COPY0;
	struct nvc0_copy_priv *priv = (void *)object;
	int ret, i;

	ret = nouveau_copy_init(&priv->base);
	if (ret)
		return ret;

	/* disable all interrupts */
	nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);

	/* upload ucode */
	nv_wr32(priv, 0x1041c0 + (idx * 0x1000), 0x01000000);
	for (i = 0; i < sizeof(nvc0_pcopy_data) / 4; i++)
		nv_wr32(priv, 0x1041c4 + (idx * 0x1000), nvc0_pcopy_data[i]);

	nv_wr32(priv, 0x104180 + (idx * 0x1000), 0x01000000);
	for (i = 0; i < sizeof(nvc0_pcopy_code) / 4; i++) {
		if ((i & 0x3f) == 0)
			nv_wr32(priv, 0x104188 + (idx * 0x1000), i >> 6);
		nv_wr32(priv, 0x104184 + (idx * 0x1000), nvc0_pcopy_code[i]);
	}

	/* start it running */
	nv_wr32(priv, 0x104084 + (idx * 0x1000), idx);
	nv_wr32(priv, 0x10410c + (idx * 0x1000), 0x00000000);
	nv_wr32(priv, 0x104104 + (idx * 0x1000), 0x00000000); /* ENTRY */
	nv_wr32(priv, 0x104100 + (idx * 0x1000), 0x00000002); /* TRIGGER */
	return 0;
}

static int
nvc0_copy_fini(struct nouveau_object *object, bool suspend)
{
	int idx = nv_engidx(object) - NVDEV_ENGINE_COPY0;
	struct nvc0_copy_priv *priv = (void *)object;

	nv_mask(priv, 0x104048 + (idx * 0x1000), 0x00000003, 0x00000000);
	nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);

	return nouveau_copy_fini(&priv->base, suspend);
}

struct nouveau_oclass
nvc0_copy0_oclass = {
	.handle = NV_ENGINE(COPY0, 0xc0),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nvc0_copy0_ctor,
		.dtor = _nouveau_copy_dtor,
		.init = nvc0_copy_init,
		.fini = nvc0_copy_fini,
	},
};

struct nouveau_oclass
nvc0_copy1_oclass = {
	.handle = NV_ENGINE(COPY1, 0xc0),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nvc0_copy1_ctor,
		.dtor = _nouveau_copy_dtor,
		.init = nvc0_copy_init,
		.fini = nvc0_copy_fini,
	},
};
Commit	Line	Data
d5a27370	1	/*
ebb945a9	2	* Copyright 2012 Red Hat Inc.
d5a27370 BS	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
	24
ebb945a9 BS	25	#include <core/os.h>
	26	#include <core/enum.h>
	27	#include <core/class.h>
	28	#include <core/engctx.h>
	29
72a14827	30	#include <engine/fifo.h>
ebb945a9 BS	31	#include <engine/copy.h>
ebb945a9 BS	32
02a841d4	33	#include "fuc/nvc0.fuc.h"
d5a27370	34
ebb945a9 BS	35	struct nvc0_copy_priv {
ebb945a9 BS	36	struct nouveau_copy base;
d5a27370 BS	37	};
d5a27370 BS	38
73a60c0d	39	struct nvc0_copy_chan {
ebb945a9	40	struct nouveau_copy_chan base;
73a60c0d BS	41	};
73a60c0d BS	42
ebb945a9 BS	43	/*******************************************************************************
	44	* Copy object classes
	45	******************************************************************************/
73a60c0d	46
ebb945a9 BS	47	static struct nouveau_oclass
	48	nvc0_copy0_sclass[] = {
	49	{ 0x90b5, &nouveau_object_ofuncs },
	50	{},
	51	};
d5a27370	52
ebb945a9 BS	53	static struct nouveau_oclass
	54	nvc0_copy1_sclass[] = {
	55	{ 0x90b8, &nouveau_object_ofuncs },
	56	{},
	57	};
d5a27370	58
ebb945a9 BS	59	/*******************************************************************************
	60	* PCOPY context
	61	******************************************************************************/
d5a27370 BS	62
d5a27370 BS	63	static int
ebb945a9 BS	64	nvc0_copy_context_ctor(struct nouveau_object *parent,
	65	struct nouveau_object *engine,
	66	struct nouveau_oclass oclass, void data, u32 size,
	67	struct nouveau_object **pobject)
d5a27370	68	{
ebb945a9 BS	69	struct nvc0_copy_chan *priv;
ebb945a9 BS	70	int ret;
d5a27370	71
ebb945a9 BS	72	ret = nouveau_copy_context_create(parent, engine, oclass, NULL, 256,
	73	256, NVOBJ_FLAG_ZERO_ALLOC, &priv);
	74	*pobject = nv_object(priv);
	75	if (ret)
	76	return ret;
d5a27370	77
d5a27370 BS	78	return 0;
	79	}
	80
ebb945a9 BS	81	static struct nouveau_ofuncs
	82	nvc0_copy_context_ofuncs = {
	83	.ctor = nvc0_copy_context_ctor,
	84	.dtor = _nouveau_copy_context_dtor,
	85	.init = _nouveau_copy_context_init,
	86	.fini = _nouveau_copy_context_fini,
	87	.rd32 = _nouveau_copy_context_rd32,
	88	.wr32 = _nouveau_copy_context_wr32,
	89	};
d5a27370	90
ebb945a9 BS	91	static struct nouveau_oclass
	92	nvc0_copy0_cclass = {
	93	.handle = NV_ENGCTX(COPY0, 0xc0),
	94	.ofuncs = &nvc0_copy_context_ofuncs,
	95	};
d5a27370	96
ebb945a9 BS	97	static struct nouveau_oclass
	98	nvc0_copy1_cclass = {
	99	.handle = NV_ENGCTX(COPY1, 0xc0),
	100	.ofuncs = &nvc0_copy_context_ofuncs,
	101	};
d5a27370	102
ebb945a9 BS	103	/*******************************************************************************
	104	* PCOPY engine/subdev functions
	105	******************************************************************************/
d5a27370	106
e6626254	107	static const struct nouveau_enum nvc0_copy_isr_error_name[] = {
d5a27370 BS	108	{ 0x0001, "ILLEGAL_MTHD" },
	109	{ 0x0002, "INVALID_ENUM" },
	110	{ 0x0003, "INVALID_BITFIELD" },
	111	{}
	112	};
	113
	114	static void
ebb945a9	115	nvc0_copy_intr(struct nouveau_subdev *subdev)
d5a27370	116	{
72a14827 BS	117	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);
	118	struct nouveau_engine *engine = nv_engine(subdev);
	119	struct nouveau_object *engctx;
ebb945a9 BS	120	int idx = nv_engidx(nv_object(subdev)) - NVDEV_ENGINE_COPY0;
	121	struct nvc0_copy_priv priv = (void )subdev;
	122	u32 disp = nv_rd32(priv, 0x10401c + (idx * 0x1000));
	123	u32 intr = nv_rd32(priv, 0x104008 + (idx * 0x1000));
	124	u32 stat = intr & disp & ~(disp >> 16);
	125	u64 inst = nv_rd32(priv, 0x104050 + (idx * 0x1000)) & 0x0fffffff;
	126	u32 ssta = nv_rd32(priv, 0x104040 + (idx * 0x1000)) & 0x0000ffff;
	127	u32 addr = nv_rd32(priv, 0x104040 + (idx * 0x1000)) >> 16;
d5a27370 BS	128	u32 mthd = (addr & 0x07ff) << 2;
d5a27370 BS	129	u32 subc = (addr & 0x3800) >> 11;
ebb945a9	130	u32 data = nv_rd32(priv, 0x104044 + (idx * 0x1000));
72a14827 BS	131	int chid;
	132
	133	engctx = nouveau_engctx_get(engine, inst);
	134	chid = pfifo->chid(pfifo, engctx);
d5a27370 BS	135
d5a27370 BS	136	if (stat & 0x00000040) {
ebb945a9	137	nv_error(priv, "DISPATCH_ERROR [");
d5a27370	138	nouveau_enum_print(nvc0_copy_isr_error_name, ssta);
72a14827 BS	139	printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
72a14827 BS	140	chid, (u64)inst << 12, subc, mthd, data);
ebb945a9	141	nv_wr32(priv, 0x104004 + (idx * 0x1000), 0x00000040);
d5a27370 BS	142	stat &= ~0x00000040;
	143	}
	144
	145	if (stat) {
ebb945a9 BS	146	nv_error(priv, "unhandled intr 0x%08x\n", stat);
ebb945a9 BS	147	nv_wr32(priv, 0x104004 + (idx * 0x1000), stat);
d5a27370	148	}
72a14827 BS	149
72a14827 BS	150	nouveau_engctx_put(engctx);
d5a27370 BS	151	}
d5a27370 BS	152
ebb945a9 BS	153	static int
	154	nvc0_copy0_ctor(struct nouveau_object parent, struct nouveau_object engine,
	155	struct nouveau_oclass oclass, void data, u32 size,
	156	struct nouveau_object **pobject)
d5a27370	157	{
ebb945a9 BS	158	struct nvc0_copy_priv *priv;
ebb945a9 BS	159	int ret;
d5a27370	160
ebb945a9 BS	161	if (nv_rd32(parent, 0x022500) & 0x00000100)
	162	return -ENODEV;
	163
	164	ret = nouveau_copy_create(parent, engine, oclass, true, 0, &priv);
	165	*pobject = nv_object(priv);
	166	if (ret)
	167	return ret;
	168
	169	nv_subdev(priv)->unit = 0x00000040;
	170	nv_subdev(priv)->intr = nvc0_copy_intr;
	171	nv_engine(priv)->cclass = &nvc0_copy0_cclass;
	172	nv_engine(priv)->sclass = nvc0_copy0_sclass;
	173	return 0;
d5a27370 BS	174	}
d5a27370 BS	175
ebb945a9 BS	176	static int
	177	nvc0_copy1_ctor(struct nouveau_object parent, struct nouveau_object engine,
	178	struct nouveau_oclass oclass, void data, u32 size,
	179	struct nouveau_object **pobject)
d5a27370	180	{
ebb945a9 BS	181	struct nvc0_copy_priv *priv;
ebb945a9 BS	182	int ret;
d5a27370	183
ebb945a9 BS	184	if (nv_rd32(parent, 0x022500) & 0x00000200)
ebb945a9 BS	185	return -ENODEV;
d5a27370	186
ebb945a9 BS	187	ret = nouveau_copy_create(parent, engine, oclass, true, 1, &priv);
	188	*pobject = nv_object(priv);
	189	if (ret)
	190	return ret;
	191
	192	nv_subdev(priv)->unit = 0x00000080;
	193	nv_subdev(priv)->intr = nvc0_copy_intr;
	194	nv_engine(priv)->cclass = &nvc0_copy1_cclass;
	195	nv_engine(priv)->sclass = nvc0_copy1_sclass;
	196	return 0;
d5a27370 BS	197	}
d5a27370 BS	198
ebb945a9 BS	199	static int
ebb945a9 BS	200	nvc0_copy_init(struct nouveau_object *object)
d5a27370	201	{
ebb945a9 BS	202	int idx = nv_engidx(object) - NVDEV_ENGINE_COPY0;
	203	struct nvc0_copy_priv priv = (void )object;
	204	int ret, i;
	205
	206	ret = nouveau_copy_init(&priv->base);
	207	if (ret)
	208	return ret;
	209
	210	/* disable all interrupts */
	211	nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);
	212
	213	/* upload ucode */
	214	nv_wr32(priv, 0x1041c0 + (idx * 0x1000), 0x01000000);
	215	for (i = 0; i < sizeof(nvc0_pcopy_data) / 4; i++)
	216	nv_wr32(priv, 0x1041c4 + (idx * 0x1000), nvc0_pcopy_data[i]);
	217
	218	nv_wr32(priv, 0x104180 + (idx * 0x1000), 0x01000000);
	219	for (i = 0; i < sizeof(nvc0_pcopy_code) / 4; i++) {
	220	if ((i & 0x3f) == 0)
	221	nv_wr32(priv, 0x104188 + (idx * 0x1000), i >> 6);
	222	nv_wr32(priv, 0x104184 + (idx * 0x1000), nvc0_pcopy_code[i]);
d5a27370 BS	223	}
d5a27370 BS	224
ebb945a9 BS	225	/* start it running */
	226	nv_wr32(priv, 0x104084 + (idx * 0x1000), idx);
	227	nv_wr32(priv, 0x10410c + (idx * 0x1000), 0x00000000);
	228	nv_wr32(priv, 0x104104 + (idx * 0x1000), 0x00000000); /* ENTRY */
	229	nv_wr32(priv, 0x104100 + (idx * 0x1000), 0x00000002); /* TRIGGER */
d5a27370 BS	230	return 0;
d5a27370 BS	231	}
ebb945a9 BS	232
	233	static int
	234	nvc0_copy_fini(struct nouveau_object *object, bool suspend)
	235	{
	236	int idx = nv_engidx(object) - NVDEV_ENGINE_COPY0;
	237	struct nvc0_copy_priv priv = (void )object;
	238
	239	nv_mask(priv, 0x104048 + (idx * 0x1000), 0x00000003, 0x00000000);
	240	nv_wr32(priv, 0x104014 + (idx * 0x1000), 0xffffffff);
	241
	242	return nouveau_copy_fini(&priv->base, suspend);
	243	}
	244
	245	struct nouveau_oclass
	246	nvc0_copy0_oclass = {
	247	.handle = NV_ENGINE(COPY0, 0xc0),
	248	.ofuncs = &(struct nouveau_ofuncs) {
	249	.ctor = nvc0_copy0_ctor,
	250	.dtor = _nouveau_copy_dtor,
	251	.init = nvc0_copy_init,
	252	.fini = nvc0_copy_fini,
	253	},
	254	};
	255
	256	struct nouveau_oclass
	257	nvc0_copy1_oclass = {
	258	.handle = NV_ENGINE(COPY1, 0xc0),
	259	.ofuncs = &(struct nouveau_ofuncs) {
	260	.ctor = nvc0_copy1_ctor,
	261	.dtor = _nouveau_copy_dtor,
	262	.init = nvc0_copy_init,
	263	.fini = nvc0_copy_fini,
	264	},
	265	};