[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / engine / disp / nv50.h

#ifndef __NV50_DISP_H__
#define __NV50_DISP_H__

#include <core/parent.h>
#include <core/namedb.h>
#include <core/engctx.h>
#include <core/ramht.h>
#include <core/event.h>

#include <engine/dmaobj.h>
#include <engine/disp.h>

struct dcb_output;

struct nv50_disp_priv {
	struct nouveau_disp base;
	struct nouveau_oclass *sclass;

	struct work_struct supervisor;
	u32 super;

	struct {
		int nr;
	} head;
	struct {
		int nr;
		int (*power)(struct nv50_disp_priv *, int dac, u32 data);
		int (*sense)(struct nv50_disp_priv *, int dac, u32 load);
	} dac;
	struct {
		int nr;
		int (*power)(struct nv50_disp_priv *, int sor, u32 data);
		int (*hda_eld)(struct nv50_disp_priv *, int sor, u8 *, u32);
		int (*hdmi)(struct nv50_disp_priv *, int head, int sor, u32);
		int (*dp_train_init)(struct nv50_disp_priv *, int sor, int link,
				     int head, u16 type, u16 mask, u32 data,
				     struct dcb_output *);
		int (*dp_train_fini)(struct nv50_disp_priv *, int sor, int link,
				     int head, u16 type, u16 mask, u32 data,
				     struct dcb_output *);
		int (*dp_train)(struct nv50_disp_priv *, int sor, int link,
				u16 type, u16 mask, u32 data,
				struct dcb_output *);
		int (*dp_lnkctl)(struct nv50_disp_priv *, int sor, int link,
				 int head, u16 type, u16 mask, u32 data,
				 struct dcb_output *);
		int (*dp_drvctl)(struct nv50_disp_priv *, int sor, int link,
				 int lane, u16 type, u16 mask, u32 data,
				 struct dcb_output *);
		u32 lvdsconf;
	} sor;
};

#define DAC_MTHD(n) (n), (n) + 0x03

int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32);
int nv50_dac_power(struct nv50_disp_priv *, int, u32);
int nv50_dac_sense(struct nv50_disp_priv *, int, u32);

#define SOR_MTHD(n) (n), (n) + 0x3f

int nva3_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);
int nvd0_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);

int nv84_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
int nva3_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);

int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32);
int nv50_sor_power(struct nv50_disp_priv *, int, u32);

int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16,
		           u32, struct dcb_output *);
int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16,
		           u32, struct dcb_output *);
int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
		      struct dcb_output *);
int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);
int nv94_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);

int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
		      struct dcb_output *);
int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);
int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
		       struct dcb_output *);

struct nv50_disp_base {
	struct nouveau_parent base;
	struct nouveau_ramht *ramht;
	u32 chan;
};

struct nv50_disp_chan {
	struct nouveau_namedb base;
	int chid;
};

int  nv50_disp_chan_create_(struct nouveau_object *, struct nouveau_object *,
			    struct nouveau_oclass *, int, int, void **);
void nv50_disp_chan_destroy(struct nv50_disp_chan *);
u32  nv50_disp_chan_rd32(struct nouveau_object *, u64);
void nv50_disp_chan_wr32(struct nouveau_object *, u64, u32);

#define nv50_disp_chan_init(a)                                                 \
	nouveau_namedb_init(&(a)->base)
#define nv50_disp_chan_fini(a,b)                                               \
	nouveau_namedb_fini(&(a)->base, (b))

int  nv50_disp_dmac_create_(struct nouveau_object *, struct nouveau_object *,
			    struct nouveau_oclass *, u32, int, int, void **);
void nv50_disp_dmac_dtor(struct nouveau_object *);

struct nv50_disp_dmac {
	struct nv50_disp_chan base;
	struct nouveau_dmaobj *pushdma;
	u32 push;
};

struct nv50_disp_pioc {
	struct nv50_disp_chan base;
};

extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
extern struct nouveau_oclass nv50_disp_cclass;
void nv50_disp_intr_supervisor(struct work_struct *);
void nv50_disp_intr(struct nouveau_subdev *);

extern struct nouveau_omthds nv84_disp_base_omthds[];

extern struct nouveau_omthds nva3_disp_base_omthds[];

extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;
extern struct nouveau_oclass nvd0_disp_cclass;
void nvd0_disp_intr_supervisor(struct work_struct *);
void nvd0_disp_intr(struct nouveau_subdev *);

#endif
Commit	Line	Data
70cabe4a BS	1	#ifndef __NV50_DISP_H__
	2	#define __NV50_DISP_H__
	3
	4	#include <core/parent.h>
370c00f9	5	#include <core/namedb.h>
1d7c71a3	6	#include <core/engctx.h>
370c00f9	7	#include <core/ramht.h>
1d7c71a3	8	#include <core/event.h>
370c00f9 BS	9
370c00f9 BS	10	#include <engine/dmaobj.h>
70cabe4a BS	11	#include <engine/disp.h>
70cabe4a BS	12
6c5a0424 BS	13	struct dcb_output;
6c5a0424 BS	14
70cabe4a BS	15	struct nv50_disp_priv {
	16	struct nouveau_disp base;
	17	struct nouveau_oclass *sclass;
5cc027f6 BS	18
	19	struct work_struct supervisor;
	20	u32 super;
	21
70cabe4a BS	22	struct {
	23	int nr;
	24	} head;
	25	struct {
	26	int nr;
35b21d39	27	int (power)(struct nv50_disp_priv , int dac, u32 data);
7ebb38b5	28	int (sense)(struct nv50_disp_priv , int dac, u32 load);
70cabe4a BS	29	} dac;
	30	struct {
	31	int nr;
74b66850	32	int (power)(struct nv50_disp_priv , int sor, u32 data);
0a9e2b95	33	int (hda_eld)(struct nv50_disp_priv , int sor, u8 *, u32);
1c30cd09	34	int (hdmi)(struct nv50_disp_priv , int head, int sor, u32);
8f2abc25 BS	35	int (dp_train_init)(struct nv50_disp_priv , int sor, int link,
	36	int head, u16 type, u16 mask, u32 data,
	37	struct dcb_output *);
	38	int (dp_train_fini)(struct nv50_disp_priv , int sor, int link,
	39	int head, u16 type, u16 mask, u32 data,
	40	struct dcb_output *);
6c5a0424 BS	41	int (dp_train)(struct nv50_disp_priv , int sor, int link,
	42	u16 type, u16 mask, u32 data,
	43	struct dcb_output *);
	44	int (dp_lnkctl)(struct nv50_disp_priv , int sor, int link,
	45	int head, u16 type, u16 mask, u32 data,
	46	struct dcb_output *);
	47	int (dp_drvctl)(struct nv50_disp_priv , int sor, int link,
	48	int lane, u16 type, u16 mask, u32 data,
	49	struct dcb_output *);
4a230fa6	50	u32 lvdsconf;
70cabe4a BS	51	} sor;
	52	};
	53
35b21d39 BS	54	#define DAC_MTHD(n) (n), (n) + 0x03
	55
	56	int nv50_dac_mthd(struct nouveau_object , u32, void , u32);
	57	int nv50_dac_power(struct nv50_disp_priv *, int, u32);
7ebb38b5	58	int nv50_dac_sense(struct nv50_disp_priv *, int, u32);
35b21d39	59
6c5a0424 BS	60	#define SOR_MTHD(n) (n), (n) + 0x3f
6c5a0424 BS	61
a4feaf4e BS	62	int nva3_hda_eld(struct nv50_disp_priv , int, u8 , u32);
	63	int nvd0_hda_eld(struct nv50_disp_priv , int, u8 , u32);
	64
8e9e3d2d BS	65	int nv84_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
8e9e3d2d BS	66	int nva3_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
a4feaf4e BS	67	int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
a4feaf4e BS	68
6c5a0424	69	int nv50_sor_mthd(struct nouveau_object , u32, void , u32);
74b66850	70	int nv50_sor_power(struct nv50_disp_priv *, int, u32);
6c5a0424	71
8f2abc25 BS	72	int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16,
	73	u32, struct dcb_output *);
	74	int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16,
	75	u32, struct dcb_output *);
f7960736 BS	76	int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
	77	struct dcb_output *);
	78	int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	79	struct dcb_output *);
	80	int nv94_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	81	struct dcb_output *);
	82
6c5a0424 BS	83	int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
	84	struct dcb_output *);
	85	int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	86	struct dcb_output *);
	87	int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
	88	struct dcb_output *);
	89
70cabe4a BS	90	struct nv50_disp_base {
70cabe4a BS	91	struct nouveau_parent base;
370c00f9 BS	92	struct nouveau_ramht *ramht;
370c00f9 BS	93	u32 chan;
70cabe4a BS	94	};
	95
	96	struct nv50_disp_chan {
370c00f9 BS	97	struct nouveau_namedb base;
	98	int chid;
	99	};
	100
	101	int nv50_disp_chan_create_(struct nouveau_object , struct nouveau_object ,
	102	struct nouveau_oclass , int, int, void *);
	103	void nv50_disp_chan_destroy(struct nv50_disp_chan *);
	104	u32 nv50_disp_chan_rd32(struct nouveau_object *, u64);
	105	void nv50_disp_chan_wr32(struct nouveau_object *, u64, u32);
	106
	107	#define nv50_disp_chan_init(a) \
	108	nouveau_namedb_init(&(a)->base)
	109	#define nv50_disp_chan_fini(a,b) \
	110	nouveau_namedb_fini(&(a)->base, (b))
	111
	112	int nv50_disp_dmac_create_(struct nouveau_object , struct nouveau_object ,
	113	struct nouveau_oclass , u32, int, int, void *);
	114	void nv50_disp_dmac_dtor(struct nouveau_object *);
	115
	116	struct nv50_disp_dmac {
	117	struct nv50_disp_chan base;
	118	struct nouveau_dmaobj *pushdma;
	119	u32 push;
	120	};
	121
	122	struct nv50_disp_pioc {
	123	struct nv50_disp_chan base;
70cabe4a BS	124	};
	125
	126	extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
370c00f9 BS	127	extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
	128	extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
	129	extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
	130	extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
70cabe4a BS	131	extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
70cabe4a BS	132	extern struct nouveau_oclass nv50_disp_cclass;
5cc027f6	133	void nv50_disp_intr_supervisor(struct work_struct *);
70cabe4a BS	134	void nv50_disp_intr(struct nouveau_subdev *);
70cabe4a BS	135
ef22c8bb BS	136	extern struct nouveau_omthds nv84_disp_base_omthds[];
	137
	138	extern struct nouveau_omthds nva3_disp_base_omthds[];
	139
46654061 BS	140	extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
	141	extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
	142	extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
	143	extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
	144	extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
	145	extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;
	146	extern struct nouveau_oclass nvd0_disp_cclass;
5cc027f6	147	void nvd0_disp_intr_supervisor(struct work_struct *);
46654061 BS	148	void nvd0_disp_intr(struct nouveau_subdev *);
46654061 BS	149
70cabe4a	150	#endif