projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9274f4a9 BS |
1 | #ifndef __NOUVEAU_DEVICE_H__ |
| 2 | #define __NOUVEAU_DEVICE_H__ | |
| 3 | ||
| 4 | #include <core/object.h> | |
| 5 | #include <core/subdev.h> | |
| 6 | #include <core/engine.h> | |
| 7 | ||
| 8 | enum nv_subdev_type { | |
| 9 | NVDEV_SUBDEV_DEVICE, | |
| 10 | NVDEV_SUBDEV_VBIOS, | |
| 11 | NVDEV_SUBDEV_GPIO, | |
| 12 | NVDEV_SUBDEV_I2C, | |
| 13 | NVDEV_SUBDEV_CLOCK, | |
| 14 | NVDEV_SUBDEV_MXM, | |
| 15 | NVDEV_SUBDEV_DEVINIT, | |
| 16 | NVDEV_SUBDEV_MC, | |
| 17 | NVDEV_SUBDEV_TIMER, | |
| 18 | NVDEV_SUBDEV_FB, | |
| 19 | NVDEV_SUBDEV_LTCG, | |
| 20 | NVDEV_SUBDEV_INSTMEM, | |
| 21 | NVDEV_SUBDEV_VM, | |
| 22 | NVDEV_SUBDEV_BAR, | |
| 23 | NVDEV_SUBDEV_VOLT, | |
| 24 | NVDEV_SUBDEV_FAN0, | |
| 25 | NVDEV_SUBDEV_THERM, | |
| 26 | NVDEV_ENGINE_DMAOBJ, | |
| 27 | NVDEV_ENGINE_FIFO, | |
| 28 | NVDEV_ENGINE_SW, | |
| 29 | NVDEV_ENGINE_GR, | |
| 30 | NVDEV_ENGINE_MPEG, | |
| 31 | NVDEV_ENGINE_ME, | |
| 32 | NVDEV_ENGINE_VP, | |
| 33 | NVDEV_ENGINE_CRYPT, | |
| 34 | NVDEV_ENGINE_BSP, | |
| 35 | NVDEV_ENGINE_PPP, | |
| 36 | NVDEV_ENGINE_COPY0, | |
| 37 | NVDEV_ENGINE_COPY1, | |
| 38 | NVDEV_ENGINE_UNK1C1, | |
| dbff2dee | 39 | NVDEV_ENGINE_VENC, |
| 9274f4a9 BS |
40 | NVDEV_ENGINE_DISP, |
| 41 | NVDEV_SUBDEV_NR, | |
| 42 | }; | |
| 43 | ||
| 44 | struct nouveau_device { | |
| 45 | struct nouveau_subdev base; | |
| 46 | struct list_head head; | |
| 47 | ||
| 48 | struct pci_dev *pdev; | |
| 49 | u64 handle; | |
| 50 | ||
| 51 | const char *cfgopt; | |
| 52 | const char *dbgopt; | |
| 53 | const char *name; | |
| 54 | const char *cname; | |
| 55 | ||
| 56 | enum { | |
| 57 | NV_04 = 0x04, | |
| 58 | NV_10 = 0x10, | |
| 59 | NV_20 = 0x20, | |
| 60 | NV_30 = 0x30, | |
| 61 | NV_40 = 0x40, | |
| 62 | NV_50 = 0x50, | |
| 63 | NV_C0 = 0xc0, | |
| 64 | NV_D0 = 0xd0, | |
| 65 | NV_E0 = 0xe0, | |
| 66 | } card_type; | |
| 67 | u32 chipset; | |
| 68 | u32 crystal; | |
| 69 | ||
| 70 | struct nouveau_oclass *oclass[NVDEV_SUBDEV_NR]; | |
| 71 | struct nouveau_object *subdev[NVDEV_SUBDEV_NR]; | |
| 72 | }; | |
| 73 | ||
| 74 | static inline struct nouveau_device * | |
| 75 | nv_device(void *obj) | |
| 76 | { | |
| 77 | struct nouveau_object *object = nv_object(obj); | |
| 78 | struct nouveau_object *device = object; | |
| 79 | ||
| 80 | if (device->engine) | |
| 81 | device = device->engine; | |
| 82 | if (device->parent) | |
| 83 | device = device->parent; | |
| 84 | ||
| 85 | #if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA | |
| 86 | if (unlikely(!nv_iclass(device, NV_SUBDEV_CLASS) || | |
| 87 | (nv_hclass(device) & 0xff) != NVDEV_SUBDEV_DEVICE)) { | |
| 88 | nv_assert("BAD CAST -> NvDevice, 0x%08x 0x%08x", | |
| 89 | nv_hclass(object), nv_hclass(device)); | |
| 90 | } | |
| 91 | #endif | |
| 92 | ||
| 93 | return (void *)device; | |
| 94 | } | |
| 95 | ||
| 96 | static inline struct nouveau_subdev * | |
| 97 | nouveau_subdev(void *obj, int sub) | |
| 98 | { | |
| 99 | if (nv_device(obj)->subdev[sub]) | |
| 100 | return nv_subdev(nv_device(obj)->subdev[sub]); | |
| 101 | return NULL; | |
| 102 | } | |
| 103 | ||
| 104 | static inline struct nouveau_engine * | |
| 105 | nouveau_engine(void *obj, int sub) | |
| 106 | { | |
| 107 | struct nouveau_subdev *subdev = nouveau_subdev(obj, sub); | |
| 108 | if (subdev && nv_iclass(subdev, NV_ENGINE_CLASS)) | |
| 109 | return nv_engine(subdev); | |
| 110 | return NULL; | |
| 111 | } | |
| 112 | ||
| 113 | static inline bool | |
| 114 | nv_device_match(struct nouveau_object *object, u16 dev, u16 ven, u16 sub) | |
| 115 | { | |
| 116 | struct nouveau_device *device = nv_device(object); | |
| 117 | return device->pdev->device == dev && | |
| 118 | device->pdev->subsystem_vendor == ven && | |
| 119 | device->pdev->subsystem_device == sub; | |
| 120 | } | |
| 121 | ||
| 122 | #endif |