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cb75d97e | 1 | /* |
88524bc0 | 2 | * Copyright 2013 Red Hat Inc. |
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3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
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25 | #include <subdev/bios.h> |
26 | #include <subdev/bios/dcb.h> | |
27 | #include <subdev/bios/disp.h> | |
28 | #include <subdev/bios/init.h> | |
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29 | #include <subdev/vga.h> |
30 | ||
cf336014 | 31 | #include "nv50.h" |
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32 | |
33 | static int | |
88524bc0 | 34 | nv50_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) |
cb75d97e | 35 | { |
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36 | struct nv50_devinit_priv *priv = (void *)devinit; |
37 | struct nouveau_bios *bios = nouveau_bios(priv); | |
38 | struct nvbios_pll info; | |
39 | int N1, M1, N2, M2, P; | |
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40 | int ret; |
41 | ||
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42 | ret = nvbios_pll_parse(bios, type, &info); |
43 | if (ret) { | |
44 | nv_error(devinit, "failed to retrieve pll data, %d\n", ret); | |
cb75d97e | 45 | return ret; |
88524bc0 | 46 | } |
cb75d97e | 47 | |
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48 | ret = nv04_pll_calc(nv_subdev(devinit), &info, freq, &N1, &M1, &N2, &M2, &P); |
49 | if (!ret) { | |
50 | nv_error(devinit, "failed pll calculation\n"); | |
51 | return ret; | |
52 | } | |
cb75d97e | 53 | |
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54 | switch (info.type) { |
55 | case PLL_VPLL0: | |
56 | case PLL_VPLL1: | |
57 | nv_wr32(priv, info.reg + 0, 0x10000611); | |
58 | nv_mask(priv, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); | |
59 | nv_mask(priv, info.reg + 8, 0x7fff00ff, (P << 28) | | |
60 | (M2 << 16) | N2); | |
61 | break; | |
62 | case PLL_MEMORY: | |
63 | nv_mask(priv, info.reg + 0, 0x01ff0000, (P << 22) | | |
64 | (info.bias_p << 19) | | |
65 | (P << 16)); | |
66 | nv_wr32(priv, info.reg + 4, (N1 << 8) | M1); | |
67 | break; | |
68 | default: | |
69 | nv_mask(priv, info.reg + 0, 0x00070000, (P << 16)); | |
70 | nv_wr32(priv, info.reg + 4, (N1 << 8) | M1); | |
71 | break; | |
72 | } | |
73 | ||
74 | return 0; | |
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75 | } |
76 | ||
88524bc0 | 77 | int |
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78 | nv50_devinit_init(struct nouveau_object *object) |
79 | { | |
b6e4ad20 | 80 | struct nouveau_bios *bios = nouveau_bios(object); |
cb75d97e | 81 | struct nv50_devinit_priv *priv = (void *)object; |
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82 | struct nvbios_outp info; |
83 | struct dcb_output outp; | |
84 | u8 ver = 0xff, hdr, cnt, len; | |
85 | int ret, i = 0; | |
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86 | |
87 | if (!priv->base.post) { | |
88 | if (!nv_rdvgac(priv, 0, 0x00) && | |
89 | !nv_rdvgac(priv, 0, 0x1a)) { | |
90 | nv_info(priv, "adaptor not initialised\n"); | |
91 | priv->base.post = true; | |
92 | } | |
93 | } | |
94 | ||
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95 | ret = nouveau_devinit_init(&priv->base); |
96 | if (ret) | |
97 | return ret; | |
98 | ||
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99 | /* if we ran the init tables, we have to execute the first script |
100 | * pointer of each dcb entry's display encoder table in order | |
101 | * to properly initialise each encoder. | |
b6e4ad20 | 102 | */ |
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103 | while (priv->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) { |
104 | if (nvbios_outp_match(bios, outp.hasht, outp.hashm, | |
105 | &ver, &hdr, &cnt, &len, &info)) { | |
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106 | struct nvbios_init init = { |
107 | .subdev = nv_subdev(priv), | |
108 | .bios = bios, | |
109 | .offset = info.script[0], | |
110 | .outp = &outp, | |
111 | .crtc = -1, | |
112 | .execute = 1, | |
113 | }; | |
114 | ||
115 | nvbios_exec(&init); | |
116 | } | |
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117 | i++; |
118 | } | |
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119 | |
120 | return 0; | |
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121 | } |
122 | ||
cf336014 | 123 | int |
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124 | nv50_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
125 | struct nouveau_oclass *oclass, void *data, u32 size, | |
126 | struct nouveau_object **pobject) | |
cb75d97e | 127 | { |
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128 | struct nv50_devinit_priv *priv; |
129 | int ret; | |
130 | ||
131 | ret = nouveau_devinit_create(parent, engine, oclass, &priv); | |
132 | *pobject = nv_object(priv); | |
133 | if (ret) | |
134 | return ret; | |
135 | ||
88524bc0 | 136 | return 0; |
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137 | } |
138 | ||
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139 | struct nouveau_oclass * |
140 | nv50_devinit_oclass = &(struct nouveau_devinit_impl) { | |
141 | .base.handle = NV_SUBDEV(DEVINIT, 0x50), | |
142 | .base.ofuncs = &(struct nouveau_ofuncs) { | |
cb75d97e | 143 | .ctor = nv50_devinit_ctor, |
88524bc0 | 144 | .dtor = _nouveau_devinit_dtor, |
cb75d97e | 145 | .init = nv50_devinit_init, |
88524bc0 | 146 | .fini = _nouveau_devinit_fini, |
cb75d97e | 147 | }, |
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148 | .pll_set = nv50_devinit_pll_set, |
149 | }.base; |