[deliverable/linux.git] / drivers / gpu / drm / nouveau / include / nvkm / engine / xtensa.h

#ifndef __NVKM_XTENSA_H__
#define __NVKM_XTENSA_H__
#define nvkm_xtensa(p) container_of((p), struct nvkm_xtensa, engine)
#include <core/engine.h>

struct nvkm_xtensa {
	const struct nvkm_xtensa_func *func;
	u32 addr;
	struct nvkm_engine engine;

	struct nvkm_memory *gpu_fw;
};

int nvkm_xtensa_new_(const struct nvkm_xtensa_func *, struct nvkm_device *,
		     int index, bool enable, u32 addr, struct nvkm_engine **);

struct nvkm_xtensa_func {
	u32 pmc_enable;
	u32 fifo_val;
	u32 unkd28;
	struct nvkm_sclass sclass[];
};
#endif
Commit	Line	Data
5025407b BS	1	#ifndef __NVKM_XTENSA_H__
5025407b BS	2	#define __NVKM_XTENSA_H__
c79a191b	3	#define nvkm_xtensa(p) container_of((p), struct nvkm_xtensa, engine)
44b1e3bd	4	#include <core/engine.h>
44b1e3bd	5
5025407b	6	struct nvkm_xtensa {
c79a191b	7	const struct nvkm_xtensa_func *func;
44b1e3bd	8	u32 addr;
98b20c9a BS	9	struct nvkm_engine engine;
98b20c9a BS	10
faf46898	11	struct nvkm_memory *gpu_fw;
44b1e3bd IM	12	};
44b1e3bd IM	13
98b20c9a BS	14	int nvkm_xtensa_new_(const struct nvkm_xtensa_func , struct nvkm_device ,
	15	int index, bool enable, u32 addr, struct nvkm_engine **);
	16
c79a191b	17	struct nvkm_xtensa_func {
98b20c9a BS	18	u32 pmc_enable;
	19	u32 fifo_val;
	20	u32 unkd28;
c79a191b BS	21	struct nvkm_sclass sclass[];
c79a191b BS	22	};
44b1e3bd	23	#endif