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1 | /* |
2 | * Copyright 2007-2008 Nouveau Project | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
21 | * DEALINGS IN THE SOFTWARE. | |
22 | */ | |
23 | ||
24 | #ifndef __NOUVEAU_BIOS_H__ | |
25 | #define __NOUVEAU_BIOS_H__ | |
26 | ||
27 | #include "nvreg.h" | |
28 | #include "nouveau_i2c.h" | |
29 | ||
30 | #define DCB_MAX_NUM_ENTRIES 16 | |
31 | #define DCB_MAX_NUM_I2C_ENTRIES 16 | |
32 | #define DCB_MAX_NUM_GPIO_ENTRIES 32 | |
33 | #define DCB_MAX_NUM_CONNECTOR_ENTRIES 16 | |
34 | ||
35 | #define DCB_LOC_ON_CHIP 0 | |
36 | ||
e7cc51c5 | 37 | struct dcb_i2c_entry { |
07fee3d5 | 38 | uint32_t entry; |
e7cc51c5 BS |
39 | uint8_t port_type; |
40 | uint8_t read, write; | |
41 | struct nouveau_i2c_chan *chan; | |
42 | }; | |
43 | ||
44 | enum dcb_gpio_tag { | |
45 | DCB_GPIO_TVDAC0 = 0xc, | |
46 | DCB_GPIO_TVDAC1 = 0x2d, | |
47 | }; | |
48 | ||
49 | struct dcb_gpio_entry { | |
50 | enum dcb_gpio_tag tag; | |
51 | int line; | |
52 | bool invert; | |
2535d71c | 53 | uint32_t entry; |
02faec09 BS |
54 | uint8_t state_default; |
55 | uint8_t state[2]; | |
e7cc51c5 BS |
56 | }; |
57 | ||
58 | struct dcb_gpio_table { | |
59 | int entries; | |
60 | struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES]; | |
61 | }; | |
62 | ||
63 | enum dcb_connector_type { | |
64 | DCB_CONNECTOR_VGA = 0x00, | |
65 | DCB_CONNECTOR_TV_0 = 0x10, | |
66 | DCB_CONNECTOR_TV_1 = 0x11, | |
67 | DCB_CONNECTOR_TV_3 = 0x13, | |
68 | DCB_CONNECTOR_DVI_I = 0x30, | |
69 | DCB_CONNECTOR_DVI_D = 0x31, | |
70 | DCB_CONNECTOR_LVDS = 0x40, | |
71 | DCB_CONNECTOR_DP = 0x46, | |
72 | DCB_CONNECTOR_eDP = 0x47, | |
73 | DCB_CONNECTOR_HDMI_0 = 0x60, | |
74 | DCB_CONNECTOR_HDMI_1 = 0x61, | |
f66fa771 | 75 | DCB_CONNECTOR_NONE = 0xff |
e7cc51c5 BS |
76 | }; |
77 | ||
78 | struct dcb_connector_table_entry { | |
d544d623 | 79 | uint8_t index; |
e7cc51c5 BS |
80 | uint32_t entry; |
81 | enum dcb_connector_type type; | |
d544d623 | 82 | uint8_t index2; |
e7cc51c5 | 83 | uint8_t gpio_tag; |
8f1a6086 | 84 | void *drm; |
e7cc51c5 BS |
85 | }; |
86 | ||
87 | struct dcb_connector_table { | |
88 | int entries; | |
89 | struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES]; | |
90 | }; | |
91 | ||
92 | enum dcb_type { | |
93 | OUTPUT_ANALOG = 0, | |
94 | OUTPUT_TV = 1, | |
95 | OUTPUT_TMDS = 2, | |
96 | OUTPUT_LVDS = 3, | |
97 | OUTPUT_DP = 6, | |
98 | OUTPUT_ANY = -1 | |
99 | }; | |
100 | ||
6ee73861 BS |
101 | struct dcb_entry { |
102 | int index; /* may not be raw dcb index if merging has happened */ | |
e7cc51c5 | 103 | enum dcb_type type; |
6ee73861 BS |
104 | uint8_t i2c_index; |
105 | uint8_t heads; | |
106 | uint8_t connector; | |
107 | uint8_t bus; | |
108 | uint8_t location; | |
109 | uint8_t or; | |
110 | bool duallink_possible; | |
111 | union { | |
112 | struct sor_conf { | |
113 | int link; | |
114 | } sorconf; | |
115 | struct { | |
116 | int maxfreq; | |
117 | } crtconf; | |
118 | struct { | |
119 | struct sor_conf sor; | |
120 | bool use_straps_for_mode; | |
a6ed76d7 | 121 | bool use_acpi_for_edid; |
6ee73861 BS |
122 | bool use_power_scripts; |
123 | } lvdsconf; | |
124 | struct { | |
125 | bool has_component_output; | |
126 | } tvconf; | |
127 | struct { | |
128 | struct sor_conf sor; | |
129 | int link_nr; | |
130 | int link_bw; | |
131 | } dpconf; | |
132 | struct { | |
133 | struct sor_conf sor; | |
4a9f822f | 134 | int slave_addr; |
6ee73861 BS |
135 | } tmdsconf; |
136 | }; | |
137 | bool i2c_upper_default; | |
138 | }; | |
139 | ||
7f245b20 | 140 | struct dcb_table { |
6ee73861 BS |
141 | uint8_t version; |
142 | ||
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143 | int entries; |
144 | struct dcb_entry entry[DCB_MAX_NUM_ENTRIES]; | |
6ee73861 BS |
145 | |
146 | uint8_t *i2c_table; | |
147 | uint8_t i2c_default_indices; | |
7f245b20 | 148 | struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES]; |
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149 | |
150 | uint16_t gpio_table_ptr; | |
a6678b2a | 151 | struct dcb_gpio_table gpio; |
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152 | uint16_t connector_table_ptr; |
153 | struct dcb_connector_table connector; | |
154 | }; | |
155 | ||
6ee73861 BS |
156 | enum nouveau_or { |
157 | OUTPUT_A = (1 << 0), | |
158 | OUTPUT_B = (1 << 1), | |
159 | OUTPUT_C = (1 << 2) | |
160 | }; | |
161 | ||
162 | enum LVDS_script { | |
163 | /* Order *does* matter here */ | |
164 | LVDS_INIT = 1, | |
165 | LVDS_RESET, | |
166 | LVDS_BACKLIGHT_ON, | |
167 | LVDS_BACKLIGHT_OFF, | |
168 | LVDS_PANEL_ON, | |
169 | LVDS_PANEL_OFF | |
170 | }; | |
171 | ||
172 | /* changing these requires matching changes to reg tables in nv_get_clock */ | |
173 | #define MAX_PLL_TYPES 4 | |
174 | enum pll_types { | |
175 | NVPLL, | |
176 | MPLL, | |
177 | VPLL1, | |
178 | VPLL2 | |
179 | }; | |
180 | ||
181 | struct pll_lims { | |
182 | struct { | |
183 | int minfreq; | |
184 | int maxfreq; | |
185 | int min_inputfreq; | |
186 | int max_inputfreq; | |
187 | ||
188 | uint8_t min_m; | |
189 | uint8_t max_m; | |
190 | uint8_t min_n; | |
191 | uint8_t max_n; | |
192 | } vco1, vco2; | |
193 | ||
194 | uint8_t max_log2p; | |
195 | /* | |
196 | * for most pre nv50 cards setting a log2P of 7 (the common max_log2p | |
197 | * value) is no different to 6 (at least for vplls) so allowing the MNP | |
198 | * calc to use 7 causes the generated clock to be out by a factor of 2. | |
199 | * however, max_log2p cannot be fixed-up during parsing as the | |
200 | * unmodified max_log2p value is still needed for setting mplls, hence | |
201 | * an additional max_usable_log2p member | |
202 | */ | |
203 | uint8_t max_usable_log2p; | |
204 | uint8_t log2p_bias; | |
205 | ||
206 | uint8_t min_p; | |
207 | uint8_t max_p; | |
208 | ||
209 | int refclk; | |
210 | }; | |
211 | ||
04a39c57 BS |
212 | struct nvbios { |
213 | struct drm_device *dev; | |
214 | ||
6ee73861 BS |
215 | uint8_t chip_version; |
216 | ||
217 | uint32_t dactestval; | |
218 | uint32_t tvdactestval; | |
219 | uint8_t digital_min_front_porch; | |
220 | bool fp_no_ddc; | |
6ee73861 | 221 | |
d9184fa9 | 222 | struct mutex lock; |
39c9bfb4 | 223 | |
6ee73861 BS |
224 | uint8_t data[NV_PROM_SIZE]; |
225 | unsigned int length; | |
226 | bool execute; | |
227 | ||
228 | uint8_t major_version; | |
229 | uint8_t feature_byte; | |
230 | bool is_mobile; | |
231 | ||
232 | uint32_t fmaxvco, fminvco; | |
233 | ||
234 | bool old_style_init; | |
235 | uint16_t init_script_tbls_ptr; | |
236 | uint16_t extra_init_script_tbl_ptr; | |
237 | uint16_t macro_index_tbl_ptr; | |
238 | uint16_t macro_tbl_ptr; | |
239 | uint16_t condition_tbl_ptr; | |
240 | uint16_t io_condition_tbl_ptr; | |
241 | uint16_t io_flag_condition_tbl_ptr; | |
242 | uint16_t init_function_tbl_ptr; | |
243 | ||
244 | uint16_t pll_limit_tbl_ptr; | |
245 | uint16_t ram_restrict_tbl_ptr; | |
37383650 | 246 | uint8_t ram_restrict_group_count; |
6ee73861 BS |
247 | |
248 | uint16_t some_script_ptr; /* BIT I + 14 */ | |
249 | uint16_t init96_tbl_ptr; /* BIT I + 16 */ | |
250 | ||
7f245b20 | 251 | struct dcb_table dcb; |
6ee73861 BS |
252 | |
253 | struct { | |
254 | int crtchead; | |
6ee73861 BS |
255 | } state; |
256 | ||
257 | struct { | |
258 | struct dcb_entry *output; | |
259 | uint16_t script_table_ptr; | |
260 | uint16_t dp_table_ptr; | |
261 | } display; | |
262 | ||
263 | struct { | |
264 | uint16_t fptablepointer; /* also used by tmds */ | |
265 | uint16_t fpxlatetableptr; | |
266 | int xlatwidth; | |
267 | uint16_t lvdsmanufacturerpointer; | |
268 | uint16_t fpxlatemanufacturertableptr; | |
269 | uint16_t mode_ptr; | |
270 | uint16_t xlated_entry; | |
271 | bool power_off_for_reset; | |
272 | bool reset_after_pclk_change; | |
273 | bool dual_link; | |
274 | bool link_c_increment; | |
6ee73861 BS |
275 | bool if_is_24bit; |
276 | int duallink_transition_clk; | |
277 | uint8_t strapless_is_24bit; | |
278 | uint8_t *edid; | |
279 | ||
280 | /* will need resetting after suspend */ | |
281 | int last_script_invoc; | |
282 | bool lvds_init_run; | |
283 | } fp; | |
284 | ||
285 | struct { | |
286 | uint16_t output0_script_ptr; | |
287 | uint16_t output1_script_ptr; | |
288 | } tmds; | |
289 | ||
290 | struct { | |
291 | uint16_t mem_init_tbl_ptr; | |
292 | uint16_t sdr_seq_tbl_ptr; | |
293 | uint16_t ddr_seq_tbl_ptr; | |
294 | ||
295 | struct { | |
296 | uint8_t crt, tv, panel; | |
297 | } i2c_indices; | |
298 | ||
299 | uint16_t lvds_single_a_script_ptr; | |
300 | } legacy; | |
301 | }; | |
302 | ||
303 | #endif |