support for platform devices
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_display.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
1a646342 31#include "dispnv04/hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
77145f1c 40#include <engine/disp.h>
e0996aea 41
1d7c71a3
BS
42#include <core/class.h>
43
51cb4b39
BS
44static int
45nouveau_display_vblank_handler(void *data, int head)
46{
47 struct nouveau_drm *drm = data;
48 drm_handle_vblank(drm->dev, head);
49 return NVKM_EVENT_KEEP;
50}
51
52int
53nouveau_display_vblank_enable(struct drm_device *dev, int head)
54{
55 struct nouveau_display *disp = nouveau_display(dev);
56 if (disp) {
57 nouveau_event_get(disp->vblank[head]);
58 return 0;
59 }
60 return -EIO;
61}
62
63void
64nouveau_display_vblank_disable(struct drm_device *dev, int head)
65{
66 struct nouveau_display *disp = nouveau_display(dev);
67 if (disp)
68 nouveau_event_put(disp->vblank[head]);
69}
70
d83ef853
BS
71static inline int
72calc(int blanks, int blanke, int total, int line)
73{
74 if (blanke >= blanks) {
75 if (line >= blanks)
76 line -= total;
77 } else {
78 if (line >= blanks)
79 line -= total;
80 line -= blanke + 1;
81 }
82 return line;
83}
84
85int
86nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
87 ktime_t *stime, ktime_t *etime)
88{
89 const u32 mthd = NV04_DISP_SCANOUTPOS + nouveau_crtc(crtc)->index;
90 struct nouveau_display *disp = nouveau_display(crtc->dev);
91 struct nv04_display_scanoutpos args;
92 int ret, retry = 1;
93
94 do {
95 ret = nv_exec(disp->core, mthd, &args, sizeof(args));
96 if (ret != 0)
97 return 0;
98
99 if (args.vline) {
100 ret |= DRM_SCANOUTPOS_ACCURATE;
101 ret |= DRM_SCANOUTPOS_VALID;
102 break;
103 }
104
105 if (retry) ndelay(crtc->linedur_ns);
106 } while (retry--);
107
108 *hpos = calc(args.hblanks, args.hblanke, args.htotal, args.hline);
109 *vpos = calc(args.vblanks, args.vblanke, args.vtotal, args.vline);
110 if (stime) *stime = ns_to_ktime(args.time[0]);
111 if (etime) *etime = ns_to_ktime(args.time[1]);
112
113 if (*vpos < 0)
114 ret |= DRM_SCANOUTPOS_INVBL;
115 return ret;
116}
117
118int
119nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
120 int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
121{
122 struct drm_crtc *crtc;
123
124 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
125 if (nouveau_crtc(crtc)->index == head) {
126 return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
127 stime, etime);
128 }
129 }
130
131 return 0;
132}
133
134int
135nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
136 struct timeval *time, unsigned flags)
137{
138 struct drm_crtc *crtc;
139
140 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
141 if (nouveau_crtc(crtc)->index == head) {
142 return drm_calc_vbltimestamp_from_scanoutpos(dev,
143 head, max_error, time, flags, crtc,
144 &crtc->hwmode);
145 }
146 }
147
148 return -EINVAL;
149}
150
51cb4b39
BS
151static void
152nouveau_display_vblank_fini(struct drm_device *dev)
153{
154 struct nouveau_display *disp = nouveau_display(dev);
155 int i;
156
1139ffb9
BS
157 drm_vblank_cleanup(dev);
158
51cb4b39
BS
159 if (disp->vblank) {
160 for (i = 0; i < dev->mode_config.num_crtc; i++)
161 nouveau_event_ref(NULL, &disp->vblank[i]);
162 kfree(disp->vblank);
163 disp->vblank = NULL;
164 }
51cb4b39
BS
165}
166
167static int
168nouveau_display_vblank_init(struct drm_device *dev)
169{
170 struct nouveau_display *disp = nouveau_display(dev);
171 struct nouveau_drm *drm = nouveau_drm(dev);
172 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
173 int ret, i;
174
175 disp->vblank = kzalloc(dev->mode_config.num_crtc *
176 sizeof(*disp->vblank), GFP_KERNEL);
177 if (!disp->vblank)
178 return -ENOMEM;
179
180 for (i = 0; i < dev->mode_config.num_crtc; i++) {
181 ret = nouveau_event_new(pdisp->vblank, i,
182 nouveau_display_vblank_handler,
183 drm, &disp->vblank[i]);
184 if (ret) {
185 nouveau_display_vblank_fini(dev);
186 return ret;
187 }
188 }
189
190 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
191 if (ret) {
192 nouveau_display_vblank_fini(dev);
193 return ret;
194 }
195
196 return 0;
197}
198
6ee73861
BS
199static void
200nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
201{
202 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 203
bc9025bd 204 if (fb->nvbo)
55fb74ad 205 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
206
207 drm_framebuffer_cleanup(drm_fb);
208 kfree(fb);
209}
210
211static int
212nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
213 struct drm_file *file_priv,
214 unsigned int *handle)
215{
216 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
217
55fb74ad 218 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
219}
220
221static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
222 .destroy = nouveau_user_framebuffer_destroy,
223 .create_handle = nouveau_user_framebuffer_create_handle,
224};
225
38651674 226int
45c4e0aa
BS
227nouveau_framebuffer_init(struct drm_device *dev,
228 struct nouveau_framebuffer *nv_fb,
308e5bcb 229 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 230 struct nouveau_bo *nvbo)
6ee73861 231{
77145f1c 232 struct nouveau_drm *drm = nouveau_drm(dev);
45c4e0aa 233 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
234 int ret;
235
45c4e0aa
BS
236 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
237 nv_fb->nvbo = nvbo;
238
77145f1c 239 if (nv_device(drm->device)->card_type >= NV_50) {
45c4e0aa
BS
240 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
241 if (tile_flags == 0x7a00 ||
242 tile_flags == 0xfe00)
243 nv_fb->r_dma = NvEvoFB32;
244 else
245 if (tile_flags == 0x7000)
246 nv_fb->r_dma = NvEvoFB16;
247 else
248 nv_fb->r_dma = NvEvoVRAM_LP;
249
250 switch (fb->depth) {
4f6029da
BS
251 case 8: nv_fb->r_format = 0x1e00; break;
252 case 15: nv_fb->r_format = 0xe900; break;
253 case 16: nv_fb->r_format = 0xe800; break;
45c4e0aa 254 case 24:
4f6029da
BS
255 case 32: nv_fb->r_format = 0xcf00; break;
256 case 30: nv_fb->r_format = 0xd100; break;
45c4e0aa 257 default:
77145f1c 258 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
45c4e0aa
BS
259 return -EINVAL;
260 }
261
bd9c5a20
ML
262 if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
263 NV_ERROR(drm, "framebuffer requires contiguous bo\n");
264 return -EINVAL;
265 }
266
77145f1c 267 if (nv_device(drm->device)->chipset == 0x50)
45c4e0aa
BS
268 nv_fb->r_format |= (tile_flags << 8);
269
2fad3d5e 270 if (!tile_flags) {
77145f1c 271 if (nv_device(drm->device)->card_type < NV_D0)
01f2c773 272 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 273 else
01f2c773 274 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 275 } else {
45c4e0aa 276 u32 mode = nvbo->tile_mode;
77145f1c 277 if (nv_device(drm->device)->card_type >= NV_C0)
45c4e0aa 278 mode >>= 4;
01f2c773 279 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
BS
280 }
281 }
282
c7d73f6a
DV
283 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
284 if (ret) {
285 return ret;
286 }
287
38651674 288 return 0;
6ee73861
BS
289}
290
291static struct drm_framebuffer *
292nouveau_user_framebuffer_create(struct drm_device *dev,
293 struct drm_file *file_priv,
308e5bcb 294 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 295{
38651674 296 struct nouveau_framebuffer *nouveau_fb;
6ee73861 297 struct drm_gem_object *gem;
fdfb8332 298 int ret = -ENOMEM;
6ee73861 299
308e5bcb 300 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 301 if (!gem)
cce13ff7 302 return ERR_PTR(-ENOENT);
6ee73861 303
38651674
DA
304 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
305 if (!nouveau_fb)
fdfb8332 306 goto err_unref;
38651674
DA
307
308 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
fdfb8332
ML
309 if (ret)
310 goto err;
6ee73861 311
38651674 312 return &nouveau_fb->base;
fdfb8332
ML
313
314err:
315 kfree(nouveau_fb);
316err_unref:
317 drm_gem_object_unreference(gem);
318 return ERR_PTR(ret);
6ee73861
BS
319}
320
27d5030a 321static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 322 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 323 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
324};
325
b29caa58 326
4a67d391 327struct nouveau_drm_prop_enum_list {
de691855 328 u8 gen_mask;
b29caa58
BS
329 int type;
330 char *name;
331};
332
4a67d391 333static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
334 { 6, UNDERSCAN_AUTO, "auto" },
335 { 6, UNDERSCAN_OFF, "off" },
336 { 6, UNDERSCAN_ON, "on" },
de691855 337 {}
b29caa58
BS
338};
339
4a67d391 340static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
341 { 7, DITHERING_MODE_AUTO, "auto" },
342 { 7, DITHERING_MODE_OFF, "off" },
343 { 1, DITHERING_MODE_ON, "on" },
344 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
345 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
346 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
347 {}
348};
349
4a67d391 350static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
351 { 6, DITHERING_DEPTH_AUTO, "auto" },
352 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
353 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
354 {}
355};
356
357#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 358 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
359 int c = 0; \
360 while (l->gen_mask) { \
361 if (l->gen_mask & (1 << (gen))) \
362 c++; \
363 l++; \
364 } \
365 if (c) { \
366 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
367 l = (list); \
368 c = 0; \
369 while (p && l->gen_mask) { \
370 if (l->gen_mask & (1 << (gen))) { \
371 drm_property_add_enum(p, c, l->type, l->name); \
372 c++; \
373 } \
374 l++; \
375 } \
376 } \
377} while(0)
378
f62b27db
BS
379int
380nouveau_display_init(struct drm_device *dev)
381{
77145f1c 382 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 383 struct drm_connector *connector;
f62b27db
BS
384 int ret;
385
386 ret = disp->init(dev);
52c4d767
BS
387 if (ret)
388 return ret;
389
7df898b1 390 /* enable polling for external displays */
52c4d767
BS
391 drm_kms_helper_poll_enable(dev);
392
393 /* enable hotplug interrupts */
394 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
395 struct nouveau_connector *conn = nouveau_connector(connector);
51cb4b39 396 if (conn->hpd_func) nouveau_event_get(conn->hpd_func);
f62b27db
BS
397 }
398
399 return ret;
400}
401
402void
403nouveau_display_fini(struct drm_device *dev)
404{
77145f1c 405 struct nouveau_display *disp = nouveau_display(dev);
52c4d767
BS
406 struct drm_connector *connector;
407
408 /* disable hotplug interrupts */
409 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
410 struct nouveau_connector *conn = nouveau_connector(connector);
51cb4b39 411 if (conn->hpd_func) nouveau_event_put(conn->hpd_func);
52c4d767 412 }
f62b27db
BS
413
414 drm_kms_helper_poll_disable(dev);
415 disp->fini(dev);
416}
417
27d5030a
BS
418int
419nouveau_display_create(struct drm_device *dev)
420{
77145f1c 421 struct nouveau_drm *drm = nouveau_drm(dev);
420b9469 422 struct nouveau_device *device = nouveau_dev(dev);
77145f1c 423 struct nouveau_display *disp;
de691855 424 int ret, gen;
27d5030a 425
77145f1c
BS
426 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
427 if (!disp)
428 return -ENOMEM;
429
27d5030a
BS
430 drm_mode_config_init(dev);
431 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 432 drm_mode_create_dvi_i_properties(dev);
de691855 433
77145f1c 434 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
435 gen = 0;
436 else
77145f1c 437 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
438 gen = 1;
439 else
440 gen = 2;
441
442 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
443 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
444 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
445
446 disp->underscan_hborder_property =
d9bc3c02 447 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
448
449 disp->underscan_vborder_property =
d9bc3c02 450 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 451
f9887d09 452 if (gen >= 1) {
03e9a040 453 /* -90..+90 */
df26bc9c 454 disp->vibrant_hue_property =
03e9a040 455 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
df26bc9c 456
03e9a040 457 /* -100..+100 */
df26bc9c 458 disp->color_vibrance_property =
03e9a040 459 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
df26bc9c
CB
460 }
461
e6ecefaa 462 dev->mode_config.funcs = &nouveau_mode_config_funcs;
420b9469 463 dev->mode_config.fb_base = nv_device_resource_start(device, 1);
27d5030a
BS
464
465 dev->mode_config.min_width = 0;
466 dev->mode_config.min_height = 0;
77145f1c 467 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
468 dev->mode_config.max_width = 2048;
469 dev->mode_config.max_height = 2048;
470 } else
77145f1c 471 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
472 dev->mode_config.max_width = 4096;
473 dev->mode_config.max_height = 4096;
474 } else {
475 dev->mode_config.max_width = 8192;
476 dev->mode_config.max_height = 8192;
477 }
478
f1377998
DA
479 dev->mode_config.preferred_depth = 24;
480 dev->mode_config.prefer_shadow = 1;
481
b9d9dcda
BS
482 if (nv_device(drm->device)->chipset < 0x11)
483 dev->mode_config.async_page_flip = false;
484 else
485 dev->mode_config.async_page_flip = true;
486
f62b27db
BS
487 drm_kms_helper_poll_init(dev);
488 drm_kms_helper_poll_disable(dev);
489
fc162088 490 if (drm->vbios.dcb.entries) {
2332b311 491 static const u16 oclass[] = {
0b681687 492 GM107_DISP_CLASS,
2332b311
BS
493 NVF0_DISP_CLASS,
494 NVE0_DISP_CLASS,
495 NVD0_DISP_CLASS,
496 NVA3_DISP_CLASS,
497 NV94_DISP_CLASS,
498 NVA0_DISP_CLASS,
499 NV84_DISP_CLASS,
500 NV50_DISP_CLASS,
501 NV04_DISP_CLASS,
502 };
503 int i;
504
505 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
506 ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE,
507 NVDRM_DISPLAY, oclass[i],
508 NULL, 0, &disp->core);
509 }
510
511 if (ret == 0) {
512 if (nv_mclass(disp->core) < NV50_DISP_CLASS)
513 ret = nv04_display_create(dev);
514 else
515 ret = nv50_display_create(dev);
516 }
fc162088
BS
517 } else {
518 ret = 0;
519 }
9430738d 520
fc162088
BS
521 if (ret)
522 goto disp_create_err;
9430738d 523
fc162088 524 if (dev->mode_config.num_crtc) {
51cb4b39 525 ret = nouveau_display_vblank_init(dev);
fc162088
BS
526 if (ret)
527 goto vblank_err;
f62b27db
BS
528 }
529
fc162088 530 nouveau_backlight_init(dev);
5ace2c9d
MS
531 return 0;
532
533vblank_err:
77145f1c 534 disp->dtor(dev);
5ace2c9d
MS
535disp_create_err:
536 drm_kms_helper_poll_fini(dev);
537 drm_mode_config_cleanup(dev);
2a44e499 538 return ret;
27d5030a
BS
539}
540
541void
542nouveau_display_destroy(struct drm_device *dev)
543{
77145f1c 544 struct nouveau_display *disp = nouveau_display(dev);
2332b311 545 struct nouveau_drm *drm = nouveau_drm(dev);
27d5030a 546
77145f1c 547 nouveau_backlight_exit(dev);
51cb4b39 548 nouveau_display_vblank_fini(dev);
f62b27db 549
d6bf2f37
BS
550 drm_kms_helper_poll_fini(dev);
551 drm_mode_config_cleanup(dev);
552
9430738d
BS
553 if (disp->dtor)
554 disp->dtor(dev);
f62b27db 555
2332b311
BS
556 nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_DISPLAY);
557
77145f1c
BS
558 nouveau_drm(dev)->display = NULL;
559 kfree(disp);
560}
561
562int
563nouveau_display_suspend(struct drm_device *dev)
564{
565 struct nouveau_drm *drm = nouveau_drm(dev);
566 struct drm_crtc *crtc;
567
568 nouveau_display_fini(dev);
569
c52f4fa6 570 NV_INFO(drm, "unpinning framebuffer(s)...\n");
77145f1c
BS
571 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
572 struct nouveau_framebuffer *nouveau_fb;
573
574 nouveau_fb = nouveau_framebuffer(crtc->fb);
575 if (!nouveau_fb || !nouveau_fb->nvbo)
576 continue;
577
578 nouveau_bo_unpin(nouveau_fb->nvbo);
579 }
580
581 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
582 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
583
584 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
585 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
586 }
587
588 return 0;
589}
590
591void
5addcf0a 592nouveau_display_repin(struct drm_device *dev)
77145f1c
BS
593{
594 struct nouveau_drm *drm = nouveau_drm(dev);
595 struct drm_crtc *crtc;
596 int ret;
597
598 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
599 struct nouveau_framebuffer *nouveau_fb;
600
601 nouveau_fb = nouveau_framebuffer(crtc->fb);
602 if (!nouveau_fb || !nouveau_fb->nvbo)
603 continue;
604
605 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
606 }
607
608 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
609 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
610
611 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
612 if (!ret)
613 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
614 if (ret)
615 NV_ERROR(drm, "Could not pin/map cursor.\n");
616 }
5addcf0a 617}
77145f1c 618
5addcf0a
DA
619void
620nouveau_display_resume(struct drm_device *dev)
621{
622 struct drm_crtc *crtc;
77145f1c
BS
623 nouveau_display_init(dev);
624
625 /* Force CLUT to get re-loaded during modeset */
626 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
627 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
628
629 nv_crtc->lut.depth = 0;
630 }
631
632 drm_helper_resume_force_mode(dev);
633
634 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
635 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
636 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
637
638 nv_crtc->cursor.set_offset(nv_crtc, offset);
639 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
640 nv_crtc->cursor_saved_y);
641 }
27d5030a
BS
642}
643
332b242f
FJ
644static int
645nouveau_page_flip_emit(struct nouveau_channel *chan,
646 struct nouveau_bo *old_bo,
647 struct nouveau_bo *new_bo,
648 struct nouveau_page_flip_state *s,
649 struct nouveau_fence **pfence)
650{
f589be88 651 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
652 struct nouveau_drm *drm = chan->drm;
653 struct drm_device *dev = drm->dev;
332b242f
FJ
654 unsigned long flags;
655 int ret;
656
657 /* Queue it to the pending list */
658 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 659 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
660 spin_unlock_irqrestore(&dev->event_lock, flags);
661
662 /* Synchronize with the old framebuffer */
663 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
664 if (ret)
665 goto fail;
666
667 /* Emit the pageflip */
1e303c03 668 ret = RING_SPACE(chan, 2);
332b242f
FJ
669 if (ret)
670 goto fail;
671
1e303c03 672 if (nv_device(drm->device)->card_type < NV_C0)
6d597027 673 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
1e303c03
BS
674 else
675 BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
676 OUT_RING (chan, 0x00000000);
bd2f2037 677 FIRE_RING (chan);
332b242f 678
264ce192 679 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
680 if (ret)
681 goto fail;
682
683 return 0;
684fail:
685 spin_lock_irqsave(&dev->event_lock, flags);
686 list_del(&s->head);
687 spin_unlock_irqrestore(&dev->event_lock, flags);
688 return ret;
689}
690
691int
692nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
b9d9dcda 693 struct drm_pending_vblank_event *event, u32 flags)
332b242f 694{
b9d9dcda 695 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
332b242f 696 struct drm_device *dev = crtc->dev;
77145f1c 697 struct nouveau_drm *drm = nouveau_drm(dev);
332b242f
FJ
698 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
699 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
700 struct nouveau_page_flip_state *s;
eae389f9 701 struct nouveau_channel *chan = drm->channel;
332b242f
FJ
702 struct nouveau_fence *fence;
703 int ret;
704
77145f1c 705 if (!drm->channel)
332b242f
FJ
706 return -ENODEV;
707
708 s = kzalloc(sizeof(*s), GFP_KERNEL);
709 if (!s)
710 return -ENOMEM;
711
d5c1e84b
ML
712 if (new_bo != old_bo) {
713 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
714 if (ret)
715 goto fail_free;
716 }
717
718 mutex_lock(&chan->cli->mutex);
719
eae389f9
BS
720 /* synchronise rendering channel with the kernel's channel */
721 spin_lock(&new_bo->bo.bdev->fence_lock);
722 fence = nouveau_fence_ref(new_bo->bo.sync_obj);
723 spin_unlock(&new_bo->bo.bdev->fence_lock);
724 ret = nouveau_fence_sync(fence, chan);
2fd04c81 725 nouveau_fence_unref(&fence);
eae389f9 726 if (ret)
09c3de13 727 goto fail_unpin;
b580c9e2 728
07ad6ca0 729 ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
060810d7
BS
730 if (ret)
731 goto fail_unpin;
b580c9e2
ML
732
733 /* Initialize a page flip struct */
734 *s = (struct nouveau_page_flip_state)
735 { { }, event, nouveau_crtc(crtc)->index,
736 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
737 new_bo->bo.offset };
738
332b242f 739 /* Emit a page flip */
77145f1c 740 if (nv_device(drm->device)->card_type >= NV_50) {
b9d9dcda 741 ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
060810d7 742 if (ret)
d7117e0d 743 goto fail_unreserve;
78ae0ad4
BS
744 } else {
745 struct nv04_display *dispnv04 = nv04_display(dev);
b9d9dcda
BS
746 int head = nouveau_crtc(crtc)->index;
747
748 if (swap_interval) {
749 ret = RING_SPACE(chan, 8);
750 if (ret)
751 goto fail_unreserve;
752
753 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
754 OUT_RING (chan, 0);
755 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
756 OUT_RING (chan, head);
757 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
758 OUT_RING (chan, 0);
759 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
760 OUT_RING (chan, 0);
761 }
762
763 nouveau_bo_ref(new_bo, &dispnv04->image[head]);
d7117e0d
BS
764 }
765
332b242f 766 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
77145f1c 767 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
768 if (ret)
769 goto fail_unreserve;
770
771 /* Update the crtc struct and cleanup */
772 crtc->fb = fb;
773
07ad6ca0
BS
774 nouveau_bo_fence(old_bo, fence);
775 ttm_bo_unreserve(&old_bo->bo);
060810d7 776 if (old_bo != new_bo)
b580c9e2 777 nouveau_bo_unpin(old_bo);
332b242f
FJ
778 nouveau_fence_unref(&fence);
779 return 0;
780
781fail_unreserve:
07ad6ca0 782 ttm_bo_unreserve(&old_bo->bo);
060810d7
BS
783fail_unpin:
784 mutex_unlock(&chan->cli->mutex);
785 if (old_bo != new_bo)
b580c9e2 786 nouveau_bo_unpin(new_bo);
332b242f
FJ
787fail_free:
788 kfree(s);
789 return ret;
790}
791
792int
793nouveau_finish_page_flip(struct nouveau_channel *chan,
794 struct nouveau_page_flip_state *ps)
795{
f589be88 796 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
797 struct nouveau_drm *drm = chan->drm;
798 struct drm_device *dev = drm->dev;
332b242f
FJ
799 struct nouveau_page_flip_state *s;
800 unsigned long flags;
801
802 spin_lock_irqsave(&dev->event_lock, flags);
803
f589be88 804 if (list_empty(&fctx->flip)) {
77145f1c 805 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
806 spin_unlock_irqrestore(&dev->event_lock, flags);
807 return -EINVAL;
808 }
809
f589be88 810 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
95d38d14 811 if (s->event)
f074d733 812 drm_send_vblank_event(dev, s->crtc, s->event);
332b242f
FJ
813
814 list_del(&s->head);
d7117e0d
BS
815 if (ps)
816 *ps = *s;
332b242f
FJ
817 kfree(s);
818
819 spin_unlock_irqrestore(&dev->event_lock, flags);
820 return 0;
821}
33dbc27f 822
f589be88
BS
823int
824nouveau_flip_complete(void *data)
825{
826 struct nouveau_channel *chan = data;
77145f1c 827 struct nouveau_drm *drm = chan->drm;
f589be88
BS
828 struct nouveau_page_flip_state state;
829
830 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
831 if (nv_device(drm->device)->card_type < NV_50) {
832 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
833 state.y * state.pitch +
834 state.x * state.bpp / 8);
835 }
836 }
837
838 return 0;
839}
840
33dbc27f
BS
841int
842nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
843 struct drm_mode_create_dumb *args)
844{
845 struct nouveau_bo *bo;
846 int ret;
847
848 args->pitch = roundup(args->width * (args->bpp / 8), 256);
849 args->size = args->pitch * args->height;
850 args->size = roundup(args->size, PAGE_SIZE);
851
610bd7da 852 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
853 if (ret)
854 return ret;
855
55fb74ad
DH
856 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
857 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
858 return ret;
859}
860
33dbc27f
BS
861int
862nouveau_display_dumb_map_offset(struct drm_file *file_priv,
863 struct drm_device *dev,
864 uint32_t handle, uint64_t *poffset)
865{
866 struct drm_gem_object *gem;
867
868 gem = drm_gem_object_lookup(dev, file_priv, handle);
869 if (gem) {
55fb74ad 870 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 871 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
872 drm_gem_object_unreference_unlocked(gem);
873 return 0;
874 }
875
876 return -ENOENT;
877}
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