Merge tag 'locks-v3.17-2' of git://git.samba.org/jlayton/linux
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_display.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
fdb751ef
BS
30#include <nvif/class.h>
31
6ee73861 32#include "nouveau_fbcon.h"
1a646342 33#include "dispnv04/hw.h"
332b242f
FJ
34#include "nouveau_crtc.h"
35#include "nouveau_dma.h"
77145f1c 36#include "nouveau_gem.h"
de691855 37#include "nouveau_connector.h"
45c4e0aa 38#include "nv50_display.h"
6ee73861 39
ebb945a9
BS
40#include "nouveau_fence.h"
41
79ca2770 42#include <nvif/event.h>
1d7c71a3 43
51cb4b39 44static int
80bc340b 45nouveau_display_vblank_handler(struct nvif_notify *notify)
51cb4b39 46{
79ca2770
BS
47 struct nouveau_crtc *nv_crtc =
48 container_of(notify, typeof(*nv_crtc), vblank);
b12f0ae9 49 drm_handle_vblank(nv_crtc->base.dev, nv_crtc->index);
80bc340b 50 return NVIF_NOTIFY_KEEP;
51cb4b39
BS
51}
52
53int
54nouveau_display_vblank_enable(struct drm_device *dev, int head)
55{
b12f0ae9
BS
56 struct drm_crtc *crtc;
57 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
58 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
59 if (nv_crtc->index == head) {
80bc340b 60 nvif_notify_get(&nv_crtc->vblank);
b12f0ae9
BS
61 return 0;
62 }
51cb4b39 63 }
b12f0ae9 64 return -EINVAL;
51cb4b39
BS
65}
66
67void
68nouveau_display_vblank_disable(struct drm_device *dev, int head)
69{
b12f0ae9
BS
70 struct drm_crtc *crtc;
71 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
72 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
73 if (nv_crtc->index == head) {
80bc340b 74 nvif_notify_put(&nv_crtc->vblank);
b12f0ae9
BS
75 return;
76 }
77 }
51cb4b39
BS
78}
79
d83ef853
BS
80static inline int
81calc(int blanks, int blanke, int total, int line)
82{
83 if (blanke >= blanks) {
84 if (line >= blanks)
85 line -= total;
86 } else {
87 if (line >= blanks)
88 line -= total;
89 line -= blanke + 1;
90 }
91 return line;
92}
93
94int
95nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
96 ktime_t *stime, ktime_t *etime)
97{
4952b4d3
BS
98 struct {
99 struct nv04_disp_mthd_v0 base;
100 struct nv04_disp_scanoutpos_v0 scan;
101 } args = {
102 .base.method = NV04_DISP_SCANOUTPOS,
103 .base.head = nouveau_crtc(crtc)->index,
104 };
d83ef853 105 struct nouveau_display *disp = nouveau_display(crtc->dev);
d83ef853
BS
106 int ret, retry = 1;
107
108 do {
4952b4d3 109 ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args));
d83ef853
BS
110 if (ret != 0)
111 return 0;
112
4952b4d3 113 if (args.scan.vline) {
d83ef853
BS
114 ret |= DRM_SCANOUTPOS_ACCURATE;
115 ret |= DRM_SCANOUTPOS_VALID;
116 break;
117 }
118
119 if (retry) ndelay(crtc->linedur_ns);
120 } while (retry--);
121
4952b4d3
BS
122 *hpos = args.scan.hline;
123 *vpos = calc(args.scan.vblanks, args.scan.vblanke,
124 args.scan.vtotal, args.scan.vline);
125 if (stime) *stime = ns_to_ktime(args.scan.time[0]);
126 if (etime) *etime = ns_to_ktime(args.scan.time[1]);
d83ef853
BS
127
128 if (*vpos < 0)
129 ret |= DRM_SCANOUTPOS_INVBL;
130 return ret;
131}
132
133int
134nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
135 int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
136{
137 struct drm_crtc *crtc;
138
139 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
140 if (nouveau_crtc(crtc)->index == head) {
141 return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
142 stime, etime);
143 }
144 }
145
146 return 0;
147}
148
149int
150nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
151 struct timeval *time, unsigned flags)
152{
153 struct drm_crtc *crtc;
154
155 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
156 if (nouveau_crtc(crtc)->index == head) {
157 return drm_calc_vbltimestamp_from_scanoutpos(dev,
158 head, max_error, time, flags, crtc,
159 &crtc->hwmode);
160 }
161 }
162
163 return -EINVAL;
164}
165
51cb4b39
BS
166static void
167nouveau_display_vblank_fini(struct drm_device *dev)
168{
b12f0ae9 169 struct drm_crtc *crtc;
51cb4b39 170
1139ffb9
BS
171 drm_vblank_cleanup(dev);
172
b12f0ae9
BS
173 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
174 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
80bc340b 175 nvif_notify_fini(&nv_crtc->vblank);
51cb4b39 176 }
51cb4b39
BS
177}
178
179static int
180nouveau_display_vblank_init(struct drm_device *dev)
181{
80bc340b 182 struct nouveau_display *disp = nouveau_display(dev);
b12f0ae9
BS
183 struct drm_crtc *crtc;
184 int ret;
51cb4b39 185
b12f0ae9
BS
186 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
187 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
80bc340b 188 ret = nvif_notify_init(&disp->disp, NULL,
79ca2770 189 nouveau_display_vblank_handler, false,
80bc340b 190 NV04_DISP_NTFY_VBLANK,
79ca2770
BS
191 &(struct nvif_notify_head_req_v0) {
192 .head = nv_crtc->index,
193 },
194 sizeof(struct nvif_notify_head_req_v0),
195 sizeof(struct nvif_notify_head_rep_v0),
196 &nv_crtc->vblank);
51cb4b39
BS
197 if (ret) {
198 nouveau_display_vblank_fini(dev);
199 return ret;
200 }
201 }
202
203 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
204 if (ret) {
205 nouveau_display_vblank_fini(dev);
206 return ret;
207 }
208
209 return 0;
210}
211
6ee73861
BS
212static void
213nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
214{
215 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
ab0af559
BS
216 struct nouveau_display *disp = nouveau_display(drm_fb->dev);
217
218 if (disp->fb_dtor)
219 disp->fb_dtor(drm_fb);
6ee73861 220
bc9025bd 221 if (fb->nvbo)
55fb74ad 222 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
223
224 drm_framebuffer_cleanup(drm_fb);
225 kfree(fb);
226}
227
228static int
229nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
230 struct drm_file *file_priv,
231 unsigned int *handle)
232{
233 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
234
55fb74ad 235 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
236}
237
238static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
239 .destroy = nouveau_user_framebuffer_destroy,
240 .create_handle = nouveau_user_framebuffer_create_handle,
241};
242
38651674 243int
45c4e0aa
BS
244nouveau_framebuffer_init(struct drm_device *dev,
245 struct nouveau_framebuffer *nv_fb,
308e5bcb 246 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 247 struct nouveau_bo *nvbo)
6ee73861 248{
ab0af559 249 struct nouveau_display *disp = nouveau_display(dev);
45c4e0aa 250 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
251 int ret;
252
45c4e0aa
BS
253 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
254 nv_fb->nvbo = nvbo;
255
c7d73f6a 256 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
ab0af559 257 if (ret)
c7d73f6a 258 return ret;
ab0af559
BS
259
260 if (disp->fb_ctor) {
261 ret = disp->fb_ctor(fb);
262 if (ret)
263 disp->fb_dtor(fb);
c7d73f6a
DV
264 }
265
ab0af559 266 return ret;
6ee73861
BS
267}
268
269static struct drm_framebuffer *
270nouveau_user_framebuffer_create(struct drm_device *dev,
271 struct drm_file *file_priv,
308e5bcb 272 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 273{
38651674 274 struct nouveau_framebuffer *nouveau_fb;
6ee73861 275 struct drm_gem_object *gem;
fdfb8332 276 int ret = -ENOMEM;
6ee73861 277
308e5bcb 278 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 279 if (!gem)
cce13ff7 280 return ERR_PTR(-ENOENT);
6ee73861 281
38651674
DA
282 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
283 if (!nouveau_fb)
fdfb8332 284 goto err_unref;
38651674
DA
285
286 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
fdfb8332
ML
287 if (ret)
288 goto err;
6ee73861 289
38651674 290 return &nouveau_fb->base;
fdfb8332
ML
291
292err:
293 kfree(nouveau_fb);
294err_unref:
295 drm_gem_object_unreference(gem);
296 return ERR_PTR(ret);
6ee73861
BS
297}
298
27d5030a 299static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 300 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 301 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
302};
303
b29caa58 304
4a67d391 305struct nouveau_drm_prop_enum_list {
de691855 306 u8 gen_mask;
b29caa58
BS
307 int type;
308 char *name;
309};
310
4a67d391 311static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
312 { 6, UNDERSCAN_AUTO, "auto" },
313 { 6, UNDERSCAN_OFF, "off" },
314 { 6, UNDERSCAN_ON, "on" },
de691855 315 {}
b29caa58
BS
316};
317
4a67d391 318static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
319 { 7, DITHERING_MODE_AUTO, "auto" },
320 { 7, DITHERING_MODE_OFF, "off" },
321 { 1, DITHERING_MODE_ON, "on" },
322 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
323 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
324 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
325 {}
326};
327
4a67d391 328static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
329 { 6, DITHERING_DEPTH_AUTO, "auto" },
330 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
331 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
332 {}
333};
334
335#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 336 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
337 int c = 0; \
338 while (l->gen_mask) { \
339 if (l->gen_mask & (1 << (gen))) \
340 c++; \
341 l++; \
342 } \
343 if (c) { \
344 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
345 l = (list); \
346 c = 0; \
347 while (p && l->gen_mask) { \
348 if (l->gen_mask & (1 << (gen))) { \
349 drm_property_add_enum(p, c, l->type, l->name); \
350 c++; \
351 } \
352 l++; \
353 } \
354 } \
355} while(0)
356
f62b27db
BS
357int
358nouveau_display_init(struct drm_device *dev)
359{
77145f1c 360 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 361 struct drm_connector *connector;
f62b27db
BS
362 int ret;
363
364 ret = disp->init(dev);
52c4d767
BS
365 if (ret)
366 return ret;
367
7df898b1 368 /* enable polling for external displays */
52c4d767
BS
369 drm_kms_helper_poll_enable(dev);
370
371 /* enable hotplug interrupts */
372 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
373 struct nouveau_connector *conn = nouveau_connector(connector);
80bc340b 374 nvif_notify_get(&conn->hpd);
f62b27db
BS
375 }
376
377 return ret;
378}
379
380void
381nouveau_display_fini(struct drm_device *dev)
382{
77145f1c 383 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 384 struct drm_connector *connector;
9cba5efa
MK
385 int head;
386
387 /* Make sure that drm and hw vblank irqs get properly disabled. */
388 for (head = 0; head < dev->mode_config.num_crtc; head++)
389 drm_vblank_off(dev, head);
52c4d767
BS
390
391 /* disable hotplug interrupts */
392 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
393 struct nouveau_connector *conn = nouveau_connector(connector);
80bc340b 394 nvif_notify_put(&conn->hpd);
52c4d767 395 }
f62b27db
BS
396
397 drm_kms_helper_poll_disable(dev);
398 disp->fini(dev);
399}
400
9c210f37
BS
401static void
402nouveau_display_create_properties(struct drm_device *dev)
27d5030a 403{
9c210f37
BS
404 struct nouveau_display *disp = nouveau_display(dev);
405 int gen;
de691855 406
648d4dfd 407 if (disp->disp.oclass < NV50_DISP)
de691855
BS
408 gen = 0;
409 else
648d4dfd 410 if (disp->disp.oclass < GF110_DISP)
de691855
BS
411 gen = 1;
412 else
413 gen = 2;
414
415 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
416 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
417 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
418
419 disp->underscan_hborder_property =
d9bc3c02 420 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
421
422 disp->underscan_vborder_property =
d9bc3c02 423 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 424
9c210f37
BS
425 if (gen < 1)
426 return;
df26bc9c 427
9c210f37
BS
428 /* -90..+90 */
429 disp->vibrant_hue_property =
430 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
431
432 /* -100..+100 */
433 disp->color_vibrance_property =
434 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
435}
436
437int
438nouveau_display_create(struct drm_device *dev)
439{
440 struct nouveau_drm *drm = nouveau_drm(dev);
9c210f37
BS
441 struct nouveau_display *disp;
442 int ret;
443
444 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
445 if (!disp)
446 return -ENOMEM;
447
448 drm_mode_config_init(dev);
449 drm_mode_create_scaling_mode_property(dev);
450 drm_mode_create_dvi_i_properties(dev);
df26bc9c 451
e6ecefaa 452 dev->mode_config.funcs = &nouveau_mode_config_funcs;
967e7bde 453 dev->mode_config.fb_base = nv_device_resource_start(nvkm_device(&drm->device), 1);
27d5030a
BS
454
455 dev->mode_config.min_width = 0;
456 dev->mode_config.min_height = 0;
967e7bde 457 if (drm->device.info.family < NV_DEVICE_INFO_V0_CELSIUS) {
27d5030a
BS
458 dev->mode_config.max_width = 2048;
459 dev->mode_config.max_height = 2048;
460 } else
967e7bde 461 if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
27d5030a
BS
462 dev->mode_config.max_width = 4096;
463 dev->mode_config.max_height = 4096;
464 } else {
465 dev->mode_config.max_width = 8192;
466 dev->mode_config.max_height = 8192;
467 }
468
f1377998
DA
469 dev->mode_config.preferred_depth = 24;
470 dev->mode_config.prefer_shadow = 1;
471
967e7bde 472 if (drm->device.info.chipset < 0x11)
b9d9dcda
BS
473 dev->mode_config.async_page_flip = false;
474 else
475 dev->mode_config.async_page_flip = true;
476
f62b27db
BS
477 drm_kms_helper_poll_init(dev);
478 drm_kms_helper_poll_disable(dev);
479
771fa0e4 480 if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
2332b311 481 static const u16 oclass[] = {
648d4dfd
BS
482 GM107_DISP,
483 GK110_DISP,
484 GK104_DISP,
485 GF110_DISP,
486 GT214_DISP,
487 GT206_DISP,
488 GT200_DISP,
489 G82_DISP,
490 NV50_DISP,
491 NV04_DISP,
2332b311
BS
492 };
493 int i;
494
495 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
0ad72863
BS
496 ret = nvif_object_init(nvif_object(&drm->device), NULL,
497 NVDRM_DISPLAY, oclass[i],
498 NULL, 0, &disp->disp);
2332b311
BS
499 }
500
501 if (ret == 0) {
9c210f37 502 nouveau_display_create_properties(dev);
648d4dfd 503 if (disp->disp.oclass < NV50_DISP)
2332b311
BS
504 ret = nv04_display_create(dev);
505 else
506 ret = nv50_display_create(dev);
507 }
fc162088
BS
508 } else {
509 ret = 0;
510 }
9430738d 511
fc162088
BS
512 if (ret)
513 goto disp_create_err;
9430738d 514
fc162088 515 if (dev->mode_config.num_crtc) {
51cb4b39 516 ret = nouveau_display_vblank_init(dev);
fc162088
BS
517 if (ret)
518 goto vblank_err;
f62b27db
BS
519 }
520
fc162088 521 nouveau_backlight_init(dev);
5ace2c9d
MS
522 return 0;
523
524vblank_err:
77145f1c 525 disp->dtor(dev);
5ace2c9d
MS
526disp_create_err:
527 drm_kms_helper_poll_fini(dev);
528 drm_mode_config_cleanup(dev);
2a44e499 529 return ret;
27d5030a
BS
530}
531
532void
533nouveau_display_destroy(struct drm_device *dev)
534{
77145f1c 535 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 536
77145f1c 537 nouveau_backlight_exit(dev);
51cb4b39 538 nouveau_display_vblank_fini(dev);
f62b27db 539
d6bf2f37
BS
540 drm_kms_helper_poll_fini(dev);
541 drm_mode_config_cleanup(dev);
542
9430738d
BS
543 if (disp->dtor)
544 disp->dtor(dev);
f62b27db 545
0ad72863 546 nvif_object_fini(&disp->disp);
2332b311 547
77145f1c
BS
548 nouveau_drm(dev)->display = NULL;
549 kfree(disp);
550}
551
552int
553nouveau_display_suspend(struct drm_device *dev)
554{
555 struct nouveau_drm *drm = nouveau_drm(dev);
556 struct drm_crtc *crtc;
557
558 nouveau_display_fini(dev);
559
c52f4fa6 560 NV_INFO(drm, "unpinning framebuffer(s)...\n");
77145f1c
BS
561 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
562 struct nouveau_framebuffer *nouveau_fb;
563
f4510a27 564 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
565 if (!nouveau_fb || !nouveau_fb->nvbo)
566 continue;
567
568 nouveau_bo_unpin(nouveau_fb->nvbo);
569 }
570
571 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
572 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
573
574 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
575 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
576 }
577
578 return 0;
579}
580
581void
5addcf0a 582nouveau_display_repin(struct drm_device *dev)
77145f1c
BS
583{
584 struct nouveau_drm *drm = nouveau_drm(dev);
585 struct drm_crtc *crtc;
586 int ret;
587
588 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
589 struct nouveau_framebuffer *nouveau_fb;
590
f4510a27 591 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
592 if (!nouveau_fb || !nouveau_fb->nvbo)
593 continue;
594
c9a6fd97
BS
595 ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
596 if (ret)
597 NV_ERROR(drm, "Could not pin framebuffer\n");
77145f1c
BS
598 }
599
600 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
601 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
602
603 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
604 if (!ret)
605 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
606 if (ret)
607 NV_ERROR(drm, "Could not pin/map cursor.\n");
608 }
5addcf0a 609}
77145f1c 610
5addcf0a
DA
611void
612nouveau_display_resume(struct drm_device *dev)
613{
614 struct drm_crtc *crtc;
9cba5efa
MK
615 int head;
616
77145f1c
BS
617 nouveau_display_init(dev);
618
619 /* Force CLUT to get re-loaded during modeset */
620 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
621 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
622
623 nv_crtc->lut.depth = 0;
624 }
625
9cba5efa
MK
626 /* Make sure that drm and hw vblank irqs get resumed if needed. */
627 for (head = 0; head < dev->mode_config.num_crtc; head++)
628 drm_vblank_on(dev, head);
629
77145f1c
BS
630 drm_helper_resume_force_mode(dev);
631
632 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
633 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
634 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
635
636 nv_crtc->cursor.set_offset(nv_crtc, offset);
637 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
638 nv_crtc->cursor_saved_y);
639 }
27d5030a
BS
640}
641
332b242f
FJ
642static int
643nouveau_page_flip_emit(struct nouveau_channel *chan,
644 struct nouveau_bo *old_bo,
645 struct nouveau_bo *new_bo,
646 struct nouveau_page_flip_state *s,
647 struct nouveau_fence **pfence)
648{
f589be88 649 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
650 struct nouveau_drm *drm = chan->drm;
651 struct drm_device *dev = drm->dev;
332b242f
FJ
652 unsigned long flags;
653 int ret;
654
655 /* Queue it to the pending list */
656 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 657 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
658 spin_unlock_irqrestore(&dev->event_lock, flags);
659
660 /* Synchronize with the old framebuffer */
661 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
662 if (ret)
663 goto fail;
664
665 /* Emit the pageflip */
1e303c03 666 ret = RING_SPACE(chan, 2);
332b242f
FJ
667 if (ret)
668 goto fail;
669
967e7bde 670 if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI)
6d597027 671 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
1e303c03
BS
672 else
673 BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
674 OUT_RING (chan, 0x00000000);
bd2f2037 675 FIRE_RING (chan);
332b242f 676
264ce192 677 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
678 if (ret)
679 goto fail;
680
681 return 0;
682fail:
683 spin_lock_irqsave(&dev->event_lock, flags);
684 list_del(&s->head);
685 spin_unlock_irqrestore(&dev->event_lock, flags);
686 return ret;
687}
688
689int
690nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
b9d9dcda 691 struct drm_pending_vblank_event *event, u32 flags)
332b242f 692{
b9d9dcda 693 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
332b242f 694 struct drm_device *dev = crtc->dev;
77145f1c 695 struct nouveau_drm *drm = nouveau_drm(dev);
f4510a27 696 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
332b242f
FJ
697 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
698 struct nouveau_page_flip_state *s;
0ad72863
BS
699 struct nouveau_channel *chan;
700 struct nouveau_cli *cli;
332b242f
FJ
701 struct nouveau_fence *fence;
702 int ret;
703
0ad72863
BS
704 chan = drm->channel;
705 if (!chan)
332b242f 706 return -ENODEV;
0ad72863 707 cli = (void *)nvif_client(&chan->device->base);
332b242f
FJ
708
709 s = kzalloc(sizeof(*s), GFP_KERNEL);
710 if (!s)
711 return -ENOMEM;
712
d5c1e84b
ML
713 if (new_bo != old_bo) {
714 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
715 if (ret)
716 goto fail_free;
717 }
718
0ad72863 719 mutex_lock(&cli->mutex);
d5c1e84b 720
eae389f9
BS
721 /* synchronise rendering channel with the kernel's channel */
722 spin_lock(&new_bo->bo.bdev->fence_lock);
723 fence = nouveau_fence_ref(new_bo->bo.sync_obj);
724 spin_unlock(&new_bo->bo.bdev->fence_lock);
725 ret = nouveau_fence_sync(fence, chan);
2fd04c81 726 nouveau_fence_unref(&fence);
eae389f9 727 if (ret)
09c3de13 728 goto fail_unpin;
b580c9e2 729
07ad6ca0 730 ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
060810d7
BS
731 if (ret)
732 goto fail_unpin;
b580c9e2
ML
733
734 /* Initialize a page flip struct */
735 *s = (struct nouveau_page_flip_state)
736 { { }, event, nouveau_crtc(crtc)->index,
737 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
738 new_bo->bo.offset };
739
ba124a41
MK
740 /* Keep vblanks on during flip, for the target crtc of this flip */
741 drm_vblank_get(dev, nouveau_crtc(crtc)->index);
742
332b242f 743 /* Emit a page flip */
967e7bde 744 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
b9d9dcda 745 ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
060810d7 746 if (ret)
d7117e0d 747 goto fail_unreserve;
78ae0ad4
BS
748 } else {
749 struct nv04_display *dispnv04 = nv04_display(dev);
b9d9dcda
BS
750 int head = nouveau_crtc(crtc)->index;
751
752 if (swap_interval) {
753 ret = RING_SPACE(chan, 8);
754 if (ret)
755 goto fail_unreserve;
756
757 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
758 OUT_RING (chan, 0);
759 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
760 OUT_RING (chan, head);
761 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
762 OUT_RING (chan, 0);
763 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
764 OUT_RING (chan, 0);
765 }
766
767 nouveau_bo_ref(new_bo, &dispnv04->image[head]);
d7117e0d
BS
768 }
769
332b242f 770 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
332b242f
FJ
771 if (ret)
772 goto fail_unreserve;
0ad72863 773 mutex_unlock(&cli->mutex);
332b242f
FJ
774
775 /* Update the crtc struct and cleanup */
f4510a27 776 crtc->primary->fb = fb;
332b242f 777
07ad6ca0
BS
778 nouveau_bo_fence(old_bo, fence);
779 ttm_bo_unreserve(&old_bo->bo);
060810d7 780 if (old_bo != new_bo)
b580c9e2 781 nouveau_bo_unpin(old_bo);
332b242f
FJ
782 nouveau_fence_unref(&fence);
783 return 0;
784
785fail_unreserve:
ba124a41 786 drm_vblank_put(dev, nouveau_crtc(crtc)->index);
07ad6ca0 787 ttm_bo_unreserve(&old_bo->bo);
060810d7 788fail_unpin:
0ad72863 789 mutex_unlock(&cli->mutex);
060810d7 790 if (old_bo != new_bo)
b580c9e2 791 nouveau_bo_unpin(new_bo);
332b242f
FJ
792fail_free:
793 kfree(s);
794 return ret;
795}
796
797int
798nouveau_finish_page_flip(struct nouveau_channel *chan,
799 struct nouveau_page_flip_state *ps)
800{
f589be88 801 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
802 struct nouveau_drm *drm = chan->drm;
803 struct drm_device *dev = drm->dev;
332b242f
FJ
804 struct nouveau_page_flip_state *s;
805 unsigned long flags;
af4870e4 806 int crtcid = -1;
332b242f
FJ
807
808 spin_lock_irqsave(&dev->event_lock, flags);
809
f589be88 810 if (list_empty(&fctx->flip)) {
77145f1c 811 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
812 spin_unlock_irqrestore(&dev->event_lock, flags);
813 return -EINVAL;
814 }
815
f589be88 816 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
af4870e4
MK
817 if (s->event) {
818 /* Vblank timestamps/counts are only correct on >= NV-50 */
967e7bde 819 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA)
af4870e4
MK
820 crtcid = s->crtc;
821
822 drm_send_vblank_event(dev, crtcid, s->event);
823 }
332b242f 824
ba124a41
MK
825 /* Give up ownership of vblank for page-flipped crtc */
826 drm_vblank_put(dev, s->crtc);
827
332b242f 828 list_del(&s->head);
d7117e0d
BS
829 if (ps)
830 *ps = *s;
332b242f
FJ
831 kfree(s);
832
833 spin_unlock_irqrestore(&dev->event_lock, flags);
834 return 0;
835}
33dbc27f 836
f589be88
BS
837int
838nouveau_flip_complete(void *data)
839{
840 struct nouveau_channel *chan = data;
77145f1c 841 struct nouveau_drm *drm = chan->drm;
f589be88
BS
842 struct nouveau_page_flip_state state;
843
844 if (!nouveau_finish_page_flip(chan, &state)) {
967e7bde 845 if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
77145f1c 846 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
847 state.y * state.pitch +
848 state.x * state.bpp / 8);
849 }
850 }
851
852 return 0;
853}
854
33dbc27f
BS
855int
856nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
857 struct drm_mode_create_dumb *args)
858{
859 struct nouveau_bo *bo;
860 int ret;
861
862 args->pitch = roundup(args->width * (args->bpp / 8), 256);
863 args->size = args->pitch * args->height;
864 args->size = roundup(args->size, PAGE_SIZE);
865
610bd7da 866 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
867 if (ret)
868 return ret;
869
55fb74ad
DH
870 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
871 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
872 return ret;
873}
874
33dbc27f
BS
875int
876nouveau_display_dumb_map_offset(struct drm_file *file_priv,
877 struct drm_device *dev,
878 uint32_t handle, uint64_t *poffset)
879{
880 struct drm_gem_object *gem;
881
882 gem = drm_gem_object_lookup(dev, file_priv, handle);
883 if (gem) {
55fb74ad 884 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 885 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
886 drm_gem_object_unreference_unlocked(gem);
887 return 0;
888 }
889
890 return -ENOENT;
891}
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