[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_display.c

/*
 * Copyright (C) 2008 Maarten Maathuis.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include "drmP.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nouveau_hw.h"
#include "nouveau_crtc.h"
#include "nouveau_dma.h"
#include "nouveau_connector.h"
#include "nv50_display.h"

#include "nouveau_fence.h"

#include <subdev/bios/gpio.h>

static void
nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
{
	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);

	if (fb->nvbo)
		drm_gem_object_unreference_unlocked(fb->nvbo->gem);

	drm_framebuffer_cleanup(drm_fb);
	kfree(fb);
}

static int
nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
				       struct drm_file *file_priv,
				       unsigned int *handle)
{
	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);

	return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
}

static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
	.destroy = nouveau_user_framebuffer_destroy,
	.create_handle = nouveau_user_framebuffer_create_handle,
};

int
nouveau_framebuffer_init(struct drm_device *dev,
			 struct nouveau_framebuffer *nv_fb,
			 struct drm_mode_fb_cmd2 *mode_cmd,
			 struct nouveau_bo *nvbo)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct drm_framebuffer *fb = &nv_fb->base;
	int ret;

	ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
	if (ret) {
		return ret;
	}

	drm_helper_mode_fill_fb_struct(fb, mode_cmd);
	nv_fb->nvbo = nvbo;

	if (dev_priv->card_type >= NV_50) {
		u32 tile_flags = nouveau_bo_tile_layout(nvbo);
		if (tile_flags == 0x7a00 ||
		    tile_flags == 0xfe00)
			nv_fb->r_dma = NvEvoFB32;
		else
		if (tile_flags == 0x7000)
			nv_fb->r_dma = NvEvoFB16;
		else
			nv_fb->r_dma = NvEvoVRAM_LP;

		switch (fb->depth) {
		case  8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
		case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
		case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
		case 24:
		case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
		case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
		default:
			 NV_ERROR(dev, "unknown depth %d\n", fb->depth);
			 return -EINVAL;
		}

		if (dev_priv->chipset == 0x50)
			nv_fb->r_format |= (tile_flags << 8);

		if (!tile_flags) {
			if (dev_priv->card_type < NV_D0)
				nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
			else
				nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
		} else {
			u32 mode = nvbo->tile_mode;
			if (dev_priv->card_type >= NV_C0)
				mode >>= 4;
			nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
		}
	}

	return 0;
}

static struct drm_framebuffer *
nouveau_user_framebuffer_create(struct drm_device *dev,
				struct drm_file *file_priv,
				struct drm_mode_fb_cmd2 *mode_cmd)
{
	struct nouveau_framebuffer *nouveau_fb;
	struct drm_gem_object *gem;
	int ret;

	gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
	if (!gem)
		return ERR_PTR(-ENOENT);

	nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
	if (!nouveau_fb)
		return ERR_PTR(-ENOMEM);

	ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
	if (ret) {
		drm_gem_object_unreference(gem);
		return ERR_PTR(ret);
	}

	return &nouveau_fb->base;
}

static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
	.fb_create = nouveau_user_framebuffer_create,
	.output_poll_changed = nouveau_fbcon_output_poll_changed,
};


struct nouveau_drm_prop_enum_list {
	u8 gen_mask;
	int type;
	char *name;
};

static struct nouveau_drm_prop_enum_list underscan[] = {
	{ 6, UNDERSCAN_AUTO, "auto" },
	{ 6, UNDERSCAN_OFF, "off" },
	{ 6, UNDERSCAN_ON, "on" },
	{}
};

static struct nouveau_drm_prop_enum_list dither_mode[] = {
	{ 7, DITHERING_MODE_AUTO, "auto" },
	{ 7, DITHERING_MODE_OFF, "off" },
	{ 1, DITHERING_MODE_ON, "on" },
	{ 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
	{ 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
	{ 4, DITHERING_MODE_TEMPORAL, "temporal" },
	{}
};

static struct nouveau_drm_prop_enum_list dither_depth[] = {
	{ 6, DITHERING_DEPTH_AUTO, "auto" },
	{ 6, DITHERING_DEPTH_6BPC, "6 bpc" },
	{ 6, DITHERING_DEPTH_8BPC, "8 bpc" },
	{}
};

#define PROP_ENUM(p,gen,n,list) do {                                           \
	struct nouveau_drm_prop_enum_list *l = (list);                         \
	int c = 0;                                                             \
	while (l->gen_mask) {                                                  \
		if (l->gen_mask & (1 << (gen)))                                \
			c++;                                                   \
		l++;                                                           \
	}                                                                      \
	if (c) {                                                               \
		p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c);        \
		l = (list);                                                    \
		c = 0;                                                         \
		while (p && l->gen_mask) {                                     \
			if (l->gen_mask & (1 << (gen))) {                      \
				drm_property_add_enum(p, c, l->type, l->name); \
				c++;                                           \
			}                                                      \
			l++;                                                   \
		}                                                              \
	}                                                                      \
} while(0)

int
nouveau_display_init(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	struct drm_connector *connector;
	int ret;

	ret = disp->init(dev);
	if (ret)
		return ret;

	/* power on internal panel if it's not already.  the init tables of
	 * some vbios default this to off for some reason, causing the
	 * panel to not work after resume
	 */
	if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) {
		nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true);
		msleep(300);
	}

	/* enable polling for external displays */
	drm_kms_helper_poll_enable(dev);

	/* enable hotplug interrupts */
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		struct nouveau_connector *conn = nouveau_connector(connector);
		nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, true);
	}

	return ret;
}

void
nouveau_display_fini(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	struct drm_connector *connector;

	/* disable hotplug interrupts */
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		struct nouveau_connector *conn = nouveau_connector(connector);
		nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, false);
	}

	drm_kms_helper_poll_disable(dev);
	disp->fini(dev);
}

static void
nouveau_display_vblank_notify(void *data, int crtc)
{
	drm_handle_vblank(data, crtc);
}

static void
nouveau_display_vblank_get(void *data, int crtc)
{
	drm_vblank_get(data, crtc);
}

static void
nouveau_display_vblank_put(void *data, int crtc)
{
	drm_vblank_put(data, crtc);
}

int
nouveau_display_create(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	int ret, gen;

	drm_mode_config_init(dev);
	drm_mode_create_scaling_mode_property(dev);
	drm_mode_create_dvi_i_properties(dev);

	if (dev_priv->card_type < NV_50)
		gen = 0;
	else
	if (dev_priv->card_type < NV_D0)
		gen = 1;
	else
		gen = 2;

	PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
	PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
	PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);

	disp->underscan_hborder_property =
		drm_property_create_range(dev, 0, "underscan hborder", 0, 128);

	disp->underscan_vborder_property =
		drm_property_create_range(dev, 0, "underscan vborder", 0, 128);

	if (gen == 1) {
		disp->vibrant_hue_property =
			drm_property_create(dev, DRM_MODE_PROP_RANGE,
					    "vibrant hue", 2);
		disp->vibrant_hue_property->values[0] = 0;
		disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */

		disp->color_vibrance_property =
			drm_property_create(dev, DRM_MODE_PROP_RANGE,
					    "color vibrance", 2);
		disp->color_vibrance_property->values[0] = 0;
		disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
	}

	dev->mode_config.funcs = &nouveau_mode_config_funcs;
	dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);

	dev->mode_config.min_width = 0;
	dev->mode_config.min_height = 0;
	if (dev_priv->card_type < NV_10) {
		dev->mode_config.max_width = 2048;
		dev->mode_config.max_height = 2048;
	} else
	if (dev_priv->card_type < NV_50) {
		dev->mode_config.max_width = 4096;
		dev->mode_config.max_height = 4096;
	} else {
		dev->mode_config.max_width = 8192;
		dev->mode_config.max_height = 8192;
	}

	dev->mode_config.preferred_depth = 24;
	dev->mode_config.prefer_shadow = 1;

	drm_kms_helper_poll_init(dev);
	drm_kms_helper_poll_disable(dev);

	ret = disp->create(dev);
	if (ret)
		goto disp_create_err;

	if (dev->mode_config.num_crtc) {
		ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
		if (ret)
			goto vblank_err;
	}

	return 0;

vblank_err:
	disp->destroy(dev);
disp_create_err:
	drm_kms_helper_poll_fini(dev);
	drm_mode_config_cleanup(dev);
	return ret;
}

void
nouveau_display_destroy(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_display_engine *disp = &dev_priv->engine.display;

	drm_vblank_cleanup(dev);

	disp->destroy(dev);

	drm_kms_helper_poll_fini(dev);
	drm_mode_config_cleanup(dev);
}

int
nouveau_vblank_enable(struct drm_device *dev, int crtc)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;

	if (dev_priv->card_type >= NV_D0)
		nv_mask(dev, 0x6100c0 + (crtc * 0x800), 1, 1);
	else

	if (dev_priv->card_type >= NV_50)
		nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
			NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
	else
		NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
			    NV_PCRTC_INTR_0_VBLANK);

	return 0;
}

void
nouveau_vblank_disable(struct drm_device *dev, int crtc)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;

	if (dev_priv->card_type >= NV_D0)
		nv_mask(dev, 0x6100c0 + (crtc * 0x800), 1, 0);
	else
	if (dev_priv->card_type >= NV_50)
		nv_mask(dev, NV50_PDISPLAY_INTR_EN_1,
			NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
	else
		NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
}

static int
nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
			  struct nouveau_bo *new_bo)
{
	int ret;

	ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
	if (ret)
		return ret;

	ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
	if (ret)
		goto fail;

	ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
	if (ret)
		goto fail_unreserve;

	return 0;

fail_unreserve:
	ttm_bo_unreserve(&new_bo->bo);
fail:
	nouveau_bo_unpin(new_bo);
	return ret;
}

static void
nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
			    struct nouveau_bo *new_bo,
			    struct nouveau_fence *fence)
{
	nouveau_bo_fence(new_bo, fence);
	ttm_bo_unreserve(&new_bo->bo);

	nouveau_bo_fence(old_bo, fence);
	ttm_bo_unreserve(&old_bo->bo);

	nouveau_bo_unpin(old_bo);
}

static int
nouveau_page_flip_emit(struct nouveau_channel *chan,
		       struct nouveau_bo *old_bo,
		       struct nouveau_bo *new_bo,
		       struct nouveau_page_flip_state *s,
		       struct nouveau_fence **pfence)
{
	struct nouveau_fence_chan *fctx = chan->fence;
	struct drm_device *dev = nouveau_drv(chan->drm);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	unsigned long flags;
	int ret;

	/* Queue it to the pending list */
	spin_lock_irqsave(&dev->event_lock, flags);
	list_add_tail(&s->head, &fctx->flip);
	spin_unlock_irqrestore(&dev->event_lock, flags);

	/* Synchronize with the old framebuffer */
	ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
	if (ret)
		goto fail;

	/* Emit the pageflip */
	ret = RING_SPACE(chan, 3);
	if (ret)
		goto fail;

	if (dev_priv->card_type < NV_C0) {
		BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
		OUT_RING  (chan, 0x00000000);
		OUT_RING  (chan, 0x00000000);
	} else {
		BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
		OUT_RING  (chan, 0);
		BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
	}
	FIRE_RING (chan);

	ret = nouveau_fence_new(chan, pfence);
	if (ret)
		goto fail;

	return 0;
fail:
	spin_lock_irqsave(&dev->event_lock, flags);
	list_del(&s->head);
	spin_unlock_irqrestore(&dev->event_lock, flags);
	return ret;
}

int
nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
		       struct drm_pending_vblank_event *event)
{
	struct drm_device *dev = crtc->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
	struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
	struct nouveau_page_flip_state *s;
	struct nouveau_channel *chan = NULL;
	struct nouveau_fence *fence;
	int ret;

	if (!nvdrm_channel(dev))
		return -ENODEV;

	s = kzalloc(sizeof(*s), GFP_KERNEL);
	if (!s)
		return -ENOMEM;

	/* Don't let the buffers go away while we flip */
	ret = nouveau_page_flip_reserve(old_bo, new_bo);
	if (ret)
		goto fail_free;

	/* Initialize a page flip struct */
	*s = (struct nouveau_page_flip_state)
		{ { }, event, nouveau_crtc(crtc)->index,
		  fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
		  new_bo->bo.offset };

	/* Choose the channel the flip will be handled in */
	fence = new_bo->bo.sync_obj;
	if (fence)
		chan = fence->channel;
	if (!chan)
		chan = nvdrm_channel(dev);
	mutex_lock(nvchan_mutex(chan));

	/* Emit a page flip */
	if (dev_priv->card_type >= NV_50) {
		if (dev_priv->card_type >= NV_D0)
			ret = nvd0_display_flip_next(crtc, fb, chan, 0);
		else
			ret = nv50_display_flip_next(crtc, fb, chan);
		if (ret) {
			mutex_unlock(nvchan_mutex(chan));
			goto fail_unreserve;
		}
	}

	ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
	mutex_unlock(nvchan_mutex(chan));
	if (ret)
		goto fail_unreserve;

	/* Update the crtc struct and cleanup */
	crtc->fb = fb;

	nouveau_page_flip_unreserve(old_bo, new_bo, fence);
	nouveau_fence_unref(&fence);
	return 0;

fail_unreserve:
	nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
fail_free:
	kfree(s);
	return ret;
}

int
nouveau_finish_page_flip(struct nouveau_channel *chan,
			 struct nouveau_page_flip_state *ps)
{
	struct nouveau_fence_chan *fctx = chan->fence;
	struct drm_device *dev = nouveau_drv(chan->drm);
	struct nouveau_page_flip_state *s;
	unsigned long flags;

	spin_lock_irqsave(&dev->event_lock, flags);

	if (list_empty(&fctx->flip)) {
		NV_ERROR(dev, "unexpected pageflip\n");
		spin_unlock_irqrestore(&dev->event_lock, flags);
		return -EINVAL;
	}

	s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
	if (s->event) {
		struct drm_pending_vblank_event *e = s->event;
		struct timeval now;

		do_gettimeofday(&now);
		e->event.sequence = 0;
		e->event.tv_sec = now.tv_sec;
		e->event.tv_usec = now.tv_usec;
		list_add_tail(&e->base.link, &e->base.file_priv->event_list);
		wake_up_interruptible(&e->base.file_priv->event_wait);
	}

	list_del(&s->head);
	if (ps)
		*ps = *s;
	kfree(s);

	spin_unlock_irqrestore(&dev->event_lock, flags);
	return 0;
}

int
nouveau_flip_complete(void *data)
{
	struct nouveau_channel *chan = data;
	struct drm_device *dev = nouveau_drv(chan->drm);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_page_flip_state state;

	if (!nouveau_finish_page_flip(chan, &state)) {
		if (dev_priv->card_type < NV_50) {
			nv_set_crtc_base(dev, state.crtc, state.offset +
					 state.y * state.pitch +
					 state.x * state.bpp / 8);
		}
	}

	return 0;
}

int
nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
			    struct drm_mode_create_dumb *args)
{
	struct nouveau_bo *bo;
	int ret;

	args->pitch = roundup(args->width * (args->bpp / 8), 256);
	args->size = args->pitch * args->height;
	args->size = roundup(args->size, PAGE_SIZE);

	ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
	if (ret)
		return ret;

	ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
	drm_gem_object_unreference_unlocked(bo->gem);
	return ret;
}

int
nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
			     uint32_t handle)
{
	return drm_gem_handle_delete(file_priv, handle);
}

int
nouveau_display_dumb_map_offset(struct drm_file *file_priv,
				struct drm_device *dev,
				uint32_t handle, uint64_t *poffset)
{
	struct drm_gem_object *gem;

	gem = drm_gem_object_lookup(dev, file_priv, handle);
	if (gem) {
		struct nouveau_bo *bo = gem->driver_private;
		*poffset = bo->bo.addr_space_offset;
		drm_gem_object_unreference_unlocked(gem);
		return 0;
	}

	return -ENOENT;
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright (C) 2008 Maarten Maathuis.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sublicense, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
	20	* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
	22	* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
	23	* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	24	*
	25	*/
	26
	27	#include "drmP.h"
	28	#include "drm_crtc_helper.h"
	29	#include "nouveau_drv.h"
	30	#include "nouveau_fb.h"
	31	#include "nouveau_fbcon.h"
042206c0	32	#include "nouveau_hw.h"
332b242f FJ	33	#include "nouveau_crtc.h"
332b242f FJ	34	#include "nouveau_dma.h"
de691855	35	#include "nouveau_connector.h"
45c4e0aa	36	#include "nv50_display.h"
6ee73861	37
ebb945a9 BS	38	#include "nouveau_fence.h"
ebb945a9 BS	39
e0996aea BS	40	#include <subdev/bios/gpio.h>
e0996aea BS	41
6ee73861 BS	42	static void
	43	nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
	44	{
	45	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861	46
bc9025bd LB	47	if (fb->nvbo)
bc9025bd LB	48	drm_gem_object_unreference_unlocked(fb->nvbo->gem);
6ee73861 BS	49
	50	drm_framebuffer_cleanup(drm_fb);
	51	kfree(fb);
	52	}
	53
	54	static int
	55	nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
	56	struct drm_file *file_priv,
	57	unsigned int *handle)
	58	{
	59	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
	60
	61	return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
	62	}
	63
	64	static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
	65	.destroy = nouveau_user_framebuffer_destroy,
	66	.create_handle = nouveau_user_framebuffer_create_handle,
	67	};
	68
38651674	69	int
45c4e0aa BS	70	nouveau_framebuffer_init(struct drm_device *dev,
45c4e0aa BS	71	struct nouveau_framebuffer *nv_fb,
308e5bcb	72	struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa	73	struct nouveau_bo *nvbo)
6ee73861	74	{
45c4e0aa BS	75	struct drm_nouveau_private *dev_priv = dev->dev_private;
45c4e0aa BS	76	struct drm_framebuffer *fb = &nv_fb->base;
6ee73861 BS	77	int ret;
6ee73861 BS	78
45c4e0aa	79	ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
6ee73861	80	if (ret) {
38651674	81	return ret;
6ee73861 BS	82	}
6ee73861 BS	83
45c4e0aa BS	84	drm_helper_mode_fill_fb_struct(fb, mode_cmd);
	85	nv_fb->nvbo = nvbo;
	86
	87	if (dev_priv->card_type >= NV_50) {
	88	u32 tile_flags = nouveau_bo_tile_layout(nvbo);
	89	if (tile_flags == 0x7a00 \|\|
	90	tile_flags == 0xfe00)
	91	nv_fb->r_dma = NvEvoFB32;
	92	else
	93	if (tile_flags == 0x7000)
	94	nv_fb->r_dma = NvEvoFB16;
	95	else
	96	nv_fb->r_dma = NvEvoVRAM_LP;
	97
	98	switch (fb->depth) {
	99	case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
	100	case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
	101	case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
	102	case 24:
	103	case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
	104	case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
	105	default:
	106	NV_ERROR(dev, "unknown depth %d\n", fb->depth);
	107	return -EINVAL;
	108	}
	109
	110	if (dev_priv->chipset == 0x50)
	111	nv_fb->r_format \|= (tile_flags << 8);
	112
2fad3d5e BS	113	if (!tile_flags) {
2fad3d5e BS	114	if (dev_priv->card_type < NV_D0)
01f2c773	115	nv_fb->r_pitch = 0x00100000 \| fb->pitches[0];
2fad3d5e	116	else
01f2c773	117	nv_fb->r_pitch = 0x01000000 \| fb->pitches[0];
2fad3d5e	118	} else {
45c4e0aa BS	119	u32 mode = nvbo->tile_mode;
	120	if (dev_priv->card_type >= NV_C0)
	121	mode >>= 4;
01f2c773	122	nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) \| mode;
45c4e0aa BS	123	}
	124	}
	125
38651674	126	return 0;
6ee73861 BS	127	}
	128
	129	static struct drm_framebuffer *
	130	nouveau_user_framebuffer_create(struct drm_device *dev,
	131	struct drm_file *file_priv,
308e5bcb	132	struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861	133	{
38651674	134	struct nouveau_framebuffer *nouveau_fb;
6ee73861	135	struct drm_gem_object *gem;
38651674	136	int ret;
6ee73861	137
308e5bcb	138	gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861	139	if (!gem)
cce13ff7	140	return ERR_PTR(-ENOENT);
6ee73861	141
38651674 DA	142	nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
38651674 DA	143	if (!nouveau_fb)
cce13ff7	144	return ERR_PTR(-ENOMEM);
38651674 DA	145
	146	ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
	147	if (ret) {
6ee73861	148	drm_gem_object_unreference(gem);
cce13ff7	149	return ERR_PTR(ret);
6ee73861 BS	150	}
6ee73861 BS	151
38651674	152	return &nouveau_fb->base;
6ee73861 BS	153	}
6ee73861 BS	154
27d5030a	155	static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861	156	.fb_create = nouveau_user_framebuffer_create,
eb1f8e4f	157	.output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861 BS	158	};
6ee73861 BS	159
b29caa58	160
4a67d391	161	struct nouveau_drm_prop_enum_list {
de691855	162	u8 gen_mask;
b29caa58 BS	163	int type;
	164	char *name;
	165	};
	166
4a67d391	167	static struct nouveau_drm_prop_enum_list underscan[] = {
92854622 BS	168	{ 6, UNDERSCAN_AUTO, "auto" },
	169	{ 6, UNDERSCAN_OFF, "off" },
	170	{ 6, UNDERSCAN_ON, "on" },
de691855	171	{}
b29caa58 BS	172	};
b29caa58 BS	173
4a67d391	174	static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855 BS	175	{ 7, DITHERING_MODE_AUTO, "auto" },
	176	{ 7, DITHERING_MODE_OFF, "off" },
	177	{ 1, DITHERING_MODE_ON, "on" },
	178	{ 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
	179	{ 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
	180	{ 4, DITHERING_MODE_TEMPORAL, "temporal" },
	181	{}
	182	};
	183
4a67d391	184	static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855 BS	185	{ 6, DITHERING_DEPTH_AUTO, "auto" },
	186	{ 6, DITHERING_DEPTH_6BPC, "6 bpc" },
	187	{ 6, DITHERING_DEPTH_8BPC, "8 bpc" },
	188	{}
	189	};
	190
	191	#define PROP_ENUM(p,gen,n,list) do { \
4a67d391	192	struct nouveau_drm_prop_enum_list *l = (list); \
de691855 BS	193	int c = 0; \
	194	while (l->gen_mask) { \
	195	if (l->gen_mask & (1 << (gen))) \
	196	c++; \
	197	l++; \
	198	} \
	199	if (c) { \
	200	p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
	201	l = (list); \
	202	c = 0; \
	203	while (p && l->gen_mask) { \
	204	if (l->gen_mask & (1 << (gen))) { \
	205	drm_property_add_enum(p, c, l->type, l->name); \
	206	c++; \
	207	} \
	208	l++; \
	209	} \
	210	} \
	211	} while(0)
	212
f62b27db BS	213	int
	214	nouveau_display_init(struct drm_device *dev)
	215	{
	216	struct drm_nouveau_private *dev_priv = dev->dev_private;
	217	struct nouveau_display_engine *disp = &dev_priv->engine.display;
52c4d767	218	struct drm_connector *connector;
f62b27db BS	219	int ret;
	220
	221	ret = disp->init(dev);
52c4d767 BS	222	if (ret)
	223	return ret;
	224
7df898b1 BS	225	/* power on internal panel if it's not already. the init tables of
	226	* some vbios default this to off for some reason, causing the
	227	* panel to not work after resume
	228	*/
	229	if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) {
	230	nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true);
	231	msleep(300);
	232	}
	233
	234	/* enable polling for external displays */
52c4d767 BS	235	drm_kms_helper_poll_enable(dev);
	236
	237	/* enable hotplug interrupts */
	238	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	239	struct nouveau_connector *conn = nouveau_connector(connector);
	240	nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, true);
f62b27db BS	241	}
	242
	243	return ret;
	244	}
	245
	246	void
	247	nouveau_display_fini(struct drm_device *dev)
	248	{
	249	struct drm_nouveau_private *dev_priv = dev->dev_private;
	250	struct nouveau_display_engine *disp = &dev_priv->engine.display;
52c4d767 BS	251	struct drm_connector *connector;
	252
	253	/* disable hotplug interrupts */
	254	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	255	struct nouveau_connector *conn = nouveau_connector(connector);
	256	nouveau_gpio_irq(dev, 0, conn->hpd, 0xff, false);
	257	}
f62b27db BS	258
	259	drm_kms_helper_poll_disable(dev);
	260	disp->fini(dev);
	261	}
	262
ebb945a9 BS	263	static void
	264	nouveau_display_vblank_notify(void *data, int crtc)
	265	{
	266	drm_handle_vblank(data, crtc);
	267	}
	268
	269	static void
	270	nouveau_display_vblank_get(void *data, int crtc)
	271	{
	272	drm_vblank_get(data, crtc);
	273	}
	274
	275	static void
	276	nouveau_display_vblank_put(void *data, int crtc)
	277	{
	278	drm_vblank_put(data, crtc);
	279	}
	280
27d5030a BS	281	int
	282	nouveau_display_create(struct drm_device *dev)
	283	{
	284	struct drm_nouveau_private *dev_priv = dev->dev_private;
	285	struct nouveau_display_engine *disp = &dev_priv->engine.display;
de691855	286	int ret, gen;
27d5030a BS	287
	288	drm_mode_config_init(dev);
	289	drm_mode_create_scaling_mode_property(dev);
4ceca5f8	290	drm_mode_create_dvi_i_properties(dev);
de691855 BS	291
	292	if (dev_priv->card_type < NV_50)
	293	gen = 0;
	294	else
	295	if (dev_priv->card_type < NV_D0)
	296	gen = 1;
	297	else
	298	gen = 2;
	299
	300	PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
	301	PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
	302	PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58 BS	303
b29caa58 BS	304	disp->underscan_hborder_property =
d9bc3c02	305	drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58 BS	306
b29caa58 BS	307	disp->underscan_vborder_property =
d9bc3c02	308	drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58	309
df26bc9c CB	310	if (gen == 1) {
	311	disp->vibrant_hue_property =
	312	drm_property_create(dev, DRM_MODE_PROP_RANGE,
	313	"vibrant hue", 2);
	314	disp->vibrant_hue_property->values[0] = 0;
	315	disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */
	316
	317	disp->color_vibrance_property =
	318	drm_property_create(dev, DRM_MODE_PROP_RANGE,
	319	"color vibrance", 2);
	320	disp->color_vibrance_property->values[0] = 0;
	321	disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
	322	}
	323
e6ecefaa	324	dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a BS	325	dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
	326
	327	dev->mode_config.min_width = 0;
	328	dev->mode_config.min_height = 0;
	329	if (dev_priv->card_type < NV_10) {
	330	dev->mode_config.max_width = 2048;
	331	dev->mode_config.max_height = 2048;
	332	} else
	333	if (dev_priv->card_type < NV_50) {
	334	dev->mode_config.max_width = 4096;
	335	dev->mode_config.max_height = 4096;
	336	} else {
	337	dev->mode_config.max_width = 8192;
	338	dev->mode_config.max_height = 8192;
	339	}
	340
f1377998 DA	341	dev->mode_config.preferred_depth = 24;
	342	dev->mode_config.prefer_shadow = 1;
	343
f62b27db BS	344	drm_kms_helper_poll_init(dev);
	345	drm_kms_helper_poll_disable(dev);
	346
27d5030a BS	347	ret = disp->create(dev);
27d5030a BS	348	if (ret)
5ace2c9d	349	goto disp_create_err;
27d5030a	350
f62b27db BS	351	if (dev->mode_config.num_crtc) {
	352	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
	353	if (ret)
5ace2c9d	354	goto vblank_err;
f62b27db BS	355	}
f62b27db BS	356
5ace2c9d MS	357	return 0;
	358
	359	vblank_err:
	360	disp->destroy(dev);
	361	disp_create_err:
	362	drm_kms_helper_poll_fini(dev);
	363	drm_mode_config_cleanup(dev);
2a44e499	364	return ret;
27d5030a BS	365	}
	366
	367	void
	368	nouveau_display_destroy(struct drm_device *dev)
	369	{
	370	struct drm_nouveau_private *dev_priv = dev->dev_private;
	371	struct nouveau_display_engine *disp = &dev_priv->engine.display;
	372
f62b27db BS	373	drm_vblank_cleanup(dev);
f62b27db BS	374
27d5030a	375	disp->destroy(dev);
f62b27db BS	376
f62b27db BS	377	drm_kms_helper_poll_fini(dev);
27d5030a BS	378	drm_mode_config_cleanup(dev);
	379	}
	380
042206c0 FJ	381	int
	382	nouveau_vblank_enable(struct drm_device *dev, int crtc)
	383	{
	384	struct drm_nouveau_private *dev_priv = dev->dev_private;
	385
ebb945a9 BS	386	if (dev_priv->card_type >= NV_D0)
	387	nv_mask(dev, 0x6100c0 + (crtc * 0x800), 1, 1);
	388	else
	389
042206c0 FJ	390	if (dev_priv->card_type >= NV_50)
	391	nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
	392	NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
	393	else
	394	NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
	395	NV_PCRTC_INTR_0_VBLANK);
	396
	397	return 0;
	398	}
	399
	400	void
	401	nouveau_vblank_disable(struct drm_device *dev, int crtc)
	402	{
	403	struct drm_nouveau_private *dev_priv = dev->dev_private;
	404
ebb945a9 BS	405	if (dev_priv->card_type >= NV_D0)
	406	nv_mask(dev, 0x6100c0 + (crtc * 0x800), 1, 0);
	407	else
042206c0 FJ	408	if (dev_priv->card_type >= NV_50)
	409	nv_mask(dev, NV50_PDISPLAY_INTR_EN_1,
	410	NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
	411	else
	412	NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
	413	}
332b242f FJ	414
	415	static int
	416	nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
	417	struct nouveau_bo *new_bo)
	418	{
	419	int ret;
	420
	421	ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
	422	if (ret)
	423	return ret;
	424
	425	ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
	426	if (ret)
	427	goto fail;
	428
	429	ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
	430	if (ret)
	431	goto fail_unreserve;
	432
	433	return 0;
	434
	435	fail_unreserve:
	436	ttm_bo_unreserve(&new_bo->bo);
	437	fail:
	438	nouveau_bo_unpin(new_bo);
	439	return ret;
	440	}
	441
	442	static void
	443	nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
	444	struct nouveau_bo *new_bo,
	445	struct nouveau_fence *fence)
	446	{
	447	nouveau_bo_fence(new_bo, fence);
	448	ttm_bo_unreserve(&new_bo->bo);
	449
	450	nouveau_bo_fence(old_bo, fence);
	451	ttm_bo_unreserve(&old_bo->bo);
	452
	453	nouveau_bo_unpin(old_bo);
	454	}
	455
	456	static int
	457	nouveau_page_flip_emit(struct nouveau_channel *chan,
	458	struct nouveau_bo *old_bo,
	459	struct nouveau_bo *new_bo,
	460	struct nouveau_page_flip_state *s,
	461	struct nouveau_fence **pfence)
	462	{
f589be88	463	struct nouveau_fence_chan *fctx = chan->fence;
ebb945a9 BS	464	struct drm_device *dev = nouveau_drv(chan->drm);
ebb945a9 BS	465	struct drm_nouveau_private *dev_priv = dev->dev_private;
332b242f FJ	466	unsigned long flags;
	467	int ret;
	468
	469	/* Queue it to the pending list */
	470	spin_lock_irqsave(&dev->event_lock, flags);
f589be88	471	list_add_tail(&s->head, &fctx->flip);
332b242f FJ	472	spin_unlock_irqrestore(&dev->event_lock, flags);
	473
	474	/* Synchronize with the old framebuffer */
	475	ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
	476	if (ret)
	477	goto fail;
	478
	479	/* Emit the pageflip */
d5316e25	480	ret = RING_SPACE(chan, 3);
332b242f FJ	481	if (ret)
	482	goto fail;
	483
d5316e25	484	if (dev_priv->card_type < NV_C0) {
6d597027	485	BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
d5316e25 BS	486	OUT_RING (chan, 0x00000000);
	487	OUT_RING (chan, 0x00000000);
	488	} else {
6d597027	489	BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
5e120f6e	490	OUT_RING (chan, 0);
6d597027	491	BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
d5316e25	492	}
bd2f2037	493	FIRE_RING (chan);
332b242f	494
d375e7d5	495	ret = nouveau_fence_new(chan, pfence);
332b242f FJ	496	if (ret)
	497	goto fail;
	498
	499	return 0;
	500	fail:
	501	spin_lock_irqsave(&dev->event_lock, flags);
	502	list_del(&s->head);
	503	spin_unlock_irqrestore(&dev->event_lock, flags);
	504	return ret;
	505	}
	506
	507	int
	508	nouveau_crtc_page_flip(struct drm_crtc crtc, struct drm_framebuffer fb,
	509	struct drm_pending_vblank_event *event)
	510	{
	511	struct drm_device *dev = crtc->dev;
	512	struct drm_nouveau_private *dev_priv = dev->dev_private;
	513	struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
	514	struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
	515	struct nouveau_page_flip_state *s;
d375e7d5	516	struct nouveau_channel *chan = NULL;
332b242f FJ	517	struct nouveau_fence *fence;
	518	int ret;
	519
ebb945a9	520	if (!nvdrm_channel(dev))
332b242f FJ	521	return -ENODEV;
	522
	523	s = kzalloc(sizeof(*s), GFP_KERNEL);
	524	if (!s)
	525	return -ENOMEM;
	526
	527	/* Don't let the buffers go away while we flip */
	528	ret = nouveau_page_flip_reserve(old_bo, new_bo);
	529	if (ret)
	530	goto fail_free;
	531
	532	/* Initialize a page flip struct */
	533	*s = (struct nouveau_page_flip_state)
2503c6fa	534	{ { }, event, nouveau_crtc(crtc)->index,
01f2c773	535	fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
332b242f FJ	536	new_bo->bo.offset };
	537
	538	/* Choose the channel the flip will be handled in */
d375e7d5 BS	539	fence = new_bo->bo.sync_obj;
d375e7d5 BS	540	if (fence)
ebb945a9	541	chan = fence->channel;
332b242f	542	if (!chan)
ebb945a9 BS	543	chan = nvdrm_channel(dev);
ebb945a9 BS	544	mutex_lock(nvchan_mutex(chan));
332b242f FJ	545
332b242f FJ	546	/* Emit a page flip */
d7117e0d	547	if (dev_priv->card_type >= NV_50) {
3376ee37 BS	548	if (dev_priv->card_type >= NV_D0)
	549	ret = nvd0_display_flip_next(crtc, fb, chan, 0);
	550	else
	551	ret = nv50_display_flip_next(crtc, fb, chan);
d7117e0d	552	if (ret) {
ebb945a9	553	mutex_unlock(nvchan_mutex(chan));
d7117e0d BS	554	goto fail_unreserve;
	555	}
	556	}
	557
332b242f	558	ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
ebb945a9	559	mutex_unlock(nvchan_mutex(chan));
332b242f FJ	560	if (ret)
	561	goto fail_unreserve;
	562
	563	/* Update the crtc struct and cleanup */
	564	crtc->fb = fb;
	565
	566	nouveau_page_flip_unreserve(old_bo, new_bo, fence);
	567	nouveau_fence_unref(&fence);
	568	return 0;
	569
	570	fail_unreserve:
	571	nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
	572	fail_free:
	573	kfree(s);
	574	return ret;
	575	}
	576
	577	int
	578	nouveau_finish_page_flip(struct nouveau_channel *chan,
	579	struct nouveau_page_flip_state *ps)
	580	{
f589be88	581	struct nouveau_fence_chan *fctx = chan->fence;
ebb945a9	582	struct drm_device *dev = nouveau_drv(chan->drm);
332b242f FJ	583	struct nouveau_page_flip_state *s;
	584	unsigned long flags;
	585
	586	spin_lock_irqsave(&dev->event_lock, flags);
	587
f589be88	588	if (list_empty(&fctx->flip)) {
ebb945a9	589	NV_ERROR(dev, "unexpected pageflip\n");
332b242f FJ	590	spin_unlock_irqrestore(&dev->event_lock, flags);
	591	return -EINVAL;
	592	}
	593
f589be88	594	s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
332b242f FJ	595	if (s->event) {
	596	struct drm_pending_vblank_event *e = s->event;
	597	struct timeval now;
	598
	599	do_gettimeofday(&now);
	600	e->event.sequence = 0;
	601	e->event.tv_sec = now.tv_sec;
	602	e->event.tv_usec = now.tv_usec;
	603	list_add_tail(&e->base.link, &e->base.file_priv->event_list);
	604	wake_up_interruptible(&e->base.file_priv->event_wait);
	605	}
	606
	607	list_del(&s->head);
d7117e0d BS	608	if (ps)
d7117e0d BS	609	ps = s;
332b242f FJ	610	kfree(s);
	611
	612	spin_unlock_irqrestore(&dev->event_lock, flags);
	613	return 0;
	614	}
33dbc27f	615
f589be88 BS	616	int
	617	nouveau_flip_complete(void *data)
	618	{
	619	struct nouveau_channel *chan = data;
ebb945a9	620	struct drm_device *dev = nouveau_drv(chan->drm);
f589be88 BS	621	struct drm_nouveau_private *dev_priv = dev->dev_private;
	622	struct nouveau_page_flip_state state;
	623
	624	if (!nouveau_finish_page_flip(chan, &state)) {
	625	if (dev_priv->card_type < NV_50) {
	626	nv_set_crtc_base(dev, state.crtc, state.offset +
	627	state.y * state.pitch +
	628	state.x * state.bpp / 8);
	629	}
	630	}
	631
	632	return 0;
	633	}
	634
33dbc27f BS	635	int
	636	nouveau_display_dumb_create(struct drm_file file_priv, struct drm_device dev,
	637	struct drm_mode_create_dumb *args)
	638	{
	639	struct nouveau_bo *bo;
	640	int ret;
	641
	642	args->pitch = roundup(args->width * (args->bpp / 8), 256);
	643	args->size = args->pitch * args->height;
	644	args->size = roundup(args->size, PAGE_SIZE);
	645
610bd7da	646	ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f BS	647	if (ret)
	648	return ret;
	649
	650	ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
	651	drm_gem_object_unreference_unlocked(bo->gem);
	652	return ret;
	653	}
	654
	655	int
	656	nouveau_display_dumb_destroy(struct drm_file file_priv, struct drm_device dev,
	657	uint32_t handle)
	658	{
	659	return drm_gem_handle_delete(file_priv, handle);
	660	}
	661
	662	int
	663	nouveau_display_dumb_map_offset(struct drm_file *file_priv,
	664	struct drm_device *dev,
	665	uint32_t handle, uint64_t *poffset)
	666	{
	667	struct drm_gem_object *gem;
	668
	669	gem = drm_gem_object_lookup(dev, file_priv, handle);
	670	if (gem) {
	671	struct nouveau_bo *bo = gem->driver_private;
	672	*poffset = bo->bo.addr_space_offset;
	673	drm_gem_object_unreference_unlocked(gem);
	674	return 0;
	675	}
	676
	677	return -ENOENT;
	678	}