Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
5addcf0a DA |
28 | #include <linux/pm_runtime.h> |
29 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 30 | |
5addcf0a DA |
31 | #include "drmP.h" |
32 | #include "drm_crtc_helper.h" | |
fdb751ef | 33 | |
94580299 | 34 | #include <core/device.h> |
ebb945a9 | 35 | #include <core/gpuobj.h> |
c33e05a1 | 36 | #include <core/option.h> |
94580299 | 37 | |
94580299 | 38 | #include "nouveau_drm.h" |
ebb945a9 | 39 | #include "nouveau_dma.h" |
77145f1c BS |
40 | #include "nouveau_ttm.h" |
41 | #include "nouveau_gem.h" | |
cb75d97e | 42 | #include "nouveau_agp.h" |
77145f1c | 43 | #include "nouveau_vga.h" |
26fdd78c | 44 | #include "nouveau_sysfs.h" |
b9ed919f | 45 | #include "nouveau_hwmon.h" |
77145f1c BS |
46 | #include "nouveau_acpi.h" |
47 | #include "nouveau_bios.h" | |
48 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
49 | #include "nouveau_abi16.h" |
50 | #include "nouveau_fbcon.h" | |
51 | #include "nouveau_fence.h" | |
33b903e8 | 52 | #include "nouveau_debugfs.h" |
27111a23 | 53 | #include "nouveau_usif.h" |
ebb945a9 | 54 | |
94580299 BS |
55 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
56 | static char *nouveau_config; | |
57 | module_param_named(config, nouveau_config, charp, 0400); | |
58 | ||
59 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
60 | static char *nouveau_debug; | |
61 | module_param_named(debug, nouveau_debug, charp, 0400); | |
62 | ||
ebb945a9 BS |
63 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
64 | static int nouveau_noaccel = 0; | |
65 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
66 | ||
9430738d BS |
67 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
68 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
69 | int nouveau_modeset = -1; | |
77145f1c BS |
70 | module_param_named(modeset, nouveau_modeset, int, 0400); |
71 | ||
5addcf0a DA |
72 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
73 | int nouveau_runtime_pm = -1; | |
74 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
75 | ||
915b4d11 DH |
76 | static struct drm_driver driver_stub; |
77 | static struct drm_driver driver_pci; | |
78 | static struct drm_driver driver_platform; | |
77145f1c | 79 | |
94580299 | 80 | static u64 |
420b9469 | 81 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
82 | { |
83 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
84 | name |= pdev->bus->number << 16; | |
85 | name |= PCI_SLOT(pdev->devfn) << 8; | |
86 | return name | PCI_FUNC(pdev->devfn); | |
87 | } | |
88 | ||
420b9469 AC |
89 | static u64 |
90 | nouveau_platform_name(struct platform_device *platformdev) | |
91 | { | |
92 | return platformdev->id; | |
93 | } | |
94 | ||
95 | static u64 | |
96 | nouveau_name(struct drm_device *dev) | |
97 | { | |
98 | if (dev->pdev) | |
99 | return nouveau_pci_name(dev->pdev); | |
100 | else | |
101 | return nouveau_platform_name(dev->platformdev); | |
102 | } | |
103 | ||
94580299 | 104 | static int |
420b9469 | 105 | nouveau_cli_create(u64 name, const char *sname, |
fa6df8c1 | 106 | int size, void **pcli) |
94580299 | 107 | { |
0ad72863 BS |
108 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
109 | if (cli) { | |
110 | int ret = nvif_client_init(NULL, NULL, sname, name, | |
111 | nouveau_config, nouveau_debug, | |
112 | &cli->base); | |
27111a23 | 113 | if (ret == 0) { |
0ad72863 | 114 | mutex_init(&cli->mutex); |
27111a23 BS |
115 | usif_client_init(cli); |
116 | } | |
94580299 | 117 | return ret; |
dd5700ea | 118 | } |
0ad72863 | 119 | return -ENOMEM; |
94580299 BS |
120 | } |
121 | ||
122 | static void | |
123 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
124 | { | |
0ad72863 BS |
125 | nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL); |
126 | nvif_client_fini(&cli->base); | |
27111a23 | 127 | usif_client_fini(cli); |
94580299 BS |
128 | } |
129 | ||
ebb945a9 BS |
130 | static void |
131 | nouveau_accel_fini(struct nouveau_drm *drm) | |
132 | { | |
ebb945a9 | 133 | nouveau_channel_del(&drm->channel); |
0ad72863 BS |
134 | nvif_object_fini(&drm->ntfy); |
135 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
136 | nvif_object_fini(&drm->nvsw); | |
49981046 | 137 | nouveau_channel_del(&drm->cechan); |
0ad72863 | 138 | nvif_object_fini(&drm->ttm.copy); |
ebb945a9 BS |
139 | if (drm->fence) |
140 | nouveau_fence(drm)->dtor(drm); | |
141 | } | |
142 | ||
143 | static void | |
144 | nouveau_accel_init(struct nouveau_drm *drm) | |
145 | { | |
967e7bde | 146 | struct nvif_device *device = &drm->device; |
49981046 | 147 | u32 arg0, arg1; |
967e7bde BS |
148 | u32 sclass[16]; |
149 | int ret, i; | |
ebb945a9 | 150 | |
967e7bde | 151 | if (nouveau_noaccel) |
ebb945a9 BS |
152 | return; |
153 | ||
154 | /* initialise synchronisation routines */ | |
967e7bde BS |
155 | /*XXX: this is crap, but the fence/channel stuff is a little |
156 | * backwards in some places. this will be fixed. | |
157 | */ | |
0ad72863 | 158 | ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass)); |
967e7bde BS |
159 | if (ret < 0) |
160 | return; | |
161 | ||
162 | for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) { | |
163 | switch (sclass[i]) { | |
bbf8906b | 164 | case NV03_CHANNEL_DMA: |
967e7bde BS |
165 | ret = nv04_fence_create(drm); |
166 | break; | |
bbf8906b | 167 | case NV10_CHANNEL_DMA: |
967e7bde BS |
168 | ret = nv10_fence_create(drm); |
169 | break; | |
bbf8906b BS |
170 | case NV17_CHANNEL_DMA: |
171 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
172 | ret = nv17_fence_create(drm); |
173 | break; | |
bbf8906b | 174 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
175 | ret = nv50_fence_create(drm); |
176 | break; | |
bbf8906b | 177 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
178 | ret = nv84_fence_create(drm); |
179 | break; | |
bbf8906b BS |
180 | case FERMI_CHANNEL_GPFIFO: |
181 | case KEPLER_CHANNEL_GPFIFO_A: | |
967e7bde BS |
182 | ret = nvc0_fence_create(drm); |
183 | break; | |
184 | default: | |
185 | break; | |
186 | } | |
187 | } | |
188 | ||
ebb945a9 BS |
189 | if (ret) { |
190 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
191 | nouveau_accel_fini(drm); | |
192 | return; | |
193 | } | |
194 | ||
967e7bde | 195 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
0ad72863 | 196 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
bbf8906b BS |
197 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
198 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
199 | 0, &drm->cechan); | |
49981046 BS |
200 | if (ret) |
201 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
202 | ||
bbf8906b | 203 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 204 | arg1 = 1; |
00fc6f6f | 205 | } else |
967e7bde BS |
206 | if (device->info.chipset >= 0xa3 && |
207 | device->info.chipset != 0xaa && | |
208 | device->info.chipset != 0xac) { | |
0ad72863 BS |
209 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
210 | NvDmaFB, NvDmaTT, &drm->cechan); | |
00fc6f6f BS |
211 | if (ret) |
212 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
213 | ||
214 | arg0 = NvDmaFB; | |
215 | arg1 = NvDmaTT; | |
49981046 BS |
216 | } else { |
217 | arg0 = NvDmaFB; | |
218 | arg1 = NvDmaTT; | |
219 | } | |
220 | ||
0ad72863 BS |
221 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1, |
222 | &drm->channel); | |
ebb945a9 BS |
223 | if (ret) { |
224 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
225 | nouveau_accel_fini(drm); | |
226 | return; | |
227 | } | |
228 | ||
0ad72863 BS |
229 | ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW, |
230 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); | |
69a6146d | 231 | if (ret == 0) { |
0ad72863 | 232 | struct nouveau_software_chan *swch; |
69a6146d BS |
233 | ret = RING_SPACE(drm->channel, 2); |
234 | if (ret == 0) { | |
967e7bde | 235 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
236 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
237 | OUT_RING (drm->channel, NVDRM_NVSW); | |
238 | } else | |
967e7bde | 239 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
240 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
241 | OUT_RING (drm->channel, 0x001f0000); | |
242 | } | |
243 | } | |
0ad72863 | 244 | swch = (void *)nvkm_object(&drm->nvsw)->parent; |
69a6146d BS |
245 | swch->flip = nouveau_flip_complete; |
246 | swch->flip_data = drm->channel; | |
247 | } | |
248 | ||
249 | if (ret) { | |
250 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
251 | nouveau_accel_fini(drm); | |
252 | return; | |
253 | } | |
254 | ||
967e7bde BS |
255 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
256 | ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32, | |
257 | 0, 0, &drm->notify); | |
ebb945a9 BS |
258 | if (ret) { |
259 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
260 | nouveau_accel_fini(drm); | |
261 | return; | |
262 | } | |
263 | ||
0ad72863 | 264 | ret = nvif_object_init(drm->channel->object, NULL, NvNotify0, |
4acfd707 BS |
265 | NV_DMA_IN_MEMORY, |
266 | &(struct nv_dma_v0) { | |
267 | .target = NV_DMA_V0_TARGET_VRAM, | |
268 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
269 | .start = drm->notify->addr, |
270 | .limit = drm->notify->addr + 31 | |
4acfd707 | 271 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 272 | &drm->ntfy); |
ebb945a9 BS |
273 | if (ret) { |
274 | nouveau_accel_fini(drm); | |
275 | return; | |
276 | } | |
277 | } | |
278 | ||
279 | ||
49981046 | 280 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
281 | } |
282 | ||
56550d94 GKH |
283 | static int nouveau_drm_probe(struct pci_dev *pdev, |
284 | const struct pci_device_id *pent) | |
94580299 BS |
285 | { |
286 | struct nouveau_device *device; | |
ebb945a9 BS |
287 | struct apertures_struct *aper; |
288 | bool boot = false; | |
94580299 BS |
289 | int ret; |
290 | ||
ebb945a9 BS |
291 | /* remove conflicting drivers (vesafb, efifb etc) */ |
292 | aper = alloc_apertures(3); | |
293 | if (!aper) | |
294 | return -ENOMEM; | |
295 | ||
296 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
297 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
298 | aper->count = 1; | |
299 | ||
300 | if (pci_resource_len(pdev, 2)) { | |
301 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
302 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
303 | aper->count++; | |
304 | } | |
305 | ||
306 | if (pci_resource_len(pdev, 3)) { | |
307 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
308 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
309 | aper->count++; | |
310 | } | |
311 | ||
312 | #ifdef CONFIG_X86 | |
313 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
314 | #endif | |
771fa0e4 BS |
315 | if (nouveau_modeset != 2) |
316 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 317 | kfree(aper); |
ebb945a9 | 318 | |
420b9469 AC |
319 | ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI, |
320 | nouveau_pci_name(pdev), pci_name(pdev), | |
94580299 BS |
321 | nouveau_config, nouveau_debug, &device); |
322 | if (ret) | |
323 | return ret; | |
324 | ||
325 | pci_set_master(pdev); | |
326 | ||
915b4d11 | 327 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 328 | if (ret) { |
ebb945a9 | 329 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
330 | return ret; |
331 | } | |
332 | ||
333 | return 0; | |
334 | } | |
335 | ||
5addcf0a DA |
336 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
337 | ||
338 | static void | |
46941b0f | 339 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 340 | { |
46941b0f | 341 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 342 | |
420b9469 | 343 | if (!pdev) { |
40189b0c | 344 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
345 | drm->hdmi_device = NULL; |
346 | return; | |
347 | } | |
348 | ||
5addcf0a DA |
349 | /* subfunction one is a hdmi audio device? */ |
350 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
351 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
352 | ||
353 | if (!drm->hdmi_device) { | |
46941b0f | 354 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
355 | return; |
356 | } | |
357 | ||
358 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 359 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
360 | pci_dev_put(drm->hdmi_device); |
361 | drm->hdmi_device = NULL; | |
362 | return; | |
363 | } | |
364 | } | |
365 | ||
5b8a43ae | 366 | static int |
94580299 BS |
367 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
368 | { | |
369 | struct pci_dev *pdev = dev->pdev; | |
370 | struct nouveau_drm *drm; | |
371 | int ret; | |
372 | ||
420b9469 AC |
373 | ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm), |
374 | (void **)&drm); | |
94580299 BS |
375 | if (ret) |
376 | return ret; | |
377 | ||
77145f1c BS |
378 | dev->dev_private = drm; |
379 | drm->dev = dev; | |
0ad72863 BS |
380 | nvkm_client(&drm->client.base)->debug = |
381 | nouveau_dbgopt(nouveau_debug, "DRM"); | |
77145f1c | 382 | |
94580299 | 383 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 384 | spin_lock_init(&drm->tile.lock); |
94580299 | 385 | |
46941b0f | 386 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 387 | |
cb75d97e BS |
388 | /* make sure AGP controller is in a consistent state before we |
389 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
390 | */ | |
420b9469 | 391 | if (pdev && drm_pci_device_is_agp(dev) && dev->agp) { |
586491e6 BS |
392 | const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY | |
393 | NV_DEVICE_V0_DISABLE_MMIO; | |
cb75d97e BS |
394 | /* dummy device object, doesn't init anything, but allows |
395 | * agp code access to registers | |
396 | */ | |
0ad72863 | 397 | ret = nvif_device_init(&drm->client.base.base, NULL, |
586491e6 BS |
398 | NVDRM_DEVICE, NV_DEVICE, |
399 | &(struct nv_device_v0) { | |
cb75d97e | 400 | .device = ~0, |
586491e6 | 401 | .disable = ~enables, |
cb75d97e | 402 | .debug0 = ~0, |
586491e6 | 403 | }, sizeof(struct nv_device_v0), |
0ad72863 | 404 | &drm->device); |
cb75d97e | 405 | if (ret) |
ebb945a9 | 406 | goto fail_device; |
cb75d97e BS |
407 | |
408 | nouveau_agp_reset(drm); | |
0ad72863 | 409 | nvif_device_fini(&drm->device); |
cb75d97e BS |
410 | } |
411 | ||
0ad72863 | 412 | ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE, |
586491e6 BS |
413 | NV_DEVICE, |
414 | &(struct nv_device_v0) { | |
94580299 BS |
415 | .device = ~0, |
416 | .disable = 0, | |
417 | .debug0 = 0, | |
586491e6 | 418 | }, sizeof(struct nv_device_v0), |
0ad72863 | 419 | &drm->device); |
94580299 BS |
420 | if (ret) |
421 | goto fail_device; | |
422 | ||
7d3428cd IM |
423 | dev->irq_enabled = true; |
424 | ||
77145f1c BS |
425 | /* workaround an odd issue on nvc1 by disabling the device's |
426 | * nosnoop capability. hopefully won't cause issues until a | |
427 | * better fix is found - assuming there is one... | |
428 | */ | |
967e7bde BS |
429 | if (drm->device.info.chipset == 0xc1) |
430 | nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 431 | |
77145f1c | 432 | nouveau_vga_init(drm); |
cb75d97e BS |
433 | nouveau_agp_init(drm); |
434 | ||
967e7bde BS |
435 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
436 | ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), | |
3ee6f5b5 | 437 | 0x1000, &drm->client.vm); |
ebb945a9 BS |
438 | if (ret) |
439 | goto fail_device; | |
3ee6f5b5 | 440 | |
0ad72863 | 441 | nvkm_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
442 | } |
443 | ||
444 | ret = nouveau_ttm_init(drm); | |
94580299 | 445 | if (ret) |
77145f1c BS |
446 | goto fail_ttm; |
447 | ||
448 | ret = nouveau_bios_init(dev); | |
449 | if (ret) | |
450 | goto fail_bios; | |
451 | ||
77145f1c | 452 | ret = nouveau_display_create(dev); |
ebb945a9 | 453 | if (ret) |
77145f1c BS |
454 | goto fail_dispctor; |
455 | ||
456 | if (dev->mode_config.num_crtc) { | |
457 | ret = nouveau_display_init(dev); | |
458 | if (ret) | |
459 | goto fail_dispinit; | |
460 | } | |
461 | ||
26fdd78c | 462 | nouveau_sysfs_init(dev); |
b9ed919f | 463 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
464 | nouveau_accel_init(drm); |
465 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
466 | |
467 | if (nouveau_runtime_pm != 0) { | |
468 | pm_runtime_use_autosuspend(dev->dev); | |
469 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
470 | pm_runtime_set_active(dev->dev); | |
471 | pm_runtime_allow(dev->dev); | |
472 | pm_runtime_mark_last_busy(dev->dev); | |
473 | pm_runtime_put(dev->dev); | |
474 | } | |
94580299 BS |
475 | return 0; |
476 | ||
77145f1c BS |
477 | fail_dispinit: |
478 | nouveau_display_destroy(dev); | |
479 | fail_dispctor: | |
77145f1c BS |
480 | nouveau_bios_takedown(dev); |
481 | fail_bios: | |
ebb945a9 | 482 | nouveau_ttm_fini(drm); |
77145f1c BS |
483 | fail_ttm: |
484 | nouveau_agp_fini(drm); | |
485 | nouveau_vga_fini(drm); | |
94580299 | 486 | fail_device: |
0ad72863 | 487 | nvif_device_fini(&drm->device); |
94580299 BS |
488 | nouveau_cli_destroy(&drm->client); |
489 | return ret; | |
490 | } | |
491 | ||
5b8a43ae | 492 | static int |
94580299 BS |
493 | nouveau_drm_unload(struct drm_device *dev) |
494 | { | |
77145f1c | 495 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 496 | |
5addcf0a | 497 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
498 | nouveau_fbcon_fini(dev); |
499 | nouveau_accel_fini(drm); | |
b9ed919f | 500 | nouveau_hwmon_fini(dev); |
26fdd78c | 501 | nouveau_sysfs_fini(dev); |
77145f1c | 502 | |
9430738d BS |
503 | if (dev->mode_config.num_crtc) |
504 | nouveau_display_fini(dev); | |
77145f1c BS |
505 | nouveau_display_destroy(dev); |
506 | ||
77145f1c | 507 | nouveau_bios_takedown(dev); |
94580299 | 508 | |
ebb945a9 | 509 | nouveau_ttm_fini(drm); |
cb75d97e | 510 | nouveau_agp_fini(drm); |
77145f1c | 511 | nouveau_vga_fini(drm); |
cb75d97e | 512 | |
0ad72863 | 513 | nvif_device_fini(&drm->device); |
5addcf0a DA |
514 | if (drm->hdmi_device) |
515 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
516 | nouveau_cli_destroy(&drm->client); |
517 | return 0; | |
518 | } | |
519 | ||
8ba9ff11 AC |
520 | void |
521 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 522 | { |
77145f1c | 523 | struct nouveau_drm *drm = nouveau_drm(dev); |
0ad72863 | 524 | struct nouveau_client *client; |
ebb945a9 | 525 | struct nouveau_object *device; |
77145f1c | 526 | |
7d3428cd | 527 | dev->irq_enabled = false; |
0ad72863 BS |
528 | client = nvkm_client(&drm->client.base); |
529 | device = client->device; | |
77145f1c BS |
530 | drm_put_dev(dev); |
531 | ||
ebb945a9 BS |
532 | nouveau_object_ref(NULL, &device); |
533 | nouveau_object_debug(); | |
94580299 | 534 | } |
8ba9ff11 AC |
535 | EXPORT_SYMBOL(nouveau_drm_device_remove); |
536 | ||
537 | static void | |
538 | nouveau_drm_remove(struct pci_dev *pdev) | |
539 | { | |
540 | struct drm_device *dev = pci_get_drvdata(pdev); | |
541 | ||
542 | nouveau_drm_device_remove(dev); | |
543 | } | |
94580299 | 544 | |
cd897837 | 545 | static int |
05c63c2f | 546 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 547 | { |
77145f1c | 548 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
549 | struct nouveau_cli *cli; |
550 | int ret; | |
551 | ||
05c63c2f | 552 | if (dev->mode_config.num_crtc && !runtime) { |
c52f4fa6 | 553 | NV_INFO(drm, "suspending display...\n"); |
9430738d BS |
554 | ret = nouveau_display_suspend(dev); |
555 | if (ret) | |
556 | return ret; | |
557 | } | |
94580299 | 558 | |
c52f4fa6 | 559 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
560 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
561 | ||
c52f4fa6 | 562 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
563 | if (drm->cechan) { |
564 | ret = nouveau_channel_idle(drm->cechan); | |
565 | if (ret) | |
f3980dc5 | 566 | goto fail_display; |
81dff21b BS |
567 | } |
568 | ||
569 | if (drm->channel) { | |
570 | ret = nouveau_channel_idle(drm->channel); | |
571 | if (ret) | |
f3980dc5 | 572 | goto fail_display; |
81dff21b BS |
573 | } |
574 | ||
c52f4fa6 | 575 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 576 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
577 | if (!nouveau_fence(drm)->suspend(drm)) { |
578 | ret = -ENOMEM; | |
579 | goto fail_display; | |
580 | } | |
ebb945a9 BS |
581 | } |
582 | ||
94580299 | 583 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 584 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
585 | if (ret) |
586 | goto fail_client; | |
587 | } | |
588 | ||
c52f4fa6 | 589 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 590 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
591 | if (ret) |
592 | goto fail_client; | |
593 | ||
cb75d97e | 594 | nouveau_agp_fini(drm); |
94580299 BS |
595 | return 0; |
596 | ||
597 | fail_client: | |
598 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 599 | nvif_client_resume(&cli->base); |
94580299 BS |
600 | } |
601 | ||
f3980dc5 IM |
602 | if (drm->fence && nouveau_fence(drm)->resume) |
603 | nouveau_fence(drm)->resume(drm); | |
604 | ||
605 | fail_display: | |
9430738d | 606 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 607 | NV_INFO(drm, "resuming display...\n"); |
9430738d BS |
608 | nouveau_display_resume(dev); |
609 | } | |
94580299 BS |
610 | return ret; |
611 | } | |
612 | ||
2d8b9ccb | 613 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 614 | { |
2d8b9ccb DA |
615 | struct pci_dev *pdev = to_pci_dev(dev); |
616 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
617 | int ret; |
618 | ||
5addcf0a DA |
619 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
620 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
94580299 BS |
621 | return 0; |
622 | ||
5addcf0a DA |
623 | if (drm_dev->mode_config.num_crtc) |
624 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
625 | ||
05c63c2f | 626 | ret = nouveau_do_suspend(drm_dev, false); |
94580299 BS |
627 | if (ret) |
628 | return ret; | |
2d8b9ccb DA |
629 | |
630 | pci_save_state(pdev); | |
631 | pci_disable_device(pdev); | |
632 | pci_set_power_state(pdev, PCI_D3hot); | |
2d8b9ccb DA |
633 | return 0; |
634 | } | |
635 | ||
cd897837 | 636 | static int |
2d8b9ccb DA |
637 | nouveau_do_resume(struct drm_device *dev) |
638 | { | |
639 | struct nouveau_drm *drm = nouveau_drm(dev); | |
640 | struct nouveau_cli *cli; | |
641 | ||
c52f4fa6 | 642 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 643 | |
cb75d97e BS |
644 | nouveau_agp_reset(drm); |
645 | ||
c52f4fa6 | 646 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 647 | nvif_client_resume(&drm->client.base); |
ebb945a9 | 648 | nouveau_agp_init(drm); |
94580299 | 649 | |
c52f4fa6 | 650 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
651 | if (drm->fence && nouveau_fence(drm)->resume) |
652 | nouveau_fence(drm)->resume(drm); | |
653 | ||
94580299 | 654 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 655 | nvif_client_resume(&cli->base); |
94580299 | 656 | } |
cb75d97e | 657 | |
77145f1c | 658 | nouveau_run_vbios_init(dev); |
77145f1c | 659 | |
9430738d | 660 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 661 | NV_INFO(drm, "resuming display...\n"); |
5addcf0a | 662 | nouveau_display_repin(dev); |
9430738d | 663 | } |
5addcf0a | 664 | |
77145f1c | 665 | return 0; |
94580299 BS |
666 | } |
667 | ||
2d8b9ccb DA |
668 | int nouveau_pmops_resume(struct device *dev) |
669 | { | |
670 | struct pci_dev *pdev = to_pci_dev(dev); | |
671 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
672 | int ret; | |
673 | ||
5addcf0a DA |
674 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
675 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
676 | return 0; |
677 | ||
678 | pci_set_power_state(pdev, PCI_D0); | |
679 | pci_restore_state(pdev); | |
680 | ret = pci_enable_device(pdev); | |
681 | if (ret) | |
682 | return ret; | |
683 | pci_set_master(pdev); | |
684 | ||
5addcf0a | 685 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 686 | if (ret) |
5addcf0a | 687 | return ret; |
5addcf0a | 688 | |
028791bb | 689 | if (drm_dev->mode_config.num_crtc) { |
01172772 | 690 | nouveau_display_resume(drm_dev); |
028791bb BS |
691 | nouveau_fbcon_set_suspend(drm_dev, 0); |
692 | } | |
693 | ||
5addcf0a | 694 | return 0; |
2d8b9ccb DA |
695 | } |
696 | ||
697 | static int nouveau_pmops_freeze(struct device *dev) | |
698 | { | |
699 | struct pci_dev *pdev = to_pci_dev(dev); | |
700 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a DA |
701 | int ret; |
702 | ||
5addcf0a DA |
703 | if (drm_dev->mode_config.num_crtc) |
704 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
2d8b9ccb | 705 | |
05c63c2f | 706 | ret = nouveau_do_suspend(drm_dev, false); |
5addcf0a | 707 | return ret; |
2d8b9ccb DA |
708 | } |
709 | ||
710 | static int nouveau_pmops_thaw(struct device *dev) | |
711 | { | |
712 | struct pci_dev *pdev = to_pci_dev(dev); | |
713 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a | 714 | int ret; |
2d8b9ccb | 715 | |
5addcf0a | 716 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 717 | if (ret) |
5addcf0a | 718 | return ret; |
028791bb BS |
719 | |
720 | if (drm_dev->mode_config.num_crtc) { | |
01172772 | 721 | nouveau_display_resume(drm_dev); |
028791bb BS |
722 | nouveau_fbcon_set_suspend(drm_dev, 0); |
723 | } | |
724 | ||
5addcf0a | 725 | return 0; |
2d8b9ccb DA |
726 | } |
727 | ||
728 | ||
5b8a43ae | 729 | static int |
ebb945a9 BS |
730 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
731 | { | |
ebb945a9 BS |
732 | struct nouveau_drm *drm = nouveau_drm(dev); |
733 | struct nouveau_cli *cli; | |
a2896ced | 734 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
735 | int ret; |
736 | ||
5addcf0a DA |
737 | /* need to bring up power immediately if opening device */ |
738 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 739 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
740 | return ret; |
741 | ||
a2896ced MS |
742 | get_task_comm(tmpname, current); |
743 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 744 | |
420b9469 AC |
745 | ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli), |
746 | (void **)&cli); | |
747 | ||
ebb945a9 | 748 | if (ret) |
5addcf0a | 749 | goto out_suspend; |
ebb945a9 | 750 | |
0ad72863 BS |
751 | cli->base.super = false; |
752 | ||
967e7bde BS |
753 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
754 | ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), | |
3ee6f5b5 | 755 | 0x1000, &cli->vm); |
ebb945a9 BS |
756 | if (ret) { |
757 | nouveau_cli_destroy(cli); | |
5addcf0a | 758 | goto out_suspend; |
ebb945a9 | 759 | } |
3ee6f5b5 | 760 | |
0ad72863 | 761 | nvkm_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
762 | } |
763 | ||
764 | fpriv->driver_priv = cli; | |
765 | ||
766 | mutex_lock(&drm->client.mutex); | |
767 | list_add(&cli->head, &drm->clients); | |
768 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
769 | |
770 | out_suspend: | |
771 | pm_runtime_mark_last_busy(dev->dev); | |
772 | pm_runtime_put_autosuspend(dev->dev); | |
773 | ||
774 | return ret; | |
ebb945a9 BS |
775 | } |
776 | ||
5b8a43ae | 777 | static void |
ebb945a9 BS |
778 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
779 | { | |
780 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
781 | struct nouveau_drm *drm = nouveau_drm(dev); | |
782 | ||
5addcf0a DA |
783 | pm_runtime_get_sync(dev->dev); |
784 | ||
ebb945a9 BS |
785 | if (cli->abi16) |
786 | nouveau_abi16_fini(cli->abi16); | |
787 | ||
788 | mutex_lock(&drm->client.mutex); | |
789 | list_del(&cli->head); | |
790 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 791 | |
ebb945a9 BS |
792 | } |
793 | ||
5b8a43ae | 794 | static void |
ebb945a9 BS |
795 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
796 | { | |
797 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
798 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
799 | pm_runtime_mark_last_busy(dev->dev); |
800 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
801 | } |
802 | ||
baa70943 | 803 | static const struct drm_ioctl_desc |
77145f1c | 804 | nouveau_ioctls[] = { |
7d761258 | 805 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 806 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
807 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
808 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
809 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
810 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
811 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
812 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
813 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
814 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
815 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
816 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
817 | }; |
818 | ||
27111a23 BS |
819 | long |
820 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 821 | { |
27111a23 BS |
822 | struct drm_file *filp = file->private_data; |
823 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 824 | long ret; |
5addcf0a DA |
825 | |
826 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 827 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
828 | return ret; |
829 | ||
27111a23 BS |
830 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
831 | case DRM_NOUVEAU_NVIF: | |
832 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
833 | break; | |
834 | default: | |
835 | ret = drm_ioctl(file, cmd, arg); | |
836 | break; | |
837 | } | |
5addcf0a DA |
838 | |
839 | pm_runtime_mark_last_busy(dev->dev); | |
840 | pm_runtime_put_autosuspend(dev->dev); | |
841 | return ret; | |
842 | } | |
27111a23 | 843 | |
77145f1c BS |
844 | static const struct file_operations |
845 | nouveau_driver_fops = { | |
846 | .owner = THIS_MODULE, | |
847 | .open = drm_open, | |
848 | .release = drm_release, | |
5addcf0a | 849 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
850 | .mmap = nouveau_ttm_mmap, |
851 | .poll = drm_poll, | |
77145f1c BS |
852 | .read = drm_read, |
853 | #if defined(CONFIG_COMPAT) | |
854 | .compat_ioctl = nouveau_compat_ioctl, | |
855 | #endif | |
856 | .llseek = noop_llseek, | |
857 | }; | |
858 | ||
859 | static struct drm_driver | |
915b4d11 | 860 | driver_stub = { |
77145f1c | 861 | .driver_features = |
4cb4ea39 | 862 | DRIVER_USE_AGP | |
7d761258 | 863 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER, |
77145f1c BS |
864 | |
865 | .load = nouveau_drm_load, | |
866 | .unload = nouveau_drm_unload, | |
867 | .open = nouveau_drm_open, | |
868 | .preclose = nouveau_drm_preclose, | |
869 | .postclose = nouveau_drm_postclose, | |
870 | .lastclose = nouveau_vga_lastclose, | |
871 | ||
33b903e8 MS |
872 | #if defined(CONFIG_DEBUG_FS) |
873 | .debugfs_init = nouveau_debugfs_init, | |
874 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
875 | #endif | |
876 | ||
77145f1c | 877 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
878 | .enable_vblank = nouveau_display_vblank_enable, |
879 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
880 | .get_scanout_position = nouveau_display_scanoutpos, |
881 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
882 | |
883 | .ioctls = nouveau_ioctls, | |
baa70943 | 884 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
885 | .fops = &nouveau_driver_fops, |
886 | ||
887 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
888 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
889 | .gem_prime_export = drm_gem_prime_export, |
890 | .gem_prime_import = drm_gem_prime_import, | |
891 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 892 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 893 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
894 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
895 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
896 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
897 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 898 | |
77145f1c BS |
899 | .gem_free_object = nouveau_gem_object_del, |
900 | .gem_open_object = nouveau_gem_object_open, | |
901 | .gem_close_object = nouveau_gem_object_close, | |
902 | ||
903 | .dumb_create = nouveau_display_dumb_create, | |
904 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 905 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
906 | |
907 | .name = DRIVER_NAME, | |
908 | .desc = DRIVER_DESC, | |
909 | #ifdef GIT_REVISION | |
910 | .date = GIT_REVISION, | |
911 | #else | |
912 | .date = DRIVER_DATE, | |
913 | #endif | |
914 | .major = DRIVER_MAJOR, | |
915 | .minor = DRIVER_MINOR, | |
916 | .patchlevel = DRIVER_PATCHLEVEL, | |
917 | }; | |
918 | ||
94580299 BS |
919 | static struct pci_device_id |
920 | nouveau_drm_pci_table[] = { | |
921 | { | |
922 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
923 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
924 | .class_mask = 0xff << 16, | |
925 | }, | |
926 | { | |
927 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
928 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
929 | .class_mask = 0xff << 16, | |
930 | }, | |
931 | {} | |
932 | }; | |
933 | ||
5addcf0a DA |
934 | static int nouveau_pmops_runtime_suspend(struct device *dev) |
935 | { | |
936 | struct pci_dev *pdev = to_pci_dev(dev); | |
937 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
938 | int ret; | |
939 | ||
adbbdbac DA |
940 | if (nouveau_runtime_pm == 0) { |
941 | pm_runtime_forbid(dev); | |
942 | return -EBUSY; | |
943 | } | |
5addcf0a | 944 | |
b25b4427 IM |
945 | /* are we optimus enabled? */ |
946 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
947 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac DA |
948 | pm_runtime_forbid(dev); |
949 | return -EBUSY; | |
b25b4427 IM |
950 | } |
951 | ||
c52f4fa6 | 952 | nv_debug_level(SILENT); |
5addcf0a DA |
953 | drm_kms_helper_poll_disable(drm_dev); |
954 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
955 | nouveau_switcheroo_optimus_dsm(); | |
05c63c2f | 956 | ret = nouveau_do_suspend(drm_dev, true); |
5addcf0a DA |
957 | pci_save_state(pdev); |
958 | pci_disable_device(pdev); | |
959 | pci_set_power_state(pdev, PCI_D3cold); | |
960 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
961 | return ret; | |
962 | } | |
963 | ||
964 | static int nouveau_pmops_runtime_resume(struct device *dev) | |
965 | { | |
966 | struct pci_dev *pdev = to_pci_dev(dev); | |
967 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
967e7bde | 968 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; |
5addcf0a DA |
969 | int ret; |
970 | ||
971 | if (nouveau_runtime_pm == 0) | |
972 | return -EINVAL; | |
973 | ||
974 | pci_set_power_state(pdev, PCI_D0); | |
975 | pci_restore_state(pdev); | |
976 | ret = pci_enable_device(pdev); | |
977 | if (ret) | |
978 | return ret; | |
979 | pci_set_master(pdev); | |
980 | ||
981 | ret = nouveau_do_resume(drm_dev); | |
5addcf0a DA |
982 | drm_kms_helper_poll_enable(drm_dev); |
983 | /* do magic */ | |
db2bec18 | 984 | nvif_mask(device, 0x88488, (1 << 25), (1 << 25)); |
5addcf0a DA |
985 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
986 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
c52f4fa6 | 987 | nv_debug_level(NORMAL); |
5addcf0a DA |
988 | return ret; |
989 | } | |
990 | ||
991 | static int nouveau_pmops_runtime_idle(struct device *dev) | |
992 | { | |
993 | struct pci_dev *pdev = to_pci_dev(dev); | |
994 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
995 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
996 | struct drm_crtc *crtc; | |
997 | ||
adbbdbac DA |
998 | if (nouveau_runtime_pm == 0) { |
999 | pm_runtime_forbid(dev); | |
5addcf0a | 1000 | return -EBUSY; |
adbbdbac | 1001 | } |
5addcf0a DA |
1002 | |
1003 | /* are we optimus enabled? */ | |
1004 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
1005 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac | 1006 | pm_runtime_forbid(dev); |
5addcf0a DA |
1007 | return -EBUSY; |
1008 | } | |
1009 | ||
1010 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
1011 | if (drm->hdmi_device) { | |
1012 | if (!drm->hdmi_device->driver) { | |
1013 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
1014 | pm_runtime_mark_last_busy(dev); | |
1015 | return -EBUSY; | |
1016 | } | |
1017 | } | |
1018 | ||
1019 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
1020 | if (crtc->enabled) { | |
1021 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
1022 | return -EBUSY; | |
1023 | } | |
1024 | } | |
1025 | pm_runtime_mark_last_busy(dev); | |
1026 | pm_runtime_autosuspend(dev); | |
1027 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
1028 | return 1; | |
1029 | } | |
1030 | ||
2d8b9ccb DA |
1031 | static const struct dev_pm_ops nouveau_pm_ops = { |
1032 | .suspend = nouveau_pmops_suspend, | |
1033 | .resume = nouveau_pmops_resume, | |
1034 | .freeze = nouveau_pmops_freeze, | |
1035 | .thaw = nouveau_pmops_thaw, | |
1036 | .poweroff = nouveau_pmops_freeze, | |
1037 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1038 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1039 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1040 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1041 | }; |
1042 | ||
94580299 BS |
1043 | static struct pci_driver |
1044 | nouveau_drm_pci_driver = { | |
1045 | .name = "nouveau", | |
1046 | .id_table = nouveau_drm_pci_table, | |
1047 | .probe = nouveau_drm_probe, | |
1048 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1049 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1050 | }; |
1051 | ||
8ba9ff11 AC |
1052 | struct drm_device * |
1053 | nouveau_platform_device_create_(struct platform_device *pdev, int size, | |
1054 | void **pobject) | |
420b9469 | 1055 | { |
8ba9ff11 AC |
1056 | struct drm_device *drm; |
1057 | int err; | |
420b9469 | 1058 | |
8ba9ff11 | 1059 | err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM, |
420b9469 AC |
1060 | nouveau_platform_name(pdev), |
1061 | dev_name(&pdev->dev), nouveau_config, | |
8ba9ff11 AC |
1062 | nouveau_debug, size, pobject); |
1063 | if (err) | |
1064 | return ERR_PTR(err); | |
1065 | ||
915b4d11 | 1066 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
8ba9ff11 AC |
1067 | if (!drm) { |
1068 | err = -ENOMEM; | |
1069 | goto err_free; | |
420b9469 AC |
1070 | } |
1071 | ||
8ba9ff11 AC |
1072 | err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); |
1073 | if (err < 0) | |
1074 | goto err_free; | |
1075 | ||
1076 | drm->platformdev = pdev; | |
1077 | platform_set_drvdata(pdev, drm); | |
1078 | ||
1079 | return drm; | |
1080 | ||
1081 | err_free: | |
1082 | nouveau_object_ref(NULL, (struct nouveau_object **)pobject); | |
1083 | ||
1084 | return ERR_PTR(err); | |
420b9469 | 1085 | } |
8ba9ff11 | 1086 | EXPORT_SYMBOL(nouveau_platform_device_create_); |
420b9469 | 1087 | |
94580299 BS |
1088 | static int __init |
1089 | nouveau_drm_init(void) | |
1090 | { | |
915b4d11 DH |
1091 | driver_pci = driver_stub; |
1092 | driver_pci.set_busid = drm_pci_set_busid; | |
1093 | driver_platform = driver_stub; | |
1094 | driver_platform.set_busid = drm_platform_set_busid; | |
1095 | ||
77145f1c BS |
1096 | if (nouveau_modeset == -1) { |
1097 | #ifdef CONFIG_VGA_CONSOLE | |
1098 | if (vgacon_text_force()) | |
1099 | nouveau_modeset = 0; | |
77145f1c | 1100 | #endif |
77145f1c BS |
1101 | } |
1102 | ||
1103 | if (!nouveau_modeset) | |
1104 | return 0; | |
1105 | ||
1106 | nouveau_register_dsm_handler(); | |
915b4d11 | 1107 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1108 | } |
1109 | ||
1110 | static void __exit | |
1111 | nouveau_drm_exit(void) | |
1112 | { | |
77145f1c BS |
1113 | if (!nouveau_modeset) |
1114 | return; | |
1115 | ||
915b4d11 | 1116 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1117 | nouveau_unregister_dsm_handler(); |
94580299 BS |
1118 | } |
1119 | ||
1120 | module_init(nouveau_drm_init); | |
1121 | module_exit(nouveau_drm_exit); | |
1122 | ||
1123 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1124 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1125 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1126 | MODULE_LICENSE("GPL and additional rights"); |