[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_drv.c

/*
 * Copyright 2005 Stephane Marchesin.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/console.h>
#include <linux/module.h>

#include "drmP.h"
#include "drm.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_abi16.h"
#include "nouveau_hw.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nouveau_fence.h"
#include "nouveau_pm.h"
#include "nv50_display.h"

#include "drm_pciids.h"

MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
int nouveau_modeset = -1;
module_param_named(modeset, nouveau_modeset, int, 0400);

MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
int nouveau_vram_notify = 0;
module_param_named(vram_notify, nouveau_vram_notify, int, 0400);

MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
char *nouveau_vram_type;
module_param_named(vram_type, nouveau_vram_type, charp, 0400);

MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
int nouveau_duallink = 1;
module_param_named(duallink, nouveau_duallink, int, 0400);

MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
int nouveau_uscript_lvds = -1;
module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);

MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
int nouveau_uscript_tmds = -1;
module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);

MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
int nouveau_ignorelid = 0;
module_param_named(ignorelid, nouveau_ignorelid, int, 0400);

MODULE_PARM_DESC(force_post, "Force POST");
int nouveau_force_post = 0;
module_param_named(force_post, nouveau_force_post, int, 0400);

MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
int nouveau_override_conntype = 0;
module_param_named(override_conntype, nouveau_override_conntype, int, 0400);

MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
int nouveau_tv_disable = 0;
module_param_named(tv_disable, nouveau_tv_disable, int, 0400);

MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
		 "\t\tDefault: PAL\n"
		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
char *nouveau_tv_norm;
module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);

MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
		"\t\t0x100 vgaattr, 0x200 EVO (G80+)");
int nouveau_reg_debug;
module_param_named(reg_debug, nouveau_reg_debug, int, 0600);

MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
char *nouveau_perflvl;
module_param_named(perflvl, nouveau_perflvl, charp, 0400);

MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
int nouveau_perflvl_wr;
module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);

MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
int nouveau_msi;
module_param_named(msi, nouveau_msi, int, 0400);

MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
int nouveau_ctxfw;
module_param_named(ctxfw, nouveau_ctxfw, int, 0400);

MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
int nouveau_mxmdcb = 1;
module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);

int nouveau_fbpercrtc;
#if 0
module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
#endif

static struct drm_driver driver;

int __devinit
nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_pci_dev(pdev, ent, &driver);
}

void
nouveau_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

int
nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_crtc *crtc;

	NV_INFO(dev, "Disabling display...\n");
	nouveau_display_fini(dev);

	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_unpin(nouveau_fb->nvbo);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nouveau_bo_unmap(nv_crtc->cursor.nvbo);
		nouveau_bo_unpin(nv_crtc->cursor.nvbo);
	}

	return 0;
}

int
nouveau_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_crtc *crtc;
	int ret;

	ret = nouveau_run_vbios_init(dev);
	if (ret)
		return ret;

	nouveau_irq_postinstall(dev);

#if 0
	/* Re-write SKIPS, they'll have been lost over the suspend */
	if (nouveau_vram_pushbuf) {
		struct nouveau_channel *chan;
		int j;

		for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
			chan = dev_priv->channels.ptr[i];
			if (!chan || !chan->pushbuf_bo)
				continue;

			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
		}
	}
#endif

	nouveau_pm_resume(dev);

	NV_INFO(dev, "Restoring mode...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
		if (!ret)
			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
		if (ret)
			NV_ERROR(dev, "Could not pin/map cursor.\n");
	}

	nouveau_fbcon_set_suspend(dev, 0);
	nouveau_fbcon_zfill_all(dev);

	nouveau_display_init(dev);

	/* Force CLUT to get re-loaded during modeset */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nv_crtc->lut.depth = 0;
	}

	drm_helper_resume_force_mode(dev);

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
		u32 offset = nv_crtc->cursor.nvbo->bo.offset;

		nv_crtc->cursor.set_offset(nv_crtc, offset);
		nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
						 nv_crtc->cursor_saved_y);
	}

	return 0;
}

static struct drm_ioctl_desc nouveau_ioctls[] = {
	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
};

static const struct file_operations nouveau_driver_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = nouveau_ttm_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#if defined(CONFIG_COMPAT)
	.compat_ioctl = nouveau_compat_ioctl,
#endif
	.llseek = noop_llseek,
};

int nouveau_drm_load(struct drm_device *, unsigned long);
int nouveau_drm_unload(struct drm_device *);
int  nouveau_drm_open(struct drm_device *, struct drm_file *);
void nouveau_drm_preclose(struct drm_device *dev, struct drm_file *);
void nouveau_drm_postclose(struct drm_device *, struct drm_file *);

static struct drm_driver driver = {
	.driver_features =
		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
		DRIVER_MODESET | DRIVER_PRIME,
	.load = nouveau_drm_load,
	.firstopen = nouveau_firstopen,
	.lastclose = nouveau_lastclose,
	.unload = nouveau_drm_unload,
	.open = nouveau_drm_open,
	.preclose = nouveau_drm_preclose,
	.postclose = nouveau_drm_postclose,
	.irq_preinstall = nouveau_irq_preinstall,
	.irq_postinstall = nouveau_irq_postinstall,
	.irq_uninstall = nouveau_irq_uninstall,
	.irq_handler = nouveau_irq_handler,
	.get_vblank_counter = drm_vblank_count,
	.enable_vblank = nouveau_vblank_enable,
	.disable_vblank = nouveau_vblank_disable,
	.ioctls = nouveau_ioctls,
	.fops = &nouveau_driver_fops,

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = nouveau_gem_prime_export,
	.gem_prime_import = nouveau_gem_prime_import,

	.gem_init_object = nouveau_gem_object_new,
	.gem_free_object = nouveau_gem_object_del,
	.gem_open_object = nouveau_gem_object_open,
	.gem_close_object = nouveau_gem_object_close,

	.dumb_create = nouveau_display_dumb_create,
	.dumb_map_offset = nouveau_display_dumb_map_offset,
	.dumb_destroy = nouveau_display_dumb_destroy,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
#ifdef GIT_REVISION
	.date = GIT_REVISION,
#else
	.date = DRIVER_DATE,
#endif
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

int __init nouveau_init(struct pci_driver *pdrv)
{
	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);

	if (nouveau_modeset == -1) {
#ifdef CONFIG_VGA_CONSOLE
		if (vgacon_text_force())
			nouveau_modeset = 0;
		else
#endif
			nouveau_modeset = 1;
	}

	if (!nouveau_modeset)
		return 0;

	nouveau_register_dsm_handler();
	return drm_pci_init(&driver, pdrv);
}

void __exit nouveau_exit(struct pci_driver *pdrv)
{
	if (!nouveau_modeset)
		return;

	drm_pci_exit(&driver, pdrv);
	nouveau_unregister_dsm_handler();
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2005 Stephane Marchesin.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*/
	24
	25	#include <linux/console.h>
e0cd3608	26	#include <linux/module.h>
6ee73861 BS	27
	28	#include "drmP.h"
	29	#include "drm.h"
	30	#include "drm_crtc_helper.h"
	31	#include "nouveau_drv.h"
2a259a3d	32	#include "nouveau_abi16.h"
6ee73861 BS	33	#include "nouveau_hw.h"
	34	#include "nouveau_fb.h"
	35	#include "nouveau_fbcon.h"
e193b1d4	36	#include "nouveau_fence.h"
64f1c11a	37	#include "nouveau_pm.h"
6ee73861 BS	38	#include "nv50_display.h"
	39
	40	#include "drm_pciids.h"
	41
6ee73861	42	MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
03bc9675	43	int nouveau_modeset = -1;
6ee73861	44	module_param_named(modeset, nouveau_modeset, int, 0400);
6ee73861 BS	45
6ee73861 BS	46	MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
2dfe36b1	47	int nouveau_vram_notify = 0;
6ee73861 BS	48	module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
6ee73861 BS	49
7ad2d31c BS	50	MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
	51	char *nouveau_vram_type;
	52	module_param_named(vram_type, nouveau_vram_type, charp, 0400);
	53
6ee73861 BS	54	MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
	55	int nouveau_duallink = 1;
	56	module_param_named(duallink, nouveau_duallink, int, 0400);
	57
	58	MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
	59	int nouveau_uscript_lvds = -1;
	60	module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
	61
	62	MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
	63	int nouveau_uscript_tmds = -1;
	64	module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
	65
a1470890 BS	66	MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
	67	int nouveau_ignorelid = 0;
	68	module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
	69
0cba1b76 MK	70	MODULE_PARM_DESC(force_post, "Force POST");
	71	int nouveau_force_post = 0;
	72	module_param_named(force_post, nouveau_force_post, int, 0400);
	73
da647d5b BS	74	MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
	75	int nouveau_override_conntype = 0;
	76	module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
	77
1a5f985c	78	MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
f4053509 BS	79	int nouveau_tv_disable = 0;
	80	module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
	81
6ee73861 BS	82	MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
	83	"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
	84	"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
	85	"\t\tDefault: PAL\n"
	86	"\t\tNOTE Ignored for cards with external TV encoders.");
	87	char *nouveau_tv_norm;
	88	module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
	89
	90	MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
	91	"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
	92	"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
1a5f985c	93	"\t\t0x100 vgaattr, 0x200 EVO (G80+)");
6ee73861 BS	94	int nouveau_reg_debug;
	95	module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
	96
1a5f985c	97	MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
6f876986 BS	98	char *nouveau_perflvl;
	99	module_param_named(perflvl, nouveau_perflvl, charp, 0400);
	100
1a5f985c	101	MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
6f876986 BS	102	int nouveau_perflvl_wr;
	103	module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
	104
1a5f985c	105	MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
35fa2f2a BS	106	int nouveau_msi;
	107	module_param_named(msi, nouveau_msi, int, 0400);
	108
1a5f985c	109	MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
0411de85 BS	110	int nouveau_ctxfw;
	111	module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
	112
1a5f985c	113	MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
b4c26818 BS	114	int nouveau_mxmdcb = 1;
	115	module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
	116
6ee73861 BS	117	int nouveau_fbpercrtc;
	118	#if 0
	119	module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
	120	#endif
	121
6ee73861 BS	122	static struct drm_driver driver;
6ee73861 BS	123
94580299	124	int __devinit
6ee73861 BS	125	nouveau_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
6ee73861 BS	126	{
dcdb1674	127	return drm_get_pci_dev(pdev, ent, &driver);
6ee73861 BS	128	}
6ee73861 BS	129
94580299	130	void
6ee73861 BS	131	nouveau_pci_remove(struct pci_dev *pdev)
	132	{
	133	struct drm_device *dev = pci_get_drvdata(pdev);
	134
	135	drm_put_dev(dev);
	136	}
	137
6a9ee8af	138	int
6ee73861 BS	139	nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
	140	{
	141	struct drm_device *dev = pci_get_drvdata(pdev);
6ee73861	142	struct drm_crtc *crtc;
6ee73861	143
f62b27db BS	144	NV_INFO(dev, "Disabling display...\n");
f62b27db BS	145	nouveau_display_fini(dev);
4bfb94a1	146
81441570	147	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
6ee73861 BS	148	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	149	struct nouveau_framebuffer *nouveau_fb;
	150
	151	nouveau_fb = nouveau_framebuffer(crtc->fb);
	152	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	153	continue;
	154
	155	nouveau_bo_unpin(nouveau_fb->nvbo);
	156	}
	157
b334f2b3 MM	158	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	159	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	160
	161	nouveau_bo_unmap(nv_crtc->cursor.nvbo);
	162	nouveau_bo_unpin(nv_crtc->cursor.nvbo);
	163	}
	164
6ee73861	165	return 0;
6ee73861 BS	166	}
6ee73861 BS	167
6a9ee8af	168	int
6ee73861 BS	169	nouveau_pci_resume(struct pci_dev *pdev)
	170	{
	171	struct drm_device *dev = pci_get_drvdata(pdev);
6ee73861	172	struct drm_crtc *crtc;
ebb945a9	173	int ret;
c88c2e06	174
6ee73861 BS	175	ret = nouveau_run_vbios_init(dev);
	176	if (ret)
	177	return ret;
	178
6ee73861 BS	179	nouveau_irq_postinstall(dev);
6ee73861 BS	180
ebb945a9	181	#if 0
6ee73861 BS	182	/* Re-write SKIPS, they'll have been lost over the suspend */
	183	if (nouveau_vram_pushbuf) {
	184	struct nouveau_channel *chan;
	185	int j;
	186
c420b2dc	187	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
cff5c133	188	chan = dev_priv->channels.ptr[i];
3c8868d3	189	if (!chan \|\| !chan->pushbuf_bo)
6ee73861 BS	190	continue;
	191
	192	for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
	193	nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
	194	}
	195	}
ebb945a9	196	#endif
6ee73861	197
71d91f65 ML	198	nouveau_pm_resume(dev);
71d91f65 ML	199
6ee73861 BS	200	NV_INFO(dev, "Restoring mode...\n");
	201	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	202	struct nouveau_framebuffer *nouveau_fb;
	203
	204	nouveau_fb = nouveau_framebuffer(crtc->fb);
	205	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	206	continue;
	207
	208	nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	209	}
	210
b334f2b3 MM	211	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
b334f2b3 MM	212	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
b334f2b3 MM	213
	214	ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
	215	if (!ret)
	216	ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
	217	if (ret)
	218	NV_ERROR(dev, "Could not pin/map cursor.\n");
	219	}
	220
cf41d53b BS	221	nouveau_fbcon_set_suspend(dev, 0);
	222	nouveau_fbcon_zfill_all(dev);
	223
f62b27db	224	nouveau_display_init(dev);
6ee73861 BS	225
	226	/* Force CLUT to get re-loaded during modeset */
	227	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	228	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	229
	230	nv_crtc->lut.depth = 0;
	231	}
	232
6ee73861	233	drm_helper_resume_force_mode(dev);
38651674	234
a4eaa0a0 ML	235	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	236	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	237	u32 offset = nv_crtc->cursor.nvbo->bo.offset;
	238
	239	nv_crtc->cursor.set_offset(nv_crtc, offset);
	240	nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
	241	nv_crtc->cursor_saved_y);
	242	}
	243
6ee73861 BS	244	return 0;
	245	}
	246
2a259a3d BS	247	static struct drm_ioctl_desc nouveau_ioctls[] = {
	248	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED\|DRM_AUTH),
	249	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED\|DRM_AUTH\|DRM_MASTER\|DRM_ROOT_ONLY),
	250	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED\|DRM_AUTH),
	251	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED\|DRM_AUTH),
	252	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED\|DRM_AUTH),
	253	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED\|DRM_AUTH),
	254	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED\|DRM_AUTH),
	255	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED\|DRM_AUTH),
	256	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED\|DRM_AUTH),
	257	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED\|DRM_AUTH),
	258	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED\|DRM_AUTH),
	259	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED\|DRM_AUTH),
	260	};
	261
e08e96de AV	262	static const struct file_operations nouveau_driver_fops = {
	263	.owner = THIS_MODULE,
	264	.open = drm_open,
	265	.release = drm_release,
	266	.unlocked_ioctl = drm_ioctl,
	267	.mmap = nouveau_ttm_mmap,
	268	.poll = drm_poll,
	269	.fasync = drm_fasync,
	270	.read = drm_read,
	271	#if defined(CONFIG_COMPAT)
	272	.compat_ioctl = nouveau_compat_ioctl,
	273	#endif
	274	.llseek = noop_llseek,
	275	};
	276
94580299 BS	277	int nouveau_drm_load(struct drm_device *, unsigned long);
94580299 BS	278	int nouveau_drm_unload(struct drm_device *);
ebb945a9 BS	279	int nouveau_drm_open(struct drm_device , struct drm_file );
	280	void nouveau_drm_preclose(struct drm_device dev, struct drm_file );
	281	void nouveau_drm_postclose(struct drm_device , struct drm_file );
94580299	282
6ee73861 BS	283	static struct drm_driver driver = {
	284	.driver_features =
	285	DRIVER_USE_AGP \| DRIVER_PCI_DMA \| DRIVER_SG \|
cd0b072f	286	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM \|
22b33e8e	287	DRIVER_MODESET \| DRIVER_PRIME,
94580299	288	.load = nouveau_drm_load,
6ee73861 BS	289	.firstopen = nouveau_firstopen,
6ee73861 BS	290	.lastclose = nouveau_lastclose,
94580299	291	.unload = nouveau_drm_unload,
ebb945a9 BS	292	.open = nouveau_drm_open,
	293	.preclose = nouveau_drm_preclose,
	294	.postclose = nouveau_drm_postclose,
6ee73861 BS	295	.irq_preinstall = nouveau_irq_preinstall,
	296	.irq_postinstall = nouveau_irq_postinstall,
	297	.irq_uninstall = nouveau_irq_uninstall,
	298	.irq_handler = nouveau_irq_handler,
042206c0 FJ	299	.get_vblank_counter = drm_vblank_count,
	300	.enable_vblank = nouveau_vblank_enable,
	301	.disable_vblank = nouveau_vblank_disable,
6ee73861	302	.ioctls = nouveau_ioctls,
e08e96de	303	.fops = &nouveau_driver_fops,
22b33e8e DA	304
	305	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	306	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	307	.gem_prime_export = nouveau_gem_prime_export,
	308	.gem_prime_import = nouveau_gem_prime_import,
	309
6ee73861 BS	310	.gem_init_object = nouveau_gem_object_new,
6ee73861 BS	311	.gem_free_object = nouveau_gem_object_del,
639212d0 BS	312	.gem_open_object = nouveau_gem_object_open,
639212d0 BS	313	.gem_close_object = nouveau_gem_object_close,
6ee73861	314
33dbc27f BS	315	.dumb_create = nouveau_display_dumb_create,
	316	.dumb_map_offset = nouveau_display_dumb_map_offset,
	317	.dumb_destroy = nouveau_display_dumb_destroy,
	318
6ee73861 BS	319	.name = DRIVER_NAME,
	320	.desc = DRIVER_DESC,
	321	#ifdef GIT_REVISION
	322	.date = GIT_REVISION,
	323	#else
	324	.date = DRIVER_DATE,
	325	#endif
	326	.major = DRIVER_MAJOR,
	327	.minor = DRIVER_MINOR,
	328	.patchlevel = DRIVER_PATCHLEVEL,
	329	};
	330
94580299	331	int __init nouveau_init(struct pci_driver *pdrv)
6ee73861	332	{
2a259a3d	333	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
6ee73861 BS	334
	335	if (nouveau_modeset == -1) {
	336	#ifdef CONFIG_VGA_CONSOLE
	337	if (vgacon_text_force())
	338	nouveau_modeset = 0;
	339	else
	340	#endif
	341	nouveau_modeset = 1;
	342	}
	343
cd0b072f BS	344	if (!nouveau_modeset)
cd0b072f BS	345	return 0;
6ee73861	346
cd0b072f	347	nouveau_register_dsm_handler();
94580299	348	return drm_pci_init(&driver, pdrv);
6ee73861 BS	349	}
6ee73861 BS	350
94580299	351	void __exit nouveau_exit(struct pci_driver *pdrv)
6ee73861	352	{
cd0b072f BS	353	if (!nouveau_modeset)
	354	return;
	355
94580299	356	drm_pci_exit(&driver, pdrv);
6a9ee8af	357	nouveau_unregister_dsm_handler();
6ee73861	358	}