drm/nouveau: no need to zero dma objects, we fill them completely anyway
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_gem.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Ben Skeggs.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26#include "drmP.h"
27#include "drm.h"
28
29#include "nouveau_drv.h"
30#include "nouveau_drm.h"
31#include "nouveau_dma.h"
32
33#define nouveau_gem_pushbuf_sync(chan) 0
34
35int
36nouveau_gem_object_new(struct drm_gem_object *gem)
37{
38 return 0;
39}
40
41void
42nouveau_gem_object_del(struct drm_gem_object *gem)
43{
44 struct nouveau_bo *nvbo = gem->driver_private;
45 struct ttm_buffer_object *bo = &nvbo->bo;
46
47 if (!nvbo)
48 return;
49 nvbo->gem = NULL;
50
6ee73861
BS
51 if (unlikely(nvbo->pin_refcnt)) {
52 nvbo->pin_refcnt = 1;
53 nouveau_bo_unpin(nvbo);
54 }
55
56 ttm_bo_unref(&bo);
fd632aa3
DV
57
58 drm_gem_object_release(gem);
59 kfree(gem);
6ee73861
BS
60}
61
62int
63nouveau_gem_new(struct drm_device *dev, struct nouveau_channel *chan,
64 int size, int align, uint32_t flags, uint32_t tile_mode,
65 uint32_t tile_flags, bool no_vm, bool mappable,
66 struct nouveau_bo **pnvbo)
67{
68 struct nouveau_bo *nvbo;
69 int ret;
70
71 ret = nouveau_bo_new(dev, chan, size, align, flags, tile_mode,
72 tile_flags, no_vm, mappable, pnvbo);
73 if (ret)
74 return ret;
75 nvbo = *pnvbo;
76
77 nvbo->gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
78 if (!nvbo->gem) {
79 nouveau_bo_ref(NULL, pnvbo);
80 return -ENOMEM;
81 }
82
83 nvbo->bo.persistant_swap_storage = nvbo->gem->filp;
84 nvbo->gem->driver_private = nvbo;
85 return 0;
86}
87
88static int
89nouveau_gem_info(struct drm_gem_object *gem, struct drm_nouveau_gem_info *rep)
90{
91 struct nouveau_bo *nvbo = nouveau_gem_object(gem);
92
93 if (nvbo->bo.mem.mem_type == TTM_PL_TT)
94 rep->domain = NOUVEAU_GEM_DOMAIN_GART;
95 else
96 rep->domain = NOUVEAU_GEM_DOMAIN_VRAM;
97
98 rep->size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
99 rep->offset = nvbo->bo.offset;
100 rep->map_handle = nvbo->mappable ? nvbo->bo.addr_space_offset : 0;
101 rep->tile_mode = nvbo->tile_mode;
102 rep->tile_flags = nvbo->tile_flags;
103 return 0;
104}
105
106static bool
f13b3263
FJ
107nouveau_gem_tile_flags_valid(struct drm_device *dev, uint32_t tile_flags)
108{
109 struct drm_nouveau_private *dev_priv = dev->dev_private;
110
111 if (dev_priv->card_type >= NV_50) {
112 switch (tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK) {
113 case 0x0000:
114 case 0x1800:
115 case 0x2800:
116 case 0x4800:
117 case 0x7000:
118 case 0x7400:
119 case 0x7a00:
120 case 0xe000:
121 return true;
122 }
123 } else {
124 if (!(tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK))
125 return true;
6ee73861
BS
126 }
127
f13b3263
FJ
128 NV_ERROR(dev, "bad page flags: 0x%08x\n", tile_flags);
129 return false;
6ee73861
BS
130}
131
132int
133nouveau_gem_ioctl_new(struct drm_device *dev, void *data,
134 struct drm_file *file_priv)
135{
136 struct drm_nouveau_private *dev_priv = dev->dev_private;
137 struct drm_nouveau_gem_new *req = data;
138 struct nouveau_bo *nvbo = NULL;
139 struct nouveau_channel *chan = NULL;
140 uint32_t flags = 0;
141 int ret = 0;
142
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BS
143 if (unlikely(dev_priv->ttm.bdev.dev_mapping == NULL))
144 dev_priv->ttm.bdev.dev_mapping = dev_priv->dev->dev_mapping;
145
6ee73861
BS
146 if (req->info.domain & NOUVEAU_GEM_DOMAIN_VRAM)
147 flags |= TTM_PL_FLAG_VRAM;
148 if (req->info.domain & NOUVEAU_GEM_DOMAIN_GART)
149 flags |= TTM_PL_FLAG_TT;
150 if (!flags || req->info.domain & NOUVEAU_GEM_DOMAIN_CPU)
151 flags |= TTM_PL_FLAG_SYSTEM;
152
153 if (!nouveau_gem_tile_flags_valid(dev, req->info.tile_flags))
154 return -EINVAL;
155
cff5c133
BS
156 if (req->channel_hint) {
157 chan = nouveau_channel_get(dev, file_priv, req->channel_hint);
158 if (IS_ERR(chan))
159 return PTR_ERR(chan);
160 }
161
6ee73861
BS
162 ret = nouveau_gem_new(dev, chan, req->info.size, req->align, flags,
163 req->info.tile_mode, req->info.tile_flags, false,
164 (req->info.domain & NOUVEAU_GEM_DOMAIN_MAPPABLE),
165 &nvbo);
cff5c133
BS
166 if (chan)
167 nouveau_channel_put(&chan);
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168 if (ret)
169 return ret;
170
171 ret = nouveau_gem_info(nvbo->gem, &req->info);
172 if (ret)
173 goto out;
174
175 ret = drm_gem_handle_create(file_priv, nvbo->gem, &req->info.handle);
29d08b3e
DA
176 /* drop reference from allocate - handle holds it now */
177 drm_gem_object_unreference_unlocked(nvbo->gem);
6ee73861 178out:
6ee73861
BS
179 return ret;
180}
181
182static int
183nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
184 uint32_t write_domains, uint32_t valid_domains)
185{
186 struct nouveau_bo *nvbo = gem->driver_private;
187 struct ttm_buffer_object *bo = &nvbo->bo;
78ad0f7b
FJ
188 uint32_t domains = valid_domains &
189 (write_domains ? write_domains : read_domains);
190 uint32_t pref_flags = 0, valid_flags = 0;
6ee73861 191
78ad0f7b 192 if (!domains)
6ee73861
BS
193 return -EINVAL;
194
78ad0f7b
FJ
195 if (valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
196 valid_flags |= TTM_PL_FLAG_VRAM;
197
198 if (valid_domains & NOUVEAU_GEM_DOMAIN_GART)
199 valid_flags |= TTM_PL_FLAG_TT;
200
201 if ((domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
202 bo->mem.mem_type == TTM_PL_VRAM)
203 pref_flags |= TTM_PL_FLAG_VRAM;
204
205 else if ((domains & NOUVEAU_GEM_DOMAIN_GART) &&
206 bo->mem.mem_type == TTM_PL_TT)
207 pref_flags |= TTM_PL_FLAG_TT;
208
209 else if (domains & NOUVEAU_GEM_DOMAIN_VRAM)
210 pref_flags |= TTM_PL_FLAG_VRAM;
211
212 else
213 pref_flags |= TTM_PL_FLAG_TT;
214
215 nouveau_bo_placement_set(nvbo, pref_flags, valid_flags);
6ee73861 216
6ee73861
BS
217 return 0;
218}
219
220struct validate_op {
6ee73861
BS
221 struct list_head vram_list;
222 struct list_head gart_list;
223 struct list_head both_list;
224};
225
226static void
227validate_fini_list(struct list_head *list, struct nouveau_fence *fence)
228{
229 struct list_head *entry, *tmp;
230 struct nouveau_bo *nvbo;
231
232 list_for_each_safe(entry, tmp, list) {
233 nvbo = list_entry(entry, struct nouveau_bo, entry);
332b242f
FJ
234
235 nouveau_bo_fence(nvbo, fence);
6ee73861 236
a1606a95
BS
237 if (unlikely(nvbo->validate_mapped)) {
238 ttm_bo_kunmap(&nvbo->kmap);
239 nvbo->validate_mapped = false;
240 }
241
6ee73861
BS
242 list_del(&nvbo->entry);
243 nvbo->reserved_by = NULL;
244 ttm_bo_unreserve(&nvbo->bo);
374c3af8 245 drm_gem_object_unreference_unlocked(nvbo->gem);
6ee73861
BS
246 }
247}
248
249static void
234896a7 250validate_fini(struct validate_op *op, struct nouveau_fence* fence)
6ee73861 251{
234896a7
LB
252 validate_fini_list(&op->vram_list, fence);
253 validate_fini_list(&op->gart_list, fence);
254 validate_fini_list(&op->both_list, fence);
6ee73861
BS
255}
256
257static int
258validate_init(struct nouveau_channel *chan, struct drm_file *file_priv,
259 struct drm_nouveau_gem_pushbuf_bo *pbbo,
260 int nr_buffers, struct validate_op *op)
261{
262 struct drm_device *dev = chan->dev;
263 struct drm_nouveau_private *dev_priv = dev->dev_private;
264 uint32_t sequence;
265 int trycnt = 0;
266 int ret, i;
267
268 sequence = atomic_add_return(1, &dev_priv->ttm.validate_sequence);
269retry:
270 if (++trycnt > 100000) {
271 NV_ERROR(dev, "%s failed and gave up.\n", __func__);
272 return -EINVAL;
273 }
274
275 for (i = 0; i < nr_buffers; i++) {
276 struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[i];
277 struct drm_gem_object *gem;
278 struct nouveau_bo *nvbo;
279
280 gem = drm_gem_object_lookup(dev, file_priv, b->handle);
281 if (!gem) {
282 NV_ERROR(dev, "Unknown handle 0x%08x\n", b->handle);
283 validate_fini(op, NULL);
bf79cb91 284 return -ENOENT;
6ee73861
BS
285 }
286 nvbo = gem->driver_private;
287
288 if (nvbo->reserved_by && nvbo->reserved_by == file_priv) {
289 NV_ERROR(dev, "multiple instances of buffer %d on "
290 "validation list\n", b->handle);
291 validate_fini(op, NULL);
292 return -EINVAL;
293 }
294
938c40ed 295 ret = ttm_bo_reserve(&nvbo->bo, true, false, true, sequence);
6ee73861
BS
296 if (ret) {
297 validate_fini(op, NULL);
938c40ed
BS
298 if (unlikely(ret == -EAGAIN))
299 ret = ttm_bo_wait_unreserved(&nvbo->bo, true);
374c3af8 300 drm_gem_object_unreference_unlocked(gem);
938c40ed
BS
301 if (unlikely(ret)) {
302 if (ret != -ERESTARTSYS)
303 NV_ERROR(dev, "fail reserve\n");
6ee73861 304 return ret;
a1606a95 305 }
6ee73861
BS
306 goto retry;
307 }
308
a1606a95 309 b->user_priv = (uint64_t)(unsigned long)nvbo;
6ee73861
BS
310 nvbo->reserved_by = file_priv;
311 nvbo->pbbo_index = i;
312 if ((b->valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
313 (b->valid_domains & NOUVEAU_GEM_DOMAIN_GART))
314 list_add_tail(&nvbo->entry, &op->both_list);
315 else
316 if (b->valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
317 list_add_tail(&nvbo->entry, &op->vram_list);
318 else
319 if (b->valid_domains & NOUVEAU_GEM_DOMAIN_GART)
320 list_add_tail(&nvbo->entry, &op->gart_list);
321 else {
322 NV_ERROR(dev, "invalid valid domains: 0x%08x\n",
323 b->valid_domains);
0208843d 324 list_add_tail(&nvbo->entry, &op->both_list);
6ee73861
BS
325 validate_fini(op, NULL);
326 return -EINVAL;
327 }
6ee73861
BS
328 }
329
330 return 0;
331}
332
333static int
334validate_list(struct nouveau_channel *chan, struct list_head *list,
335 struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr)
336{
337 struct drm_nouveau_gem_pushbuf_bo __user *upbbo =
338 (void __force __user *)(uintptr_t)user_pbbo_ptr;
a1606a95 339 struct drm_device *dev = chan->dev;
6ee73861
BS
340 struct nouveau_bo *nvbo;
341 int ret, relocs = 0;
342
343 list_for_each_entry(nvbo, list, entry) {
344 struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index];
6ee73861 345
2730723b 346 ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan);
415e6186
BS
347 if (unlikely(ret)) {
348 NV_ERROR(dev, "fail pre-validate sync\n");
349 return ret;
6ee73861
BS
350 }
351
352 ret = nouveau_gem_set_domain(nvbo->gem, b->read_domains,
353 b->write_domains,
354 b->valid_domains);
a1606a95
BS
355 if (unlikely(ret)) {
356 NV_ERROR(dev, "fail set_domain\n");
6ee73861 357 return ret;
a1606a95 358 }
6ee73861 359
415e6186 360 nvbo->channel = (b->read_domains & (1 << 31)) ? NULL : chan;
6ee73861 361 ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
938c40ed 362 true, false, false);
6ee73861 363 nvbo->channel = NULL;
a1606a95 364 if (unlikely(ret)) {
938c40ed
BS
365 if (ret != -ERESTARTSYS)
366 NV_ERROR(dev, "fail ttm_validate\n");
6ee73861 367 return ret;
a1606a95 368 }
6ee73861 369
2730723b 370 ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan);
415e6186
BS
371 if (unlikely(ret)) {
372 NV_ERROR(dev, "fail post-validate sync\n");
373 return ret;
374 }
375
a1606a95 376 if (nvbo->bo.offset == b->presumed.offset &&
6ee73861 377 ((nvbo->bo.mem.mem_type == TTM_PL_VRAM &&
a1606a95 378 b->presumed.domain & NOUVEAU_GEM_DOMAIN_VRAM) ||
6ee73861 379 (nvbo->bo.mem.mem_type == TTM_PL_TT &&
a1606a95 380 b->presumed.domain & NOUVEAU_GEM_DOMAIN_GART)))
6ee73861
BS
381 continue;
382
383 if (nvbo->bo.mem.mem_type == TTM_PL_TT)
a1606a95 384 b->presumed.domain = NOUVEAU_GEM_DOMAIN_GART;
6ee73861 385 else
a1606a95
BS
386 b->presumed.domain = NOUVEAU_GEM_DOMAIN_VRAM;
387 b->presumed.offset = nvbo->bo.offset;
388 b->presumed.valid = 0;
6ee73861
BS
389 relocs++;
390
a1606a95
BS
391 if (DRM_COPY_TO_USER(&upbbo[nvbo->pbbo_index].presumed,
392 &b->presumed, sizeof(b->presumed)))
6ee73861
BS
393 return -EFAULT;
394 }
395
396 return relocs;
397}
398
399static int
400nouveau_gem_pushbuf_validate(struct nouveau_channel *chan,
401 struct drm_file *file_priv,
402 struct drm_nouveau_gem_pushbuf_bo *pbbo,
403 uint64_t user_buffers, int nr_buffers,
404 struct validate_op *op, int *apply_relocs)
405{
a1606a95 406 struct drm_device *dev = chan->dev;
6ee73861
BS
407 int ret, relocs = 0;
408
409 INIT_LIST_HEAD(&op->vram_list);
410 INIT_LIST_HEAD(&op->gart_list);
411 INIT_LIST_HEAD(&op->both_list);
412
6ee73861
BS
413 if (nr_buffers == 0)
414 return 0;
415
416 ret = validate_init(chan, file_priv, pbbo, nr_buffers, op);
a1606a95 417 if (unlikely(ret)) {
938c40ed
BS
418 if (ret != -ERESTARTSYS)
419 NV_ERROR(dev, "validate_init\n");
6ee73861 420 return ret;
a1606a95 421 }
6ee73861
BS
422
423 ret = validate_list(chan, &op->vram_list, pbbo, user_buffers);
424 if (unlikely(ret < 0)) {
938c40ed
BS
425 if (ret != -ERESTARTSYS)
426 NV_ERROR(dev, "validate vram_list\n");
6ee73861
BS
427 validate_fini(op, NULL);
428 return ret;
429 }
430 relocs += ret;
431
432 ret = validate_list(chan, &op->gart_list, pbbo, user_buffers);
433 if (unlikely(ret < 0)) {
938c40ed
BS
434 if (ret != -ERESTARTSYS)
435 NV_ERROR(dev, "validate gart_list\n");
6ee73861
BS
436 validate_fini(op, NULL);
437 return ret;
438 }
439 relocs += ret;
440
441 ret = validate_list(chan, &op->both_list, pbbo, user_buffers);
442 if (unlikely(ret < 0)) {
938c40ed
BS
443 if (ret != -ERESTARTSYS)
444 NV_ERROR(dev, "validate both_list\n");
6ee73861
BS
445 validate_fini(op, NULL);
446 return ret;
447 }
448 relocs += ret;
449
450 *apply_relocs = relocs;
451 return 0;
452}
453
454static inline void *
455u_memcpya(uint64_t user, unsigned nmemb, unsigned size)
456{
457 void *mem;
458 void __user *userptr = (void __force __user *)(uintptr_t)user;
459
460 mem = kmalloc(nmemb * size, GFP_KERNEL);
461 if (!mem)
462 return ERR_PTR(-ENOMEM);
463
464 if (DRM_COPY_FROM_USER(mem, userptr, nmemb * size)) {
465 kfree(mem);
466 return ERR_PTR(-EFAULT);
467 }
468
469 return mem;
470}
471
472static int
a1606a95
BS
473nouveau_gem_pushbuf_reloc_apply(struct drm_device *dev,
474 struct drm_nouveau_gem_pushbuf *req,
475 struct drm_nouveau_gem_pushbuf_bo *bo)
6ee73861
BS
476{
477 struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL;
12f735b7
LB
478 int ret = 0;
479 unsigned i;
6ee73861 480
a1606a95 481 reloc = u_memcpya(req->relocs, req->nr_relocs, sizeof(*reloc));
6ee73861
BS
482 if (IS_ERR(reloc))
483 return PTR_ERR(reloc);
484
a1606a95 485 for (i = 0; i < req->nr_relocs; i++) {
6ee73861
BS
486 struct drm_nouveau_gem_pushbuf_reloc *r = &reloc[i];
487 struct drm_nouveau_gem_pushbuf_bo *b;
a1606a95 488 struct nouveau_bo *nvbo;
6ee73861
BS
489 uint32_t data;
490
a1606a95
BS
491 if (unlikely(r->bo_index > req->nr_buffers)) {
492 NV_ERROR(dev, "reloc bo index invalid\n");
6ee73861
BS
493 ret = -EINVAL;
494 break;
495 }
496
497 b = &bo[r->bo_index];
a1606a95 498 if (b->presumed.valid)
6ee73861
BS
499 continue;
500
a1606a95
BS
501 if (unlikely(r->reloc_bo_index > req->nr_buffers)) {
502 NV_ERROR(dev, "reloc container bo index invalid\n");
503 ret = -EINVAL;
504 break;
505 }
506 nvbo = (void *)(unsigned long)bo[r->reloc_bo_index].user_priv;
507
508 if (unlikely(r->reloc_bo_offset + 4 >
509 nvbo->bo.mem.num_pages << PAGE_SHIFT)) {
510 NV_ERROR(dev, "reloc outside of bo\n");
511 ret = -EINVAL;
512 break;
513 }
514
515 if (!nvbo->kmap.virtual) {
516 ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages,
517 &nvbo->kmap);
518 if (ret) {
519 NV_ERROR(dev, "failed kmap for reloc\n");
520 break;
521 }
522 nvbo->validate_mapped = true;
523 }
524
6ee73861 525 if (r->flags & NOUVEAU_GEM_RELOC_LOW)
a1606a95 526 data = b->presumed.offset + r->data;
6ee73861
BS
527 else
528 if (r->flags & NOUVEAU_GEM_RELOC_HIGH)
a1606a95 529 data = (b->presumed.offset + r->data) >> 32;
6ee73861
BS
530 else
531 data = r->data;
532
533 if (r->flags & NOUVEAU_GEM_RELOC_OR) {
a1606a95 534 if (b->presumed.domain == NOUVEAU_GEM_DOMAIN_GART)
6ee73861
BS
535 data |= r->tor;
536 else
537 data |= r->vor;
538 }
539
702adba2 540 spin_lock(&nvbo->bo.bdev->fence_lock);
a1606a95 541 ret = ttm_bo_wait(&nvbo->bo, false, false, false);
702adba2 542 spin_unlock(&nvbo->bo.bdev->fence_lock);
a1606a95
BS
543 if (ret) {
544 NV_ERROR(dev, "reloc wait_idle failed: %d\n", ret);
545 break;
546 }
a1606a95
BS
547
548 nouveau_bo_wr32(nvbo, r->reloc_bo_offset >> 2, data);
6ee73861
BS
549 }
550
551 kfree(reloc);
552 return ret;
553}
554
555int
556nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
557 struct drm_file *file_priv)
558{
a1606a95 559 struct drm_nouveau_private *dev_priv = dev->dev_private;
6ee73861 560 struct drm_nouveau_gem_pushbuf *req = data;
a1606a95
BS
561 struct drm_nouveau_gem_pushbuf_push *push;
562 struct drm_nouveau_gem_pushbuf_bo *bo;
6ee73861
BS
563 struct nouveau_channel *chan;
564 struct validate_op op;
6e86e041 565 struct nouveau_fence *fence = NULL;
a1606a95 566 int i, j, ret = 0, do_reloc = 0;
6ee73861 567
cff5c133
BS
568 chan = nouveau_channel_get(dev, file_priv, req->channel);
569 if (IS_ERR(chan))
570 return PTR_ERR(chan);
6ee73861 571
a1606a95
BS
572 req->vram_available = dev_priv->fb_aper_free;
573 req->gart_available = dev_priv->gart_info.aper_free;
574 if (unlikely(req->nr_push == 0))
575 goto out_next;
6ee73861 576
a1606a95
BS
577 if (unlikely(req->nr_push > NOUVEAU_GEM_MAX_PUSH)) {
578 NV_ERROR(dev, "pushbuf push count exceeds limit: %d max %d\n",
579 req->nr_push, NOUVEAU_GEM_MAX_PUSH);
cff5c133 580 nouveau_channel_put(&chan);
a1606a95 581 return -EINVAL;
6ee73861
BS
582 }
583
a1606a95
BS
584 if (unlikely(req->nr_buffers > NOUVEAU_GEM_MAX_BUFFERS)) {
585 NV_ERROR(dev, "pushbuf bo count exceeds limit: %d max %d\n",
586 req->nr_buffers, NOUVEAU_GEM_MAX_BUFFERS);
cff5c133 587 nouveau_channel_put(&chan);
a1606a95 588 return -EINVAL;
6ee73861
BS
589 }
590
a1606a95
BS
591 if (unlikely(req->nr_relocs > NOUVEAU_GEM_MAX_RELOCS)) {
592 NV_ERROR(dev, "pushbuf reloc count exceeds limit: %d max %d\n",
593 req->nr_relocs, NOUVEAU_GEM_MAX_RELOCS);
cff5c133 594 nouveau_channel_put(&chan);
6ee73861
BS
595 return -EINVAL;
596 }
597
a1606a95 598 push = u_memcpya(req->push, req->nr_push, sizeof(*push));
cff5c133
BS
599 if (IS_ERR(push)) {
600 nouveau_channel_put(&chan);
a1606a95 601 return PTR_ERR(push);
cff5c133 602 }
a1606a95 603
6ee73861 604 bo = u_memcpya(req->buffers, req->nr_buffers, sizeof(*bo));
a1606a95
BS
605 if (IS_ERR(bo)) {
606 kfree(push);
cff5c133 607 nouveau_channel_put(&chan);
6ee73861 608 return PTR_ERR(bo);
a1606a95 609 }
6ee73861 610
415e6186
BS
611 /* Mark push buffers as being used on PFIFO, the validation code
612 * will then make sure that if the pushbuf bo moves, that they
613 * happen on the kernel channel, which will in turn cause a sync
614 * to happen before we try and submit the push buffer.
615 */
616 for (i = 0; i < req->nr_push; i++) {
617 if (push[i].bo_index >= req->nr_buffers) {
618 NV_ERROR(dev, "push %d buffer not in list\n", i);
619 ret = -EINVAL;
620 goto out;
621 }
622
623 bo[push[i].bo_index].read_domains |= (1 << 31);
624 }
625
6ee73861
BS
626 /* Validate buffer list */
627 ret = nouveau_gem_pushbuf_validate(chan, file_priv, bo, req->buffers,
628 req->nr_buffers, &op, &do_reloc);
629 if (ret) {
938c40ed
BS
630 if (ret != -ERESTARTSYS)
631 NV_ERROR(dev, "validate: %d\n", ret);
6ee73861
BS
632 goto out;
633 }
634
6ee73861
BS
635 /* Apply any relocations that are required */
636 if (do_reloc) {
a1606a95 637 ret = nouveau_gem_pushbuf_reloc_apply(dev, req, bo);
6ee73861 638 if (ret) {
6ee73861 639 NV_ERROR(dev, "reloc apply: %d\n", ret);
6ee73861
BS
640 goto out;
641 }
6ee73861 642 }
6ee73861 643
9a391ad8 644 if (chan->dma.ib_max) {
a1606a95 645 ret = nouveau_dma_wait(chan, req->nr_push + 1, 6);
6ee73861 646 if (ret) {
9a391ad8 647 NV_INFO(dev, "nv50cal_space: %d\n", ret);
6ee73861
BS
648 goto out;
649 }
6ee73861 650
a1606a95
BS
651 for (i = 0; i < req->nr_push; i++) {
652 struct nouveau_bo *nvbo = (void *)(unsigned long)
653 bo[push[i].bo_index].user_priv;
654
655 nv50_dma_push(chan, nvbo, push[i].offset,
656 push[i].length);
657 }
9a391ad8 658 } else
ee508b82 659 if (dev_priv->chipset >= 0x25) {
a1606a95 660 ret = RING_SPACE(chan, req->nr_push * 2);
6ee73861
BS
661 if (ret) {
662 NV_ERROR(dev, "cal_space: %d\n", ret);
663 goto out;
664 }
a1606a95
BS
665
666 for (i = 0; i < req->nr_push; i++) {
667 struct nouveau_bo *nvbo = (void *)(unsigned long)
668 bo[push[i].bo_index].user_priv;
669 struct drm_mm_node *mem = nvbo->bo.mem.mm_node;
670
671 OUT_RING(chan, ((mem->start << PAGE_SHIFT) +
672 push[i].offset) | 2);
673 OUT_RING(chan, 0);
674 }
6ee73861 675 } else {
a1606a95 676 ret = RING_SPACE(chan, req->nr_push * (2 + NOUVEAU_DMA_SKIPS));
6ee73861
BS
677 if (ret) {
678 NV_ERROR(dev, "jmp_space: %d\n", ret);
679 goto out;
680 }
6ee73861 681
a1606a95
BS
682 for (i = 0; i < req->nr_push; i++) {
683 struct nouveau_bo *nvbo = (void *)(unsigned long)
684 bo[push[i].bo_index].user_priv;
685 struct drm_mm_node *mem = nvbo->bo.mem.mm_node;
686 uint32_t cmd;
687
688 cmd = chan->pushbuf_base + ((chan->dma.cur + 2) << 2);
689 cmd |= 0x20000000;
690 if (unlikely(cmd != req->suffix0)) {
691 if (!nvbo->kmap.virtual) {
692 ret = ttm_bo_kmap(&nvbo->bo, 0,
693 nvbo->bo.mem.
694 num_pages,
695 &nvbo->kmap);
696 if (ret) {
697 WIND_RING(chan);
698 goto out;
699 }
700 nvbo->validate_mapped = true;
701 }
702
703 nouveau_bo_wr32(nvbo, (push[i].offset +
704 push[i].length - 8) / 4, cmd);
705 }
706
707 OUT_RING(chan, ((mem->start << PAGE_SHIFT) +
708 push[i].offset) | 0x20000000);
6ee73861 709 OUT_RING(chan, 0);
a1606a95
BS
710 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
711 OUT_RING(chan, 0);
712 }
6ee73861
BS
713 }
714
234896a7 715 ret = nouveau_fence_new(chan, &fence, true);
6ee73861
BS
716 if (ret) {
717 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
718 WIND_RING(chan);
719 goto out;
720 }
721
722out:
234896a7 723 validate_fini(&op, fence);
382d62e5 724 nouveau_fence_unref(&fence);
6ee73861 725 kfree(bo);
a1606a95 726 kfree(push);
6ee73861
BS
727
728out_next:
9a391ad8
BS
729 if (chan->dma.ib_max) {
730 req->suffix0 = 0x00000000;
731 req->suffix1 = 0x00000000;
732 } else
ee508b82 733 if (dev_priv->chipset >= 0x25) {
6ee73861
BS
734 req->suffix0 = 0x00020000;
735 req->suffix1 = 0x00000000;
736 } else {
737 req->suffix0 = 0x20000000 |
738 (chan->pushbuf_base + ((chan->dma.cur + 2) << 2));
739 req->suffix1 = 0x00000000;
740 }
741
cff5c133 742 nouveau_channel_put(&chan);
6ee73861
BS
743 return ret;
744}
745
6ee73861
BS
746static inline uint32_t
747domain_to_ttm(struct nouveau_bo *nvbo, uint32_t domain)
748{
749 uint32_t flags = 0;
750
751 if (domain & NOUVEAU_GEM_DOMAIN_VRAM)
752 flags |= TTM_PL_FLAG_VRAM;
753 if (domain & NOUVEAU_GEM_DOMAIN_GART)
754 flags |= TTM_PL_FLAG_TT;
755
756 return flags;
757}
758
6ee73861
BS
759int
760nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
761 struct drm_file *file_priv)
762{
763 struct drm_nouveau_gem_cpu_prep *req = data;
764 struct drm_gem_object *gem;
765 struct nouveau_bo *nvbo;
766 bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT);
767 int ret = -EINVAL;
768
6ee73861
BS
769 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
770 if (!gem)
bf79cb91 771 return -ENOENT;
6ee73861
BS
772 nvbo = nouveau_gem_object(gem);
773
21e86c1c
BS
774 spin_lock(&nvbo->bo.bdev->fence_lock);
775 ret = ttm_bo_wait(&nvbo->bo, true, true, no_wait);
776 spin_unlock(&nvbo->bo.bdev->fence_lock);
bc9025bd 777 drm_gem_object_unreference_unlocked(gem);
6ee73861
BS
778 return ret;
779}
780
781int
782nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data,
783 struct drm_file *file_priv)
784{
21e86c1c 785 return 0;
6ee73861
BS
786}
787
788int
789nouveau_gem_ioctl_info(struct drm_device *dev, void *data,
790 struct drm_file *file_priv)
791{
792 struct drm_nouveau_gem_info *req = data;
793 struct drm_gem_object *gem;
794 int ret;
795
6ee73861
BS
796 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
797 if (!gem)
bf79cb91 798 return -ENOENT;
6ee73861
BS
799
800 ret = nouveau_gem_info(gem, req);
bc9025bd 801 drm_gem_object_unreference_unlocked(gem);
6ee73861
BS
802 return ret;
803}
804
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