[deliverable/linux.git] / drivers / gpu / drm / nouveau / nvkm / engine / device / gk104.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include "priv.h"

#include <subdev/bios.h>
#include <subdev/bus.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/fuse.h>
#include <subdev/clk.h>
#include <subdev/therm.h>
#include <subdev/mxm.h>
#include <subdev/devinit.h>
#include <subdev/mc.h>
#include <subdev/timer.h>
#include <subdev/fb.h>
#include <subdev/ltc.h>
#include <subdev/ibus.h>
#include <subdev/instmem.h>
#include <subdev/mmu.h>
#include <subdev/bar.h>
#include <subdev/pmu.h>
#include <subdev/volt.h>

#include <engine/dmaobj.h>
#include <engine/fifo.h>
#include <engine/sw.h>
#include <engine/gr.h>
#include <engine/disp.h>
#include <engine/ce.h>
#include <engine/bsp.h>
#include <engine/msvld.h>
#include <engine/mspdec.h>
#include <engine/msppp.h>
#include <engine/pm.h>

int
gk104_identify(struct nvkm_device *device)
{
	switch (device->chipset) {
	case 0xe4:
		device->cname = "GK104";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk104_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		device->oclass[NVDEV_ENGINE_PM     ] = &gk104_pm_oclass;
		break;
	case 0xe7:
		device->cname = "GK107";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk104_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		device->oclass[NVDEV_ENGINE_PM     ] = &gk104_pm_oclass;
		break;
	case 0xe6:
		device->cname = "GK106";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk104_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		device->oclass[NVDEV_ENGINE_PM     ] = &gk104_pm_oclass;
		break;
	case 0xea:
		device->cname = "GK20A";
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk20a_clk_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk20a_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk20a_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gk20a_bar_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_PM     ] = &gk104_pm_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk20a_pmu_oclass;
		break;
	case 0xf0:
		device->cname = "GK110";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk110_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		device->oclass[NVDEV_ENGINE_PM     ] = &gk110_pm_oclass;
		break;
	case 0xf1:
		device->cname = "GK110B";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gf110_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		device->oclass[NVDEV_ENGINE_PM     ] = &gk110_pm_oclass;
		break;
	case 0x106:
		device->cname = "GK208B";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk208_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		break;
	case 0x108:
		device->cname = "GK208";
		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nvkm_bios_oclass;
		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk104_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] =  gk104_fb_oclass;
		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk104_ibus_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;
		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] =  gk208_gr_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;
		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
		break;
	default:
		nv_fatal(device, "unknown Kepler chipset\n");
		return -EINVAL;
	}

	return 0;
}
Commit	Line	Data
9274f4a9 BS	1	/*
	2	* Copyright 2012 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs
	23	*/
9719047b	24	#include "priv.h"
9274f4a9	25
70c0f263	26	#include <subdev/bios.h>
a10220bb	27	#include <subdev/bus.h>
e0996aea	28	#include <subdev/gpio.h>
4196faa8	29	#include <subdev/i2c.h>
3ca6cd43	30	#include <subdev/fuse.h>
f3867f43	31	#include <subdev/clk.h>
aa1b9b48	32	#include <subdev/therm.h>
d38ac521	33	#include <subdev/mxm.h>
cb75d97e	34	#include <subdev/devinit.h>
7d9115de	35	#include <subdev/mc.h>
5a5c7432	36	#include <subdev/timer.h>
861d2107	37	#include <subdev/fb.h>
95484b57	38	#include <subdev/ltc.h>
2c1a425e	39	#include <subdev/ibus.h>
3863c9bc	40	#include <subdev/instmem.h>
5ce3bf3c	41	#include <subdev/mmu.h>
3863c9bc	42	#include <subdev/bar.h>
ebb58dc2	43	#include <subdev/pmu.h>
c9c0ccae	44	#include <subdev/volt.h>
9274f4a9	45
ebb945a9 BS	46	#include <engine/dmaobj.h>
ebb945a9 BS	47	#include <engine/fifo.h>
8700287b	48	#include <engine/sw.h>
b8bf04e1	49	#include <engine/gr.h>
ebb945a9	50	#include <engine/disp.h>
aedf24ff	51	#include <engine/ce.h>
b2f04fc6	52	#include <engine/bsp.h>
eccf7e8a	53	#include <engine/msvld.h>
37a5d028	54	#include <engine/mspdec.h>
fd8666f7	55	#include <engine/msppp.h>
d5752b9b	56	#include <engine/pm.h>
ebb945a9	57
9274f4a9	58	int
9719047b	59	gk104_identify(struct nvkm_device *device)
9274f4a9 BS	60	{
	61	switch (device->chipset) {
	62	case 0xe4:
2094dd82	63	device->cname = "GK104";
9719047b	64	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	65	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	66	device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
3ca6cd43	67	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	68	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	69	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
d38ac521	70	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	71	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
d7e5fcd2	72	device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
5f8824de	73	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
5a5c7432	74	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	75	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
95484b57	76	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	77	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
24a4ae86	78	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	79	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	80	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
ebb58dc2	81	device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
c9c0ccae	82	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	83	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	84	device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
f84aff4e	85	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
e3c71eb2	86	device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass;
878da15a	87	device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass;
bd6c5cab BS	88	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	89	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	90	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	91	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	92	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	93	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
4d34686e	94	device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
9274f4a9 BS	95	break;
9274f4a9 BS	96	case 0xe7:
2094dd82	97	device->cname = "GK107";
9719047b	98	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	99	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	100	device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
3ca6cd43	101	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	102	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	103	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
d38ac521	104	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	105	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
d7e5fcd2	106	device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
5f8824de	107	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
5a5c7432	108	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	109	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
95484b57	110	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	111	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
24a4ae86	112	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	113	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	114	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
21b13791	115	device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
c9c0ccae	116	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	117	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	118	device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
f84aff4e	119	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
e3c71eb2	120	device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass;
878da15a	121	device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass;
bd6c5cab BS	122	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	123	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	124	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	125	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	126	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	127	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
4d34686e	128	device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
caba5570 BS	129	break;
	130	case 0xe6:
	131	device->cname = "GK106";
9719047b	132	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	133	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	134	device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
3ca6cd43	135	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	136	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	137	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
caba5570	138	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	139	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
d7e5fcd2	140	device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
5f8824de	141	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
caba5570	142	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	143	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
95484b57	144	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	145	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
24a4ae86	146	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	147	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	148	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
ebb58dc2	149	device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
c9c0ccae	150	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	151	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	152	device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
f84aff4e	153	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
e3c71eb2	154	device->oclass[NVDEV_ENGINE_GR ] = gk104_gr_oclass;
878da15a	155	device->oclass[NVDEV_ENGINE_DISP ] = gk104_disp_oclass;
bd6c5cab BS	156	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	157	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	158	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	159	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	160	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	161	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
4d34686e	162	device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
9274f4a9	163	break;
52e98f1a AC	164	case 0xea:
52e98f1a AC	165	device->cname = "GK20A";
f3867f43	166	device->oclass[NVDEV_SUBDEV_CLK ] = &gk20a_clk_oclass;
7d155dac	167	device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
5f8824de	168	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
3ca6cd43	169	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
52e98f1a AC	170	device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
52e98f1a AC	171	device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass;
5d6d94f7	172	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
52e98f1a	173	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
a6ff85d3	174	device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
42594600	175	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
ec1afbf4	176	device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
5b85057a	177	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
52e98f1a	178	device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
f84aff4e	179	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
b8bf04e1	180	device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
bd6c5cab	181	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
4d34686e	182	device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
ef1df1bc	183	device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
ebb58dc2	184	device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
52e98f1a	185	break;
7b4f638b BS	186	case 0xf0:
7b4f638b BS	187	device->cname = "GK110";
9719047b	188	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	189	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	190	device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
3ca6cd43	191	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	192	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	193	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
7b4f638b	194	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	195	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
d7e5fcd2	196	device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
5f8824de	197	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
7b4f638b	198	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	199	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
95484b57	200	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	201	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
9abdbab0	202	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	203	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	204	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
21b13791	205	device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
9abdbab0	206	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	207	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	208	device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
f84aff4e	209	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
e3c71eb2	210	device->oclass[NVDEV_ENGINE_GR ] = gk110_gr_oclass;
878da15a	211	device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
bd6c5cab BS	212	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	213	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	214	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	215	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	216	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	217	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
4d34686e	218	device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
9abdbab0 JR	219	break;
	220	case 0xf1:
	221	device->cname = "GK110B";
9719047b	222	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	223	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	224	device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
3ca6cd43	225	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	226	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	227	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
9abdbab0	228	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	229	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
d7e5fcd2	230	device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
5f8824de	231	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
9abdbab0	232	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	233	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
95484b57	234	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	235	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
24a4ae86	236	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	237	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	238	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
21b13791	239	device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
c9c0ccae	240	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	241	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	242	device->oclass[NVDEV_ENGINE_FIFO ] = gk104_fifo_oclass;
f84aff4e	243	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
b8bf04e1	244	device->oclass[NVDEV_ENGINE_GR ] = gk110b_gr_oclass;
878da15a	245	device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
bd6c5cab BS	246	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	247	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	248	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	249	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	250	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	251	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
4d34686e	252	device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
aabf19c2	253	break;
8d5e3af1 SK	254	case 0x106:
8d5e3af1 SK	255	device->cname = "GK208B";
9719047b	256	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	257	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	258	device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
8d5e3af1	259	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	260	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	261	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
8d5e3af1	262	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	263	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
8d5e3af1	264	device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
5f8824de	265	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
8d5e3af1	266	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	267	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
8d5e3af1	268	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	269	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
8d5e3af1	270	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	271	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	272	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
21b13791	273	device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
8d5e3af1	274	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	275	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	276	device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
f84aff4e	277	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
e3c71eb2	278	device->oclass[NVDEV_ENGINE_GR ] = gk208_gr_oclass;
878da15a	279	device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
bd6c5cab BS	280	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	281	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	282	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	283	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	284	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	285	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
8d5e3af1	286	break;
aabf19c2 BS	287	case 0x108:
aabf19c2 BS	288	device->cname = "GK208";
9719047b	289	device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
4e7659fc	290	device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
b9ec1424	291	device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
3ca6cd43	292	device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
7632b30e	293	device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
e1404611	294	device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
aabf19c2	295	device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
a8c4362b	296	device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
7d155dac	297	device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
5f8824de	298	device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
aabf19c2	299	device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
639c308e	300	device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
95484b57	301	device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
5ecfadeb	302	device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
24a4ae86	303	device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
42594600	304	device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
245dcfe9	305	device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
21b13791	306	device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
c9c0ccae	307	device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
5b85057a	308	device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
05c7145d	309	device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
f84aff4e	310	device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
e3c71eb2	311	device->oclass[NVDEV_ENGINE_GR ] = gk208_gr_oclass;
878da15a	312	device->oclass[NVDEV_ENGINE_DISP ] = gk110_disp_oclass;
bd6c5cab BS	313	device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
	314	device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
	315	device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
87c33f4e	316	device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
e3332c20	317	device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
87a87657	318	device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
7b4f638b	319	break;
9274f4a9 BS	320	default:
	321	nv_fatal(device, "unknown Kepler chipset\n");
	322	return -EINVAL;
	323	}
	324
	325	return 0;
	326	}