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3f204647 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
9719047b | 24 | #include "priv.h" |
3f204647 BS |
25 | |
26 | #include <subdev/bios.h> | |
27 | #include <subdev/bus.h> | |
28 | #include <subdev/gpio.h> | |
29 | #include <subdev/i2c.h> | |
3ca6cd43 | 30 | #include <subdev/fuse.h> |
f3867f43 | 31 | #include <subdev/clk.h> |
3f204647 BS |
32 | #include <subdev/therm.h> |
33 | #include <subdev/mxm.h> | |
34 | #include <subdev/devinit.h> | |
35 | #include <subdev/mc.h> | |
36 | #include <subdev/timer.h> | |
37 | #include <subdev/fb.h> | |
95484b57 | 38 | #include <subdev/ltc.h> |
3f204647 BS |
39 | #include <subdev/ibus.h> |
40 | #include <subdev/instmem.h> | |
5ce3bf3c | 41 | #include <subdev/mmu.h> |
3f204647 | 42 | #include <subdev/bar.h> |
ebb58dc2 | 43 | #include <subdev/pmu.h> |
3f204647 BS |
44 | #include <subdev/volt.h> |
45 | ||
3f204647 BS |
46 | #include <engine/dmaobj.h> |
47 | #include <engine/fifo.h> | |
8700287b | 48 | #include <engine/sw.h> |
b8bf04e1 | 49 | #include <engine/gr.h> |
3f204647 | 50 | #include <engine/disp.h> |
aedf24ff | 51 | #include <engine/ce.h> |
3f204647 | 52 | #include <engine/bsp.h> |
eccf7e8a | 53 | #include <engine/msvld.h> |
37a5d028 | 54 | #include <engine/mspdec.h> |
fd8666f7 | 55 | #include <engine/msppp.h> |
d5752b9b | 56 | #include <engine/pm.h> |
3f204647 BS |
57 | |
58 | int | |
9719047b | 59 | gm100_identify(struct nvkm_device *device) |
3f204647 BS |
60 | { |
61 | switch (device->chipset) { | |
62 | case 0x117: | |
63 | device->cname = "GM107"; | |
9719047b | 64 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; |
4e7659fc | 65 | device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; |
b9ec1424 | 66 | device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; |
3ca6cd43 | 67 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass; |
7632b30e | 68 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
808a188a | 69 | device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass; |
3f204647 BS |
70 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
71 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass; | |
7d155dac | 72 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; |
5f8824de | 73 | device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; |
3f204647 BS |
74 | device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; |
75 | device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass; | |
95484b57 | 76 | device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; |
5ecfadeb | 77 | device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; |
3f204647 | 78 | device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; |
42594600 | 79 | device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; |
245dcfe9 | 80 | device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass; |
21b13791 | 81 | device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; |
2a5e5fa7 MP |
82 | |
83 | #if 0 | |
3f204647 BS |
84 | device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; |
85 | #endif | |
5b85057a | 86 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; |
05c7145d | 87 | device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass; |
f84aff4e | 88 | device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; |
b8bf04e1 | 89 | device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; |
3f204647 | 90 | device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass; |
bd6c5cab | 91 | device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; |
3f204647 | 92 | #if 0 |
bd6c5cab | 93 | device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; |
3f204647 | 94 | #endif |
bd6c5cab | 95 | device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; |
3f204647 | 96 | #if 0 |
87c33f4e | 97 | device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; |
e3332c20 | 98 | device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; |
87a87657 | 99 | device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; |
083dba02 BS |
100 | #endif |
101 | break; | |
102 | case 0x124: | |
103 | device->cname = "GM204"; | |
9719047b | 104 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; |
7e547adc SH |
105 | device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; |
106 | device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass; | |
107 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass; | |
108 | #if 0 | |
109 | /* looks to be some non-trivial changes */ | |
110 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; | |
111 | /* priv ring says no to 0x10eb14 writes */ | |
112 | device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass; | |
113 | #endif | |
114 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | |
115 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass; | |
116 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; | |
117 | device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; | |
118 | device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; | |
119 | device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass; | |
120 | device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; | |
121 | device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; | |
122 | device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; | |
123 | device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; | |
124 | device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass; | |
125 | device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; | |
126 | #if 0 | |
127 | device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; | |
128 | #endif | |
129 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; | |
130 | #if 0 | |
131 | device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass; | |
132 | device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; | |
133 | device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; | |
134 | #endif | |
135 | device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; | |
136 | #if 0 | |
137 | device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass; | |
138 | device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; | |
139 | device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; | |
140 | device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; | |
141 | device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; | |
142 | device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; | |
143 | #endif | |
144 | break; | |
145 | case 0x126: | |
146 | device->cname = "GM206"; | |
147 | device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; | |
4e7659fc | 148 | device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; |
083dba02 BS |
149 | device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass; |
150 | device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass; | |
151 | #if 0 | |
152 | /* looks to be some non-trivial changes */ | |
7632b30e | 153 | device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; |
083dba02 BS |
154 | /* priv ring says no to 0x10eb14 writes */ |
155 | device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass; | |
156 | #endif | |
157 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | |
158 | device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass; | |
159 | device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; | |
5f8824de | 160 | device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; |
083dba02 BS |
161 | device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; |
162 | device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass; | |
163 | device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; | |
5ecfadeb | 164 | device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; |
083dba02 | 165 | device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; |
42594600 | 166 | device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; |
245dcfe9 | 167 | device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass; |
21b13791 | 168 | device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; |
083dba02 BS |
169 | #if 0 |
170 | device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; | |
171 | #endif | |
5b85057a | 172 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; |
083dba02 | 173 | #if 0 |
05c7145d | 174 | device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass; |
f84aff4e | 175 | device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; |
b8bf04e1 | 176 | device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; |
083dba02 BS |
177 | #endif |
178 | device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; | |
179 | #if 0 | |
aedf24ff BS |
180 | device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass; |
181 | device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; | |
182 | device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; | |
87c33f4e | 183 | device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; |
e3332c20 | 184 | device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; |
87a87657 | 185 | device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; |
3f204647 BS |
186 | #endif |
187 | break; | |
188 | default: | |
189 | nv_fatal(device, "unknown Maxwell chipset\n"); | |
190 | return -EINVAL; | |
191 | } | |
192 | ||
193 | return 0; | |
194 | } |